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排序方式: 共有43条查询结果,搜索用时 234 毫秒
1.
研究了15.14MeV/u 136Xe离子在不同批次的32k×8bits静态存储器中所引起的单粒子效应.获得了单粒子翻转和单粒子闭锁截面与入射角度的依赖关系.将单粒子效应截面与灵敏区中沉积的能量相联系,而不是线性能量转移(LET)值.估计了灵敏体积的深度和死层的厚度.  相似文献   
2.
ABSTRACT

As transistor sizes scale down to nanometres dimensions, CMOS circuits become more sensitive to radiation. High-performance static random access memory (SRAM) cells are prone to radiation-induced single event upsets (SEU) which come from the natural space environment. The SEU generates a soft error in the transistor due to the strike of an ionizing particle. Thus, this paper compares the endurance of 12T SRAM and 6T SRAM circuit on 130 up to 22?nm CMOS technology towards SEU. Besides that, this paper discusses the trend of critical linear energy transfer (LET) and collected charge due to technology scaling for the respective circuit. The critical LET (LETcrit) and critical charge (Qcrit) of 6T are approximately 50% lower compared with 12T SRAMs.  相似文献   
3.
Using computer-aided design three-dimensional simulation technology,the supply voltage scaled dependency of the recovery of single event upset and charge collection in static random-access memory cells are investigated.It reveals that the recovery linear energy transfer threshold decreases with the supply voltage reducing,which is quite attractive for dynamic voltage scaling and subthreshold circuit radiation-hardened design.Additionally,the effect of supply voltage on charge collection is also investigated.It is concluded that the supply voltage mainly affects the bipolar gain of the parasitical bipolar junction transistor(BJT) and the existence of the source plays an important role in supply voltage variation.  相似文献   
4.
Dong-Qing Li 《中国物理 B》2022,31(5):56106-056106
Three-dimensional (3D) TCAD simulations demonstrate that reducing the distance between the well boundary and N-channel metal-oxide semiconductor (NMOS) transistor or P-channel metal-oxide semiconductor (PMOS) transistor can mitigate the cross section of single event upset (SEU) in 14-nm complementary metal-oxide semiconductor (CMOS) bulk FinFET technology. The competition of charge collection between well boundary and sensitive nodes, the enhanced restoring currents and the change of bipolar effect are responsible for the decrease of SEU cross section. Unlike dual-interlock cell (DICE) design, this approach is more effective under heavy ion irradiation of higher LET, in the presence of enough taps to ensure the rapid recovery of well potential. Besides, the feasibility of this method and its effectiveness with feature size scaling down are discussed.  相似文献   
5.
李达维  秦军瑞  陈书明 《中国物理 B》2013,22(2):29402-029402
Using the technology computer-aided design three-dimensional simulation, the supply voltage scaled dependency of the recovery of single event upset and charge collection in static random-access memory cells are investigated. It reveals that the recovery linear energy transfer threshold decreases with the supply voltage reducing, which is quite attractive to the dynamic voltage scaling and subthreshold circuits radiation-hardened design. Additionally, the effect of supply voltage on charge collection is also investigated. It is concluded that the supply voltage mainly affects the bipolar gain of parasitical bipolar junction transistor (BJT) and the existence of the source plays an important role in the supply voltage variation.  相似文献   
6.
BES-Ⅲ MC 前端板FPGA的辐射损伤实验   总被引:1,自引:0,他引:1  
研究了Altera公司ACEX 1K系列现场可编程逻辑门阵列(FPGA,Field Programmable Gate Array) EP1K30TC144-3在g射线和14MeV、2.5MeV中子照射下的辐射影响,对得到的试验结果给出了分析和评估. 对于在BES-IIIm子鉴别器读出电子学系统上应用ACEX 1K系列FPGA的可行性给出了结论.  相似文献   
7.
 针对采用整模结构的冷镦模具疲劳寿命极低的现状,提出以三层圆筒组合模具结构 替代整体模具, 改变模具受力方式, 使冷镦件模具达到较高寿命的设计方法. 以螺栓 圆头的冷镦试验结果为依据,以力学的应力分析方法为基础,应用力学理论,导出了生产实 践中实用的组合模具设计原理与经验公式,并举例说明了该方法的应用.  相似文献   
8.
王晓晗  郭红霞  雷志锋  郭刚  张科营  高丽娟  张战刚 《物理学报》2014,63(19):196102-196102
文章提出了一种基于蒙特卡洛和器件仿真的存储器单粒子翻转截面获取方法,可以准确计算存储器单粒子效应,并定位单粒子翻转的灵敏区域.基于该方法,计算了国产静态存储器和现场可编程门阵列(FPGA)存储区的单粒子效应的截面数据,仿真结果和重离子单粒子效应试验结果符合较好.仿真计算揭示了器件单粒子翻转敏感程度与器件n,p截止管区域面积相关的物理机理,并获得了不同线性能量转移(LET)值下单粒子翻转灵敏区域分布.采用蒙特卡洛方法计算了具有相同LET、不同能量的离子径迹分布,结果显示高能离子的电离径迹半径远大于低能离子,而低能离子径迹中心的能量密度却要高约两到三个数量级.随着器件特征尺寸的减小,这种差别的影响将会越来越明显,阈值LET和饱和截面将不能完全描述器件单粒子效应结果.  相似文献   
9.
Nitrogen plasma passivation (NPP) on (111) germanium (Ge) was studied in terms of the interface trap density, roughness, and interfacial layer thickness using plasma-enhanced chemical vapor deposition (PECVD). The results show that NPP not only reduces the interface states, but also improves the surface roughness of Ge, which is beneficial for suppressing the channel scattering at both low and high field regions of Ge MOSFETs. However, the interracial layer thickness is also increased by the NPP treatment, which will impact the equivalent oxide thickness (EOT) scaling and thus degrade the device performance gain from the improvement of the surface morphology and the interface passivation. To obtain better device performance of Ge MOSFETs, suppressing the interfacial layer regrowth as well as a trade-off with reducing the interface states and roughness should be considered carefully when using the NPP process.  相似文献   
10.
Experimental evidence is presented relevant to the angular dependences of multiple-bit upset (MBU) rates and patterns in static random access memories (SRAMs) under heavy ion irradiation. The single event upset (SEU) cross sections under tilted ion strikes are overestimated by 23.9% 84.6%, compared with under normally incident ion with the equivalent linear energy transfer (LET) value of ~ 41 MeV/(mg/cm 2 ), which can be partially explained by the fact that the MBU rate for tilted ions of 30 is 8.5%-9.8% higher than for normally incident ions. While at a lower LET of ~ 9.5 MeV/(mg/cm 2 ), no clear discrepancy is observed. Moreover, since the ion trajectories at normal and tilted incidences are different, the predominant double-bit upset (DBU) patterns measured are different in both conditions. Those differences depend on the LET values of heavy ions and devices under test. Thus, effective LET method should be used carefully in ground-based testing of single event effects (SEE) sensitivity, especially in MBU-sensitive devices.  相似文献   
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