深亚微米器件沟道长度对总剂量辐照效应的影响

研究了180 nm 互补金属氧化物半导体技术下的器件沟道长度对总剂量辐照效应的影响. 在其他条件如辐照偏置、器件结构等不变的情况下, 氧化层中的陷阱电荷决定了辐照响应. 浅沟槽隔离氧化层中的陷阱电荷使得寄生的侧壁沟道反型, 从而形成大的关态泄漏电流. 这个电流与沟道长度存在一定的关系, 沟道长度越短, 泄漏电流越大. 首次发现辐照会增强这个电流的沟道长度调制效应, 从而使得器件进一步退化.     

绝缘体上硅金属氧化物半导体场效应晶体管中辐射导致的寄生效应研究

基于⁶⁰Co γ射线源研究了总剂量辐射对绝缘体上硅（silicon on insulator,SOI）金属氧化物半导体场效应晶体管器件的影响.通过对比不同尺寸器件的辐射响应,分析了导致辐照后器件性能退化的不同机制.实验表明：器件的性能退化来源于辐射增强的寄生效应;浅沟槽隔离（shallow trench isolation,STI）寄生晶体管的开启导致了关态漏电流随总剂量呈指数增加,直到达到饱和;STI氧化层的陷阱电荷共享导致了窄沟道器件的阈值电压漂移,而短沟道器件的阈值电压漂移则来自于背栅阈值耦合;在同一工艺下,尺寸较小的器件对总剂量效应更敏感.探讨了背栅和体区加负偏压对总剂量效应的影响,SOI器件背栅或体区的负偏压可以在一定程度上抑制辐射增强的寄生效应,从而改善辐照后器件的电学特性.     

沟道宽长比对深亚微米NMOSFET总剂量辐射与热载流子损伤的影响

本文对不同沟道宽长比的NMOSFET进行了辐射与热载流子应力的试验研究,电参数测量数据表明: 虽然两种损伤的原理具有相似之处,但总剂量辐射与热载流子的损伤表现形式及对沟道宽长比的依赖关系均不同.辐射损伤的最大特点是关态泄漏电流增加,并且损伤与沟道宽长比成反比;热载流子损伤会造成跨导等参数的显著变化,但关态泄漏电流无明显改变,并且损伤随沟道长度与宽度的减小而增大.从二者基本原理出发,结合宏观参数的表现形式,文中对辐射与热载流子损伤进行了详细分析,认为造成二者损伤差异及对沟道宽长比不同依赖关系的原因在于辐射与热载子注入引入的陷阱电荷部位不同.因此对两种损伤进行加固时应重点从器件设计尺寸、结构等方面综合考虑.     

65 nm互补金属氧化物半导体场效应和晶体管总剂量效应及损伤机制

对65 nm互补金属氧化物半导体工艺下不同尺寸的N型和P型金属氧化物半导体场效应晶体管(NMOSFET和PMOSFET)开展了不同偏置条件下电离总剂量辐照实验.结果表明:PMOSFET的电离辐射响应与器件结构和偏置条件均有很强的依赖性,而NMOSFET表现出较强的抗总剂量性能;在累积相同总剂量时,PMOSFET的辐照损伤远大于NMOSFET.结合理论分析和数值模拟给出了PMOSFET的辐射敏感位置及辐射损伤的物理机制.     

60Co γ射线辐射对AlGaN/GaN HEMT器件的影响

采用⁶⁰Co γ射线辐射源对非钝化保护的AlGaN/GaN高电子迁移率晶体管(HEMT)器件进行了1 Mrad(Si)的总剂量辐射,实验发现辐射累积剂量越大,器件尺寸越小,器件饱和漏电流和跨导下降越明显,同时辐射后器件栅泄漏电流明显增大,而阈值电压变化很小. 对辐射前后器件的沟道串联电阻和阈值电压变化的分析表明,辐射感生表面态负电荷的产生是造成AlGaN/GaN HEMT器件电特性退化的主要原因之一. 关键词： AlGaN/GaN HEMT器件 γ射线辐射 表面态     

0.18 μm窄沟NMOS晶体管总剂量效应研究

为明确深亚微米NMOS器件抗辐照能力以及研究其加固措施, 本文对0.18 μm窄沟NMOS晶体管进行了⁶⁰Coγ总剂量辐射效应研究. 结果表明: 和宽沟器件不同, 阈值电压、跨导、漏源电导对总剂量辐照敏感, 此现象被称之为辐射感生窄沟道效应; 相比较栅氧化层, 器件隔离氧化层对总剂量辐照更敏感; 窄沟道NMOS器件阈值电压不仅和沟道耗尽区电荷有关, 寄生晶体管耗尽区电荷对其影响也不可忽略, 而辐照引起源漏之间寄生晶体管开启, 形成漏电通道, 正是导致漏电流、亚阈斜率等参数变化的原因. 关键词： 0.18μmm 窄沟NMOS晶体管 60Coγ辐照')" href="#">⁶⁰Coγ辐照 辐射感生窄沟道效应     

Bias dependence of a deep submicron NMOSFET response to total dose irradiation

Deep submicron n-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs) with shallow trench isolation (STI) are exposed to ionizing dose radiation under different bias conditions.The total ionizing dose radiation induced subthreshold leakage current increase and the hump effect under four different irradiation bias conditions including the worst case (ON bias) for the transistors are discussed.The high electric fields at the corners are partly responsible for the subthreshold hump effect.Charge trapped in the isolation oxide,particularly at the Si/SiO 2 interface along the sidewalls of the trench oxide creates a leakage path,which becomes a dominant contributor to the offstate drain-to-source leakage current in the NMOSFET.Non-uniform charge distribution is introduced into a threedimensional (3D) simulation.Good agreement between experimental and simulation results is demonstrated.We find that the electric field distribution along with the STI sidewall is important for the radiation effect under different bias conditions.     

AlGaN/GaN高电子迁移率器件外部边缘电容的物理模型

AlGaN/GaN HEMT外部边缘电容Cofd是由栅极垂直侧壁与二维电子气水平壁之间的电场构成的等效电容.本文基于保角映射法对Cofd进行物理建模,考虑沟道长度调制效应,研究外部偏置、阈值电压漂移和温度变化对Cofd的影响:随着漏源偏压从零开始增加,Cofd先保持不变再开始衰减,其衰减速率随栅源偏压的增加而减缓;AlGaN势垒层中施主杂质浓度的减小和Al组分的减小都可引起阈值电压的正向漂移,正向阈值漂移会加强沟道长度调制效应对Cofd的影响,导致Cofd呈线性衰减.在大漏极偏压工作情况下,Cofd对器件工作温度的变化更加敏感.     

电离辐射环境下的部分耗尽绝缘体上硅n型金属氧化物半导体场效应晶体管可靠性研究

随着半导体技术的进步, 集成小尺寸绝缘体上硅器件的芯片开始应用到航空航天领域, 使得器件在使用中面临了深空辐射环境与自身常规可靠性的双重挑战. 进行小尺寸器件电离辐射环境下的可靠性试验有助于对器件综合可靠性进行评估. 参照国标GB2689.1-81恒定应力寿命试验与加速寿命试验方法总则进行电应力选取, 对部分耗尽绝缘体上硅n型金属氧化物半导体场效应晶体管进行了电离辐射环境下的常规可靠性研究. 通过试验对比, 定性地分析了氧化物陷阱电荷和界面态对器件敏感参数的影响, 得出了氧化物陷阱电荷和界面态随着时间参数的变化, 在不同阶段对器件参数的影响. 结果表明, 总剂量效应与电应力的共同作用将加剧器件敏感参数的退化, 二者的共同作用远大于单一影响因子.     

Breakdown mechanisms in AlGaN/GaN high electron mobility transistors with different GaN channel thickness values

In this paper,the off-state breakdown characteristics of two different AlGaN/GaN high electron mobility transistors（HEMTs）,featuring a 50-nm and a 150-nm GaN thick channel layer,respectively,are compared.The HEMT with a thick channel exhibits a little larger pinch-off drain current but significantly enhanced off-state breakdown voltage(SV_off).Device simulation indicates that thickening the channel increases the drain-induced barrier lowering（DIBL） but reduces the lateral electric field in the channel and buffer underneath the gate.The increase of BV_off in the thick channel device is due to the reduction of the electric field.These results demonstrate that it is necessary to select an appropriate channel thickness to balance DIBL and BV_off in AlGaN/GaN HEMTs.     

Investigation of the characteristics of GIDL current in 90nm CMOS technology

A specially designed experiment is performed for investigating gate-induced drain leakage (GIDL) current in 90nm CMOS technology using lightly-doped drain (LDD) NMOSFET. This paper shows that the drain bias $V_{\rm D}$ has a strong effect on GIDL current as compared with the gate bias $V_{\rm G}$ at the same drain--gate voltage $V_{\rm DG}$. It is found that the difference between $I_{\rm D}$ in the off-state $I_{\rm D}-V_{\rm G}$ characteristics and the corresponding one in the off-state $I_{\rm D}-V_{\rm D}$ characteristics, which is defined as $I_{\rm DIFF}$, versus $V_{\rm DG}$ shows a peak. The difference between the influences of $V_{\rm D}$ and $V_{\rm G}$ on GIDL current is shown quantitatively by $I_{\rm DIFF}$, especially in 90nm scale. The difference is due to different hole tunnellings. Furthermore, the maximum $I_{\rm DIFF }$($I_{\rm DIFF,MAX})$ varies linearly with $V_{\rm DG}$ in logarithmic coordinates and also $V_{\rm DG}$ at $I_{\rm DIFF,MAX}$ with $V_{\rm F}$ which is the characteristic voltage of $I_{\rm DIFF}$. The relations are studied and some related expressions are given.     

Study of total ionizing dose radiation effects on enclosed gate transistors in a commercial CMOS technology

This paper studies the total ionizing dose radiation effects on MOS (metal-oxide-semiconductor) transistors with normal and enclosed gate layout in a standard commercial CMOS (compensate MOS) bulk process. The leakage current, threshold voltage shift, and transconductance of the devices were monitored before and after $\gamma $-ray irradiation. The parameters of the devices with different layout under different bias condition during irradiation at different total dose are investigated. The results show that the enclosed layout not only effectively eliminates the leakage but also improves the performance of threshold voltage and transconductance for NMOS (n-type channel MOS) transistors. The experimental results also indicate that analogue bias during irradiation is the worst case for enclosed gate NMOS. There is no evident different behaviour observed between normal PMOS (p-type channel MOS) transistors and enclosed gate PMOS transistors.     

Analysis of functional failure mode of commercial deep sub-micron SRAM induced by total dose irradiation

Functional failure mode of commercial deep sub-micron static random access memory(SRAM) induced by total dose irradiation is experimentally analyzed and verified by circuit simulation. We extensively characterize the functional failure mode of the device by testing its electrical parameters and function with test patterns covering different functional failure modes. Experimental results reveal that the functional failure mode of the device is a temporary function interruption caused by peripheral circuits being sensitive to the standby current rising. By including radiation-induced threshold shift and off-state leakage current in memory cell transistors, we simulate the influence of radiation on the functionality of the memory cell. Simulation results reveal that the memory cell is tolerant to irradiation due to its high stability, which agrees with our experimental result.     

Mismatch of dielectric constants at the interface of nanometer metal-oxide-semiconductor devices with high-<Emphasis Type="Italic">K</Emphasis> gate dielectric impacts on the inversion charge density

The comparison of the inversion electron density between a nanometer metal-oxide-semiconductor (MOS) device with high-K gate dielectric and a SiO₂ MOS device with the same equivalent oxide thickness has been discussed. A fully self-consistent solution of the coupled Schr?dinger–Poisson equations demonstrates that a larger dielectric-constant mismatch between the gate dielectric and silicon substrate can reduce electron density in the channel of a MOS device under inversion bias. Such a reduction in inversion electron density of the channel will increase with increase in gate voltage. A reduction in the charge density implies a reduction in the inversion electron density in the channel of a MOS device. It also implies that a larger dielectric constant of the gate dielectric might result in a reduction in the source–drain current and the gate leakage current.     

单Halo全耗尽应变Si 绝缘硅金属氧化物半导体场效应管的阈值电压解析模型

为了改善金属氧化物半导体场效应管(MOSFET) 的短沟道效应(SCE)、 漏致势垒降低(DIBL) 效应, 提高电流的驱动能力, 提出了单Halo 全耗尽应变硅绝缘体 (SOI) MOSFET 结构, 该结构结合了应变Si, 峰值掺杂Halo结构, SOI 三者的优点. 通过求解二维泊松方程, 建立了全耗尽器件表面势和阈值电压的解析模型. 模型中分析了弛豫层中的Ge组分对表面势、表面场强和阈值电压的影响, 不同漏电压对表面势的影响, Halo 掺杂对阈值电压和DIBL的影响.结果表明, 该新结构能够抑制SCE和DIBL效应, 提高载流子的输运效率. 关键词： 应变Si 阈值电压 短沟道效应 漏致势垒降低     

新型槽栅PMOSFET热载流子退化机理与抗热载流子效应研究

分析了槽栅器件中的热载流子形成机理,发现在三个应力区中,中栅压附近热载流子产生概率达到最大.利用先进的半导体器件二维器件仿真器研究了槽栅和平面PMOSFET的热载流子特 性,结果表明槽栅器件中热载流子的产生远少于平面器件,且对于栅长在深亚微米和超深亚 微米情况下尤为突出.为进一步探讨热载流子加固后对器件特性的其他影响,分别对不同种 类和浓度的界面态引起的器件栅极和漏极特性的漂移进行了研究,结果表明同样种类和密度 的界面态在槽栅器件中引起的器件特性的漂移远大于平面器件.为开展深亚微米和亚0.1微米 新型槽栅 关键词： 槽栅PMOSFET 热载流子退化机理 热载流子效应     

Nanoscale SiGe-on-insulator (SGOI) MOSFET with graded doping channel for improving leakage current and hot-carrier degradation

A novel graded doping profile, for the first time is introduced for reliability improvement and leakage current reduction. The proposed structure is called graded doping channel SiGe-on-insulator (GDC-SGOI). The key idea in this work is to modify the electric field and band energy with novel doping distribution in the channel for improving leakage current and hot electron. Using two-dimensional two-carrier simulation we demonstrate that the GDC-SGOI shows lower electron temperature near the drain region in the channel in comparison with the conventional SGOI (C-SGOI) with uniform doping. On the other hand, short channel effects (SCEs) such as drain induced barrier lowering (DIBL) and threshold voltage roll-off improvement leads to leakage current reduction. DIBL decrement and less dependence of the threshold voltage and DIBL on channel length variation in the GDC-SGOI structure show SCEs suppression. Furthermore the on-off current ratio (I_on/I_off) in the GDC-SGOI is higher than that achieved from the C-SGOI. Therefore, the results show that the GDC-SGOI structure especially in low power and device reliability has excellent performance in comparison with the C-SGOI.     

Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced.     

Impact of substrate bias on radiation-induced edge effects in MOSFETs

This paper investigates the effects of gamma-ray irradiation on the Shallow-Trench Isolation (STI) leakage currents in 180-nm complementary metal oxide semiconductor technology. No hump effect in the subthreshold region is observed after irradiation, which is considered to be due to the thin STI corner oxide thickness. A negative substrate bias could effectively suppress the STI leakage, but it also impairs the device characteristics. The three-dimensional simulation is introduced to understand the impact of substrate bias. Moreover, we propose a simple method for extracting the best substrate bias value, which not only eliminates the STI leakage but also has the least impact on the device characteristics.     

Fluorine-plasma treated AlGaN/GaN high electronic mobility transistors under off-state overdrive stress

Influences of off-state overdrive stress on the fluorine-plasma treated AlGaN/GaN high-electronic mobility transistors (HEMTs) are experimentally investigated. It is observed that the reverse leakage current between the gate and source decreases after the off-state stress, whereas the current between the gate and drain increases. By analyzing those changes of the reverse currents based on the Frenkel-Poole model, we realize that the ionization of fluorine ions occurs during the off-state stress. Furthermore, threshold voltage degradation is also observed after the off-state stress, but the degradations of AlGaN/GaN HEMTs treated with different F-plasma RF powers are different. By comparing the differences between those devices, we find that the F-ions incorporated in the GaN buffer layer play an important role in averting degradation. Lastly, suggestions to obtain a more stable fluorine-plasma treated AlGaN/GaN HEMT are put forwarded.