旋涂速度对制备P3HT有机场效应晶体管性能的影响

采用溶液化的方法制备了以PMMA为绝缘层、P3HT为有源层的有机场效应晶体管.研究了P3HT有源层和PMMA绝缘层的旋涂速度对器件性能的影响.实验结果表明,当P3HT和PMMA的旋涂速度均为2 000 r/min时,器件的性能最佳.峰值场效应迁移率为6.84×10^-2 cm²·V^－1·s^－1.结果表明,选择适当的旋涂速度是一种有效提高溶液化制备有机场效应晶体管性能的方法.     

基于蛋清栅绝缘层的高性能C_(60)有机场效应晶体管(英文)

采用生物材料(蛋清)作为栅绝缘层制备了基于C60为有源层的有机场效应晶体管。器件展现出了合理的电学特性,场效应迁移率和阈值电压分别为2.59 cm2·V-1·s-1和1.25 V。有机场效应晶体管展现良好性能的原因是蛋清具有较高的介电常数及热退火后形成的光滑表面形貌。实验结果表明,对于制备有机场效应晶体管来说,蛋清是一种有前途的绝缘层材料。     

柔性有机场效应晶体管研究进展

柔性有机场效应晶体管具有可折叠、质量轻、低成本等优点,在柔性显示、柔性传感器、柔性射频标签和柔性集成电路等方面显示了广阔的应用前景.本文在介绍柔性有机场效应 晶体管最新研究进展的基础上, 总结了柔性有机场效应晶体管的器件结构和柔性有机场效应晶体管所使用的衬底材料、 栅绝缘层材料、有源层材料及电极材料, 阐述了柔性有机场效应晶体管的制备工艺, 并讨论了不同的弯曲方式对柔性有机场效应晶体管性能的影响, 最后总结和展望了柔性有机场效应晶体管的应用领域. 关键词： 柔性 晶体管 有机/聚合物 溶液加工     

Ta2O5-PMMA复合栅绝缘层对OFETs性能的影响

选用五氧化二钽（Ta₂O₅）-聚甲基丙烯酸甲酯（PMMA）复合材料作为栅绝缘层制备了并五苯有机场效应晶体管（OFETs）。通过在Ta₂O₅表面旋涂一层PMMA可以降低栅绝缘层的表面粗糙度,增大其场效应晶体管的迁移率。研究了厚度在20~60 nm范围内的PMMA对复合绝缘层表面形貌、粗糙度以及器件电学性能的影响。结果表明,当PMMA厚度为40 nm时,器件的电学性能最佳。与单一的Ta₂O₅栅绝缘层器件相比,其场效迁移率由4.2×10^-2 cm²/（V·s）提高到0.31 cm²/（V·s）;栅电压增加到-20 V时,开关电流比由2.9×10²增大到2.9×10⁵。     

旋涂速度对制备P3HT有机场效应晶体管性能的影响（英文）

采用溶液化的方法制备了以PMMA为绝缘层、P3HT为有源层的有机场效应晶体管。研究了P3HT有源层和PMMA绝缘层的旋涂速度对器件性能的影响。实验结果表明,当P3HT和PMMA的旋涂速度均为2 000 r/min时,器件的性能最佳。峰值场效应迁移率为6.84×10-2cm2·V-1·s-1。结果表明,选择适当的旋涂速度是一种有效提高溶液化制备有机场效应晶体管性能的方法。     

基于聚合物共混的有机场效应晶体管光电性能研究

采用聚合物共混的方法制备了体异质结薄膜,将其作为光敏半导体层制备了有机场效应光晶体管.利用原子力显微镜表征了共混薄膜的分相情况,探究了器件提高激子解离效率的机理,并对比了聚合物共混前后有机场效应晶体管的光电性能变化和相分离情况.结果表明：制备的聚合物共混光晶体管在微弱光线条件下(0.038 mW/cm²,808 nm)具有较高的光敏性(为10⁶).通过共混聚合物半导体材料制备体异质结薄膜可以有效地提高激子解离的效率,通过双层绝缘层能进一步降低光晶体管的暗电流,从而提高器件的光敏性.     

Ta_2O_5-PMMA复合栅绝缘层对OFETs性能的影响（英文）

选用五氧化二钽(Ta_2O_5)-聚甲基丙烯酸甲酯(PMMA)复合材料作为栅绝缘层制备了并五苯有机场效应晶体管(OFETs)。通过在Ta_2O_5表面旋涂一层PMMA可以降低栅绝缘层的表面粗糙度,增大其场效应晶体管的迁移率。研究了厚度在20~60 nm范围内的PMMA对复合绝缘层表面形貌、粗糙度以及器件电学性能的影响。结果表明,当PMMA厚度为40 nm时,器件的电学性能最佳。与单一的Ta_2O_5栅绝缘层器件相比,其场效迁移率由4.2×10~(-2)cm~2/(V·s)提高到0.31 cm~2/(V·s);栅电压增加到-20 V时,开关电流比由2.9×10~2增大到2.9×10~5。     

超薄EuF3电极修饰层对有机场效应晶体管性能的提升

采用EuF₃薄层修饰低功函数金属Ag源、漏电极,制备了CuPc有机场效应晶体管,研究了不同厚度EuF₃对器件性能的影响。结果表明,EuF₃的厚度由0 nm增至0.6 nm时,接触电阻由23.65×10⁵ Ω·cm减 至3.86×10⁵ Ω·cm,使得器件载流子迁移率由1.5×10^-3 cm²·V^-1·s^-1提高到4.65×10^-3 cm²·V^-1·s^-1。 UPS测试结果表明,薄层EuF₃在Ag与有机半导体间形成了界面偶极势垒,使源漏电极表面功函数增大,空穴注入势垒降低,Ag电极与有机半导体层界面的接触电阻减小,进而提升了空穴的注入效率。     

N2O Plasma表面处理对SiNx基IGZO-TFT性能的影响

采用N₂O plasma处理SiN_x薄膜作为绝缘层,以室温下沉积的铟镓锌氧化物(IGZO)作为有源层制备了 IGZO薄膜晶体管。与常规的IGZO-TFT相比,N₂O plasma处理过的IGZO-TFT的迁移率由原来的4.5 cm²·V^-1·s^-1增 加至8.1 cm²·V^-1·s^-1,阈值电压由原来的11.5 V减小至3.2 V,亚阈值摆由原来的1.25 V/decade减小至0.9 V/decade。采用C-V方法计算了两种器件的陷阱态,结果发现N₂O plasma处理过的IGZO-TFT的陷阱态明显小于普通的IGZO-TFT的陷阱态,表明N₂O plasma处理SiN_x绝缘层是一种改善IGZO-TFT器件性能的有效方法。     

ZnO/ZnMgO异质结场效应管的制备与性能研究

利用等离子体增强化学气相沉积(PECVD)技术,在ZnO/ZnMgO异质结构上制备SiO₂作为栅绝缘层,采用光刻与腐蚀工艺制备ZnO/ZnMgO异质结场效应管。电学性能测试及计算结果表明器件栅压调控作用明显。发现栅端漏电流对器件性能造成一定影响。在低温条件下,栅绝缘层产生钝化,从而能够改善器件的性能。     

Organic insulator layer influence on the electrical properties of N,N’-di (2-ethylhexyl) - 3, 4, 9, 10-perylene diimide organic thin-film transistors: Experiment and modeling

In this work, n- type organic thin film transistors (OTFTs) based on different kinds of organic dielectrics were fabricated, characterized and theoretically investigated. Three kinds of organic insulators were applied as dielectric gate which are: divinyl tetramethyl disiloxane-bis (benzo-cyclobutene) (BCB), poly(vinylalcohol) (PVA) and poly (4-vinyl phenol) (PVP). Analytical model was applied to describe the electrical behavior of the fabricated OTFTs and to explain the absence of saturation of the drain current for the device based on PVA dielectric. In addition, Meyer–Neldel rule-grain boundary model was applied for the calculation of total resistance of OTFTs based on different dielectrics materials. The theoretical results of output characteristics and total resistance showed an excellent agreement with the experimental measurements. The experimental and theoretical calculations revealed that the n-channel OTFTs based on BCB as an insulator layer exhibited superior electrical characteristics in terms of threshold voltage, mobility and drain current compared with the devices based on PVA and PVP as a gate insulator layer. The device based on BCB organic insulator layer has the largest mobility of 4?×?10^?3 cm² V^?1 s^?1, the smallest leakage current relative to the devices based on PVA and PVP. While, the device fabricated with PVP organic insulator gate has a large trap density on the PVP-EHPDI interface which causes a pronounced decrease in field effect mobility and consequently drain current.     

基于聚(4-乙烯基苯酚)衬底修饰层喷墨打印的小分子有机半导体薄膜制备和表征

采用旋涂法预先在SiO₂衬底表面形成一层聚（4-乙烯基苯酚）（PVP）作为表面修饰层,以喷墨打印的6,13-双（三异丙基甲硅烷基乙炔基）并五苯（TIPS并五苯）作为有源层制作有机薄膜晶体管,有效改善了有机半导体薄膜的形貌。采用真空热蒸镀工艺制备源漏电极,形成底栅顶接触结构的有机薄膜晶体管（OTFT）器件。作为对比,在未经过表面修饰的SiO₂衬底上采用相同条件打印TIPS并五苯薄膜晶体管,发现在经过PVP修饰的SiO₂衬底上打印的单点厚度更均匀,咖啡环效应被抑制或被消除;而通过多点交叠打印形成的矩形薄膜的晶粒尺寸更大,相应的OTFT器件具有更高的场效应迁移率。在有PVP修饰层的衬底上制作的OTFT,器件在饱和区的平均场效应迁移率达到了0.065 cm²·V^-1·s^-1;而直接在SiO₂衬底上制作的器件,相应的平均场效应迁移率仅为0.02 cm²·V^-1·s^-1。     

Growth condition optimization and mobility enhancement through inserting AlAs monolayer in the InP-based In_xGa_(1-x)As/In_(0.52)Al_(0.48)As HEMT structures

The structure of In P-based In_xGa_(1-x) As/In0.52Al0.48 As pseudomorphic high electron mobility transistor(PHEMT)was optimized in detail.Effects of growth temperature,growth interruption time,Si δ-doping condition,channel thickness and In content,and inserted Al As monolayer(ML) on the two-dimensional electron gas(2DEG) performance were investigated carefully.It was found that the use of the inserted Al As monolayer has an enhancement effect on the mobility due to the reduction of interface roughness and the suppression of Si movement.With optimization of the growth parameters,the structures composed of a 10 nm thick In0.75Ga0.25 As channel layer and a 3 nm thick Al As/In0.52Al0.48 As superlattices spacer layer exhibited electron mobilities as high as 12500 cm~2·V-1·s~(-1)(300 K) and 53500 cm~2·V~(-1_·s~(-1)(77 K) and the corresponding sheet carrier concentrations(Ns) of 2.8×10~(12)cm~(-2)and 2.9×1012cm~(-2),respectively.To the best of the authors' knowledge,this is the highest reported room temperature mobility for In P-based HEMTs with a spacer of 3 nm to date.     

沟道层厚度对室温制备的In2O3薄膜晶体管器件性能的影响

在室温下采用直流磁控溅射以SiO₂/Si为衬底制备了不同沟道层厚度的底栅式In₂O₃薄膜晶体管,讨论了沟道层厚度对底栅In₂O₃薄膜晶体管的电学性能的影响。实验结果表明:器件的特性与沟道层厚度有关,最优沟道层厚度的In₂O₃薄膜晶体管为增强型,其阈值电压为2.5 V,开关电流比约为10⁶,场效应迁移率为6.2 cm²·V^-1·s^-1。     

非晶铟镓锌氧薄膜晶体管钼/铜源漏电极的研究

针对非晶铟镓锌氧薄膜晶体管（a-IGZO TFT）的钼/铜源漏电极开展研究。实验证明,单层Mo源漏电极与栅绝缘层之间的粘附性好、表面粗糙度较小、电阻率较大,而单层Cu源漏电极与栅绝缘层之间的结合性差且Cu原子扩散问题严重、表面粗糙度较大、电阻率较小。为了实现优势互补,我们设计了双层Mo（20 nm）/Cu（80 nm）源漏电极,并采用优化工艺制备了包含该电极结构的a-IGZO TFT。器件具有良好的电学特性,场效应迁移率为 8.33 cm²·V^-1·s^-1, 阈值电压为6.0 V,亚阈值摆幅为2.0 V/dec,开关比为 1.3×10⁷,证明了双层Mo/Cu源漏电极的可行性和实用性。     

CVD-derived Hf-based High-k Gate Dielectrics

Hf-based high-k gate dielectric has been recently highlighted as the most promising high-k dielectrics for the next-generation CMOS devices with high performance due to its excellent thermal stability and relatively high dielectric constant. This article provides a comprehensive view of the state-of-the-art research activities in advanced Hf-based high-k gate dielectrics grown by chemical-vapor-deposition-based method, including metal-organic-chemical-vapor-deposition (MOCVD), atomic-layer-chemical-vapor-deposition (ALCVD), and plasma-enhanced- chemical-vapor-deposition (PECVD), in CMOS device. We begin with a survey of methods developed for generating Hf-based high-k gate dielectrics. After that, most attention has been paid to the detailed discussion of the latest development of novel Hf-based high-k gate dielectrics grown by CVD. Finally, we conclude this review with the perspectives and outlook on the future developments in this area. This article explores the possible influences of research breakthroughs of Hf-based gate dielectrics on the current and future applications for nano-MOSFET devices.     

硅掺杂氧化锡柔性薄膜晶体管的制备与特性

研究了柔性非晶硅掺杂氧化锡（SiSnO,STO）薄膜晶体管的电学特性及其在弯曲状态下的电学特性。通过射频磁控溅射在聚酰亚胺（Polyimide,PI）衬底上制备出了柔性非晶硅掺杂氧化锡薄膜晶体管。通过对比不同退火温度的器件性能,发现在300℃能获得最佳器件性能,其饱和迁移率达到2.71 cm²·V^-1·s^-1,开关比高于10⁶,亚阈值摆幅为1.95 V·dec^-1,阈值电压为2.42 V。对器件在不同曲率半径（5,10,20,30 mm）状态下进行输出特性和转移特性测试,发现其在弯曲状态下仍具有良好的电学性能。     

溶胶凝胶法制备以HfO2为绝缘层和ZITO为有源层的高迁移率薄膜晶体管

采用溶胶凝胶法制备了h-k氧化铪HfO₂薄膜, 经500℃退火后, 获得了高透过率、表面光滑、低漏电流和相对高介电常数的HfO₂薄膜. 并采用氧化铪作为绝缘层和锌铟锡氧化物作为有源层成功地制备了底栅顶接触结构薄膜晶体管器件. 获得的薄膜晶体管器件的饱和迁移率大于100 cm²·V^-1·s^-1, 阈值电压为-0.5 V, 开关比为5×10⁶, 亚阈值摆幅为105 mV/decade. 表明采用溶胶凝胶制备的薄膜晶体管具备高的迁移率, 其迁移率接近低温多晶硅薄膜晶体管的迁移率.     

Quantum oscillations and nontrivial transport in(Bi_(0.92)In_(0.08))_2Se_3

Quantum phase transition in topological insulators has drawn heightened attention in condensed matter physics and future device applications.Here we report the magnetotransport properties of single crystalline(Bi_(0.92)In_(0.08))_2Se_3.The average mobility of～1000 cm~2·V~(-1)·s~(-1)is obtained from the Lorentz law at the low field(3 T)up to 50 K.The quantum oscillations rise at a field of～5 T,revealing a high mobility of～1.4×10~4cm~2·V~(-1)·s~(-1)at 2 K.The Dirac surface state is evident by the nontrivial Berry phase in the Landau–Fan diagram.The properties make the(Bi_(0.92)In_(0.08))_2Se_3a promising platform for the investigation of quantum phase transition in topological insulators.