Extraordinarily high drive currents in asymmetrical double-gate MOSFETs

Numerical simulation results derived from a Schrödinger–Poisson tool applied to scaled double-gate (DG) MOSFETs, supplemented by analytical characterizations of the pertinent physics, are presented to give insight concerning the near-ideal features of DG devices and to explain how the low-voltage drive current of the asymmetrical DG MOSFET, having only one predominant channel, can be comparable to, and even higher than, that of the symmetrical-gate counterpart designed to have the same off-state current.     

高功率窄脉宽半导体激光激励器设计

为了获得高功率窄脉宽半导体激光,设计了半导体激光器相应的激励单元,论述MOSFET作为高速开关的工作机理,分析基于MOSFET作为高速开关产生窄的大电流脉冲的电路模型.为了使MOSFET开关速度尽可能快,根据前述分析,提出推挽式MOSFET栅极驱动方式并设计了触发窄脉冲的发生电路.当激光二极管接入放电回路时,实验表明:激光二极管输出光的峰值功率可达67.5 W,脉宽约为20 ns.最后,简要分析了影响光脉冲宽度的因素.     

Ultra-low on-resistance high voltage (>600 V) SOI MOSFET with a reduced cell pitch

A low specific on-resistance (R S,on) silicon-on-insulator (SOI) trench MOSFET (metal-oxide-semiconductor-field-effect-transistor) with a reduced cell pitch is proposed.The lateral MOSFET features multiple trenches:two oxide trenches in the drift region and a trench gate extended to the buried oxide (BOX) (SOI MT MOSFET).Firstly,the oxide trenches increase the average electric field strength along the x direction due to lower permittivity of oxide compared with that of Si;secondly,the oxide trenches cause multiple-directional depletion,which improves the electric field distribution and enhances the reduced surface field (RESURF) effect in the SOI layer.Both of them result in a high breakdown voltage (BV).Thirdly,the oxide trenches cause the drift region to be folded in the vertical direction,leading to a shortened cell pitch and a reduced R S,on.Fourthly,the trench gate extended to the BOX further reduces R S,on,owing to the electron accumulation layer.The BV of the MT MOSFET increases from 309 V for a conventional SOI lateral double diffused metal-oxide semiconductor (LDMOS) to 632 V at the same half cell pitch of 21.5 μm,and R S,on decreases from 419 m · cm 2 to 36.6 m · cm 2.The proposed structure can also help to dramatically reduce the cell pitch at the same breakdown voltage.     

纳米尺度MOSFET过剩噪声的定性分析

最近实验表明纳米尺度MOSFET中的过剩噪声主要为散粒噪声,而此前研究认为MOSFET中不存在散粒噪声,短沟道MOSFET中的过剩噪声为热噪声. 本文基于器件电流模型分析散粒噪声取代热噪声成为过剩噪声主要成分的转变条件,根据该条件对纳米尺度MOSFET噪声特性的预测与文献报道的实验现象、模拟结果以及介观散粒噪声相关结论相符合. 关键词： 散粒噪声 过剩噪声 纳米尺度MOSFET     

Radiation induced inter-device leakage degradation

The evolution of inter-device leakage current with total ionizing dose in transistors in 180 nm generation technologies is studied with an N-type poly-gate field device (PFD) that uses the shallow trench isolation as an effective gate oxide. The overall radiation response of these structures is determined by the trapped charge in the oxide. The impacts of different bias conditions during irradiation on the inter-device leakage current are studied for the first time in this work, which demonstrates that the worst condition is the same as traditional NMOS transistors. Moreover, the two-dimensional technology computer-aided design simulation is used to understand the bias dependence.     

A percolation study of RTS noise in deep sub-micron MOSFET by Monte Carlo simulation

Based on percolation theory and random telegraph signal (RTS) noise generation mechanism, a numerical model for RTS in deep submicron metal-oxide-semiconductor field-effect transistor (MOSFET) was presented, with which the dependence of Tc/Te (where Tc=capture time, Te=emission period ) on energy levels and trap depth with respect to the interface of traps can be simulated. Compared with experimental results, the simulated ones showed a good qualitative agreement.     

功率MOSFET的负偏置温度不稳定性效应中的平衡现象

通过对功率金属氧化物半导体场效应晶体管在静态应力下的负偏置温度不稳定性的实验研究, 发现器件参数的退化随时间的关系遵循反应扩散模型所描述的幂函数关系, 并且在不同栅压应力下, 实验结果中均可观察到平台阶段的出现. 基于反应扩散理论的模型进行了仿真研究, 通过仿真结果分析和验证了此平台阶段对应于反应平衡阶段, 并且解释了栅压应力导致平台阶段持续时间不同的原因. 关键词： 功率金属氧化物半导体场效应晶体管 负偏置温度不稳定性 反应扩散模型     

第七讲微电子技术发展与物理学

微电子学的基础是近代固体物理．微电子技术的快速发展又推动了物理学许多分支的进展．今天，当微电子的基本器件MOSFET缩小接近其终极时，作为下一代的基础，一批基于新的物理效应的纳电子器件又被提了出来．为了突破传统的二值开关系统的共同极限，新的信息处理系统，如量子信息处理，正在大力研究之中．不久的将来，可望出现一次新的信息电子革命．这次革命又将建立在现代物理学及现代生物学的基础之上．     

An oxide/silicon core/shell nanowire metal-oxide semiconductor field-effect transistor

This paper studies an oxide/silicon core/shell nanowire MOSFET(OS-CSNM).Through three-dimensional device simulations,we have demonstrated that the OS-CSNM has a lower leakage current and higher I on /I off ratio after introducing the oxide core into a traditional nanowire MOSFET(TNM).The oxide/silicon OS-CSNM structure suppresses threshold voltage roll-off,drain induced barrier lowering and subthreshold swing degradation.Smaller intrinsic device delay is also observed in OS-CSNM in comparison with that of TNM.     

A low specific on-resistance SOI MOSFET with dual gates and a recessed drain

A low specific on-resistance(Ron,sp) integrable silicon-on-insulator(SOI) metal-oxide semiconductor field-effect transistor(MOSFET) is proposed and investigated by simulation.The MOSFET features a recessed drain as well as dual gates,which consist of a planar gate and a trench gate extended to the buried oxide layer(BOX)(DGRD MOSFET).First,the dual gates form dual conduction channels,and the extended trench gate also acts as a field plate to improve the electric field distribution.Second,the combination of the trench gate and the recessed drain widens the vertical conduction area and shortens the current path.Third,the P-type top layer not only enhances the drift doping concentration but also modulates the surface electric field distributions.All of these sharply reduce Ron,sp and maintain a high breakdown voltage(BV).The BV of 233 V and Ron,sp of 4.151 mΩ·cm2(VGS = 15 V) are obtained for the DGRD MOSFET with 15-μm half-cell pitch.Compared with the trench gate SOI MOSFET and the conventional MOSFET,Ron,sp of the DGRD MOSFET decreases by 36% and 33% with the same BV,respectively.The trench gate extended to the BOX synchronously acts as a dielectric isolation trench,simplifying the fabrication processes.