A snapback-free TOL-RC-LIGBT with vertical P-collector and N-buffer design

A reverse-conducting lateral insulated-gate bipolar transistor(RC-LIGBT) with a trench oxide layer(TOL), featuring a vertical N-buffer and P-collector is proposed. Firstly, the TOL enhances both of the surface and bulk electric fields of the N-drift region, thus the breakdown voltage(BV) is improved. Secondly, the vertical N-buffer layer increases the voltage drop VPNof the P-collector/N-buffer junction, thus the snapback is suppressed. Thirdly, the P-body and the vertical N-buffer act as the anode and the cathode, respectively, to conduct the reverse current, thus the inner diode is integrated. As shown by the simulation results, the proposed RC-LIGBT exhibits trapezoidal electric field distribution with BV of 342.4 V, which is increased by nearly 340% compared to the conventional RC-LIGBT with triangular electric fields of 100.2 V. Moreover,the snapback is eliminated by the vertical N-buffer layer design, thus the reliability of the device is improved.     

Snapback-free shorted anode LIGBT with controlled anode barrier and resistance

A novel shorted anode lateral-insulated gate bipolar transistor(SA LIGBT)with snapback-free characteristic is proposed and investigated.The device features a controlled barrier V_barrierand resistance R_SAin anode,named CBR LIGBT.The electron barrier is formed by the P-float/N-buffer junction,while the anode resistance includes the polysilicon layer and N-float.At forward conduction stage,the V_barrierand R_SAcan be increased by adjusting the doping of the P-float and polysilicon layer,respectively,which can suppress the unipolar mode to eliminate the snapback.At turn-off stage,the low-resistance extraction path(N-buffer/P-float/polysilicon layer/N-float)can quickly extract the electrons in the N-drift,which can effectively accelerate the turn-off speed of the device.The simulation results show that at the same V_on of 1.3 V,the E_offof the CBR LIGBT is reduced by 85%,73%,and 59.6%compared with the SSA LIGBT,conventional LIGBT,and TSA LIGBT,respectively.Additionally,at the same Eoffof 1.5 m J/cm²,the CBR LIGBT achieves the lowest V_on of 1.1 V compared with the other LIGBTs.     

具有半绝缘多晶硅完全三维超结横向功率器件

为了突破传统LDMOS (lateral double-diffused MOSFET)器件击穿电压与比导通电阻的硅极限的2.5 次方关系, 降低LDMOS器件的功率损耗, 提高功率集成电路的功率驱动能力, 提出了一种具有半绝缘多晶硅SIPOS (semi-insulating poly silicon)覆盖的完全3 D-RESURF (three-dimensional reduced surface field)新型Super Junction-LDMOS结构(SIPOS SJ-LDMOS). 这种结构利用SIPOS的电场调制作用使SJ-LDMOS的表面电场分布均匀, 将器件单位长度的耐压量提高到19.4 V/μupm; 覆盖于漂移区表面的SIPOS使SJ-LDMOS沿三维方向均受到电场调制, 实现了LDMOS的完全3 D-RESURF效应, 使更高浓度的漂移区完全耗尽而达到高的击穿电压; 当器件开态工作时, 覆盖于薄场氧化层表面的SIPOS的电场作用使SJ-LDMOS的漂移区表面形成多数载流子积累, 器件比导通电阻降低. 利用器件仿真软件ISE分析获得, 当SIPOS SJ-LDMOS的击穿电压为388 V时, 比导通电阻为20.87 mΩ·cm², 相同结构参数条件下, N-buffer SJ-LDMOS的击穿电压为287 V, 比导通电阻为31.14 mΩ·cm²; 一般SJ-LDMOS 的击穿电压仅为180 V, 比导通电阻为71.82 mΩ·cm².     

新型宽温区高热稳定性微波功率SiGe 异质结双极晶体管

宽温区大电流下的热不稳定性严重制约着功率SiGe 异质结双极晶体管 (HBT) 在射频和微波电路中的应用.为改善器件的热不稳定性, 本文利用SILVACO TCAD建立的多指功率SiGe HBT模型, 分析了器件纵向结构中基区Ge组分分布对微波功率SiGe HBT电学特性和热学特性的影响. 研究表明, 对于基区Ge组分为阶梯分布的HBT, 由于Ge组分缓变引入了少子加速电场, 使它与均匀基区Ge组分HBT相比, 具有更高的特征频率f_T, 且电流增益β和f_T随温度变化变弱, 这有利于防止器件在宽温区工作时电学特性的漂移.同时, 器件整体温度有所降低, 但器件各指温度分布均匀性较差.考虑多指HBT各发射极指散热能力存在差异, 在器件纵向结构设计为基区Ge组分阶梯分布的同时, 对其横向版图进行发射极指间距渐变结构设计, 用于改善器件各指温度分布的均匀性, 进而提高HBT的热稳定性.结果表明, 与基区Ge组分为均匀分布的等发射极指间距结构HBT相比, 新器件各指温度分布均匀性明显改善, f_T保持了较高的值, 且β和f_T 随温度变化不敏感, 热不稳定性得到显著改善, 显示了新器件在宽温区大电流下工作的优越性. 关键词： SiGe 异质结双极晶体管 Ge组分分布 发射极指间距渐变技术 热稳定性     

Double-gate-all-around tunnel field-effect transistor

In this work, a double-gate-all-around tunneling field-effect transistor is proposed. The performance of the novel device is studied by numerical simulation. The results show that with a thinner body and an additional core gate, the novel device achieves a steeper subthreshold slope, less susceptibility to the short channel effect, higher on-state current, and larger on/off current ratio than the traditional gate-all-around tunneling field-effect transistor. The excellent performance makes the proposed structure more attractive to further dimension scaling.     

X-band inverse class-F GaN internally-matched power amplifier

An X-band inverse class-F power amplifier is realized by a 1-mm Al Ga N/Ga N high electron mobility transistor(HEMT).The intrinsic and parasitic components inside the transistor,especially output capacitor Cds,influence the harmonic impedance heavily at the X-band,so compensation design is used for meeting the harmonic condition of inverse class-F on the current source plane.Experiment results show that,in the continuous-wave mode,the power amplifier achieves 61.7% power added efficiency(PAE),which is 16.3% higher than the class-AB power amplifier realized by the same kind of HEMT.To the best of our knowledge,this is the first inverse class-F Ga N internally-matched power amplifier,and the PAE is quite high at the X-band.     

Effect of Temperature Variation on the Characteristics of Microwave Power AlGaN/GaN MODFET

The prime motivation for developing the proposed model of AlGaN/GaN microwave power device is to demonstrate its inherent ability to operate at much higher temperature. An investigation of temperature model of a 1 μm gate AlGaN/GaN enhancement mode n-type modulation-doped field effect transistor (MODFET) is presented. An analytical temperature model based on modified charge control equations is developed. The proposed model handles higher voltages and show stable operation at higher temperatures. The investigated temperature range is from 100 °K–600 °K. The critical parameters of the proposed device are the maximum drain current (I_Dmax), the threshold voltage (V_th), the peak dc trans-conductance (g_m), and unity current gain cut-off frequency (f_T). The calculated values of f_T (10–70 GHz) at elevated temperature suggest that the operation of the proposed device has sufficiently high current handling capacity. The temperature effect on saturation current, cutoff frequency, and trans-conductance behavior predict the device behavior at elevated temperatures. The analysis and simulation results on the transport characteristics of the MODFET structure is compared with the previously measured experimental data at room temperature. The calculated critical parameters suggest that the proposed device could survive in extreme environments.     

Transport mechanism of reverse surface leakage current in AlGaN/GaN high-electron mobility transistor with SiN passivation

The transport mechanism of reverse surface leakage current in the AlGaN/GaN high-electron mobility transistor(HEMT) becomes one of the most important reliability issues with the downscaling of feature size.In this paper,the research results show that the reverse surface leakage current in AlGaN/GaN HEMT with SiN passivation increases with the enhancement of temperature in the range from 298 K to 423 K.Three possible transport mechanisms are proposed and examined to explain the generation of reverse surface leakage current.By comparing the experimental data with the numerical transport models,it is found that neither Fowler-Nordheim tunneling nor Frenkel-Poole emission can describe the transport of reverse surface leakage current.However,good agreement is found between the experimental data and the two-dimensional variable range hopping(2D-VRH) model.Therefore,it is concluded that the reverse surface leakage current is dominated by the electron hopping through the surface states at the barrier layer.Moreover,the activation energy of surface leakage current is extracted,which is around 0.083 eV.Finally,the SiN passivated HEMT with a high Al composition and a thin AlGaN barrier layer is also studied.It is observed that 2D-VRH still dominates the reverse surface leakage current and the activation energy is around 0.10 eV,which demonstrates that the alteration of the AlGaN barrier layer does not affect the transport mechanism of reverse surface leakage current in this paper.     

太赫兹互补金属氧化物半导体场效应管探测器理论模型中扩散效应研究

针对基于经典动力学理论传统模型中忽略扩散效应的问题,通过对基于玻尔兹曼理论的场效应管传输线模型的理论分析,建立了包含扩散效应的太赫兹互补金属氧化物半导体(CMOS)场效应管探测器理论模型,研究扩散效应对场效应管电导及响应度的影响.同时,将此模型与忽略了扩散效应的传统模型进行了对比仿真模拟,给出了两种模型下的电流响应度随温度及频率变化的差别.依据仿真结果,并结合3σ原则明确了场效应管传输线模型中扩散部分省略的依据和条件.研究结果表明:扩散部分引起的响应度差异大小主要由场效应管的工作温度及工作频率决定.其中工作频率起主要作用,温度变化对差异大小影响较为微弱;而对于工作频率而言,当场效应管工作频率小于1 THz时,模型中的扩散部分可以忽略不计;而当工作频率大于1 THz时,扩散部分不可省略,此时场效应管模型需同时包含漂移、散射及扩散三个物理过程.本文的研究结果为太赫兹CMOS场效应管理论模型的精确建立及模拟提供了理论支持.     

Thermal stability improvement of a multiple finger power SiGe heterojunction bipolar transistor under different power dissipations using non-uniform finger spacing

A method of non-uniform finger spacing is proposed to enhance thermal stability of a multiple finger power SiGe heterojunction bipolar transistor under different power dissipations. Temperature distribution on the emitter fingers of a multi-finger SiGe heterojunction bipolar transistor is studied using a numerical electro-thermal model. The results show that the SiGe heterojunction bipolar transistor with non-uniform finger spacing has a small temperature difference between fingers compared with a traditional uniform finger spacing heterojunction bipolar transistor at the same power dissipation. What is most important is that the ability to improve temperature non-uniformity is not weakened as power dissipation increases. So the method of non-uniform finger spacing is very effective in enhancing the thermal stability and the power handing capability of power device. Experimental results verify our conclusions.     

Single-electron transistors fabricated with sidewall spacer patterning

We have implemented a sidewall spacer patterning method for novel dual-gate single-electron transistor (DGSET) and metal–oxide–semiconductor-based SET (MOSET) based on the uniform SOI wire, using conventional lithography and processing technology. A 30 nm wide silicon quantum wire is defined by a sidewall spacer patterning method, and depletion gates for two tunnel junctions of the DGSET are formed by the doped polycrystalline silicon sidewall. The fabricated DGSET and MOSET show clear single-electron tunneling phenomena at liquid nitrogen temperature and insensitivity of the Coulomb oscillation period to gate bias conditions. On the basis of the phase control capability of the sidewall depletion gates, we have proposed a complementary self-biasing method, which enables the SET/CMOS hybrid multi-valued logic (MVL) to operate perfectly well at high temperature, where the peak-to-valley current ratio of Coulomb oscillation severely decreases. The suggested scheme is evaluated by SPICE simulation with an analytical DGSET model, and it is confirmed that even DGSETs with a large Si island can be utilized efficiently in the multi-valued logic.     

Instability of single-electron memory at low temperatures in Al/AlOx/Al structures

A nanostructure based on a uniform one-dimensional array of ultrasmall tunnel junctions (a single-electron trap) characterized by an ability to maintain an excess charge of several electrons in an island is fabricated and investigated. Changes in the state of the trap are detected by a single-electron transistor. At the working temperature T=35 mK the storage time of a charge state is more than 8 h (which is the duration of the experiment). It is demonstrated that the possible factors limiting the lifetime of a state at temperatures below the typical temperatures for thermal activation include the influence of the random distribution and drift of the effective background charges of the metal islands, as well as the reverse influence discovered here of the transistor on the trap. As the current passing through the transistor increases, the hysteresis loop in the dependence of the charge in the trap on the control voltage narrows. It is noted that an increase in the current from 5 to 300 nA is equivalent to raising the working temperature to 250 mK. Zh. éksp. Teor. Fiz. 111, 344–357 (January 1997)     

2-μm single longitudinal mode GaSb-based laterally coupled distributed feedback laser with regrowth-free shallow-etched gratings by interference lithography

We report a type-I Ga Sb-based laterally coupled distributed-feedback(LC-DFB) laser with shallow-etched gratings operating a continuous wave at room temperature without re-growth process. Second-order Bragg gratings are fabricated alongside the ridge waveguide by interference lithography. Index-coupled LC-DFB laser with a cavity of 1500 μm achieves single longitudinal mode continuous-wave operation at 20℃ with side mode suppression ratio(SMSR) as high as 24 dB.The maximum single mode continuous-wave output power is about 10 mW at room temperature(uncoated facet). A low threshold current density of 230 A/cm~2 is achieved with differential quantum efficiency estimated to be 93 mW/A. The laser shows a good wavelength stability against drive current and working temperature.     

Simulation analysis of a novel fully depleted SOI MOSFET: Electrical and thermal performance improvement through trapezoidally doped channel and silicon–nitride buried insulator

In this paper, we present a novel nano-scale fully depleted silicon-on-insulator metal-oxide semiconductor field-effect transistor (SOI MOSFET). On-state current increment, leakage current decrement, and self-heating effect improvement are pursued in our proposed structure. The structure makes use of a buried insulator layer which consists of two materials to reduce the self-heating effect. On the other hand, to modify the sub- and super-threshold drain current, vertical trapezoidal doping distribution and additional side gate technique are employed. Our novel transistor is named dual material buried insulator vertical trapezoidal doping SOI MOSFET (DV-SOI MOSFET). We investigate the electrical performance and thermal behavior of the DV-SOI MOSFET using a commercial device simulator. We demonstrate that the proposed structure increases on–off current ratio by orders of magnitude and considerably improves self-heating effect in comparison with the conventional uniform doping fully depleted silicon-on-insulator MOSFET (C-SOI) which uses side gate for better electrical performance.     

Low-voltage antimony-doped SnO₂ nanowire transparent transistors gated by microporous SiO₂-based proton conductors

A battery drivable low-voltage transparent lightly antimony(Sb)-doped SnO 2 nanowire electric-double-layer(EDL) field-effect transistor(FET) is fabricated on an ITO glass substrate at room temperature.An ultralow operation voltage of 1 V is obtained on account of an untralarge specific gate capacitance(～2.14 μF/cm 2) directly bound up with mobile ions-induced EDL(sandwiched between the top and bottom electrodes) effect.The transparent FET shows excellent electric characteristics with a field-effect mobility of 54.43 cm 2 /V · s,current on/off ration of 2 × 10 4,and subthreshold gate voltage swing(S = dV gs /d(log I ds)) of 140 mV/decade.The threshold voltage V th(0.1 V) is estimated which indicates that the SnO 2 namowire transistor operates in an n-type enhanced mode.Such a low-voltage transparent nanowire transistor gated by a microporous SiO 2-based solid electrolyte is very promising for battery-powered portable nanoscale sensors.     

Designing power heterojunction bipolar transistors with non-uniform emitter finger lengths to achieve high thermal stability

With the aid of a thermal-electrical model,a practical method for designing multi-finger power heterojunction bipolar transistors with finger lengths divided in groups is proposed.The method can effectively enhance the thermal stability of the devices without sacrificing the design time.Taking a 40-finger heterojunction bipolar transistor for example,the device with non-uniform emitter finger lengths is optimized and fabricated.Both the theoretical and the experimental results show that,for the optimum device,the peak temperature is lowered by 26.19 K and the maximum temperature difference is reduced by 56.67% when compared with the conventional heterojunction bipolar transistor with uniform emitter finger length.Furthermore,the ability to improve the uniformity of the temperature profile and to expand the thermal stable operation range is strengthened as the power level increases,which is ascribed to the improvement of the thermal resistance in the optimum device.A detailed design procedure is also summarized to provide a general guide for designing power heterojunction bipolar transistors with non-uniform finger lengths.     

High-field-induced electron detrapping in An AlGaN/GaN high electron mobility transistor

A step stress test is carried out to study the reliability characteristics of an AlGaN/GaN high electron mobility transistor(HEMT).An anomalous critical drain-to-gate voltage with a negative temperature coefficient is observed in the stress sequence,beyond which the HEMT device starts to recover from degradation induced by early lower voltage stress.While the performance degradation featuring the drain current slump stems from electron trapping in the surface or bulk states during low-to-medium bias stress,the recovery is attributed to high field induced electron detrapping.The carrier detrapping mechanism could be helpful for lessening the trapping-related performance degradation of a GaN-based HEMT.     

大功率GaN基发光二极管的电流扩展效应及电极结构优化研究

定性分析了GaN基LED的电流扩展效应,发现电流密度和电流横向扩展的有效长度对电流均匀扩展有很大影响.基于此,对GaN基大功率LED提出了优化的电极结构,以减缓电流拥挤效应,降低器件串联电阻.通过用红外热像仪测量器件表面的温度分布,发现具有优化的环形插指电极结构的GaN基大功率LED表面温度分布比较均匀,证明芯片接触处电流扩展均匀,局部电流密度降低,减小了焦耳热的产生,增强了器件的可靠性. 关键词： 氮化镓 发光二极管 电流扩展 电极结构优化     

大功率GaN基发光二极管的电流扩展效应及电极结构优化研究

定性分析了GaN基LED的电流扩展效应，发现电流密度和电流横向扩展的有效长度对电流均匀扩展有很大影响.基于此，对GaN基大功率LED提出了优化的电极结构，以减缓电流拥挤效应，降低器件串联电阻.通过用红外热像仪测量器件表面的温度分布，发现具有优化的环形插指电极结构的GaN基大功率LED表面温度分布比较均匀，证明芯片接触处电流扩展均匀，局部电流密度降低，减小了焦耳热的产生，增强了器件的可靠性.     

采用发射极非均匀指间距技术改善功率异质结双极晶体管热稳定性的研究

为了提高多发射极功率异质结双极晶体管的热稳定性,本文利用耦合热阻表征发射极指间距变化对发射极指间热耦合作用的影响,得到了耦合热阻与发射极指间距之间的变化关系,提出了发射极非均匀指间距技术.通过热电反馈模型对采用发射极非均匀指间距技术的功率HBT进行热稳定性分析,得到了多发射极指上的温度分布.结果表明,多发射极HBT在采用非均匀发射极指间距技术后,峰值温度明显下降,温度变化幅度更加平缓,有效地提高了器件的热稳定性. 关键词： 异质结双极晶体管 耦合热阻 指间距