Impact of gate offset in gate recess on DC and RF performance of InAlAs/InGaAs InP-based HEMTs

A set of 100-nm gate-length InP-based high electron mobility transistors (HEMTs) were designed and fabricated with different gate offsets in gate recess. A novel technology was proposed for independent definition of gate recess and T-shaped gate by electron beam lithography. DC and RF measurement was conducted. With the gate offset varying from drain side to source side, the maximum drain current (I_ds,max) and transconductance (g_m,max) increased. In the meantime, f_T decreased while f_max increased, and the highest f_max of 1096 GHz was obtained. It can be explained by the increase of gate-source capacitance and the decrease of gate-drain capacitance and source resistance. Output conductance was also suppressed by gate offset toward source side. This provides simple and flexible device parameter selection for HEMTs of different usages.     

High-frequency enhancement-mode millimeterwave AlGaN/GaN HEMT with an fT/fmax over 100 GHz/200 GHz

Ultra-thin barrier (UTB) 4-nm-AlGaN/GaN normally-off high electron mobility transistors (HEMTs) having a high current gain cut-off frequency (f_T) are demonstrated by the stress-engineered compressive SiN trench technology. The compressive in-situ SiN guarantees the UTB-AlGaN/GaN heterostructure can operate a high electron density of 1.27×10¹³cm^-2, a high uniform sheet resistance of 312.8 Ω /□, but a negative threshold for the short-gate devices fabricated on it. With the lateral stress-engineering by full removing in-situ SiN in the 600-nm SiN trench, the short-gated (70 nm) devices obtain a threshold of 0.2 V, achieving the devices operating at enhancement-mode (E-mode). Meanwhile, the novel device also can operate a large current of 610 mA/mm and a high transconductance of 394 mS/mm for the E-mode devices. Most of all, a high f_T/f_max of 128 GHz/255 GHz is obtained, which is the highest value among the reported E-mode AlGaN/GaN HEMTs. Besides, being together with the 211 GHz/346 GHz of f_T/f_max for the D-mode HEMTs fabricated on the same materials, this design of E/D-mode with the realization of f_max over 200 GHz in this work is the first one that can be used in Q-band mixed-signal application with further optimization. And the minimized processing difference between the E- and D-mode designs the addition of the SiN trench, will promise an enormous competitive advantage in the fabricating costs.     

Enhancement-mode AlGaN/GaN high electronic mobility transistors with thin barrier

An enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMTs) was fabricated with 15-nm AlGaN barrier layer. E-mode operation was achieved by using fluorine plasma treatment and post-gate rapid thermal annealing. The thin barrier depletion-HEMTs with a threshold voltage typically around --1.7 V, which is higher than that of the 22-nm barrier depletion-mode HEMTs (--3.5 V). Therefore, the thin barrier is emerging as an excellent candidate to realize the enhancement-mode operation. With 0.6-μ m gate length, the devices treated by fluorine plasma for 150-W RF power at 150 s exhibited a threshold voltage of 1.3 V. The maximum drain current and maximum transconductance are 300 mA/mm, and 177 mS/mm, respectively. Compared with the 22-nm barrier E-mode devices, V_T of the thin barrier HEMTs is much more stable under the gate step-stress.     

AlGaN/GaN high-electron-mobility transistors with transparent gates by Al-doped ZnO

AlGaN/GaN high-electron-mobility transistors （HEMTs） with Al-doped ZnO （AZO） transparent gate electrodes are fabricated, and Ni/Au/Ni-gated HEMTs are produced in comparison. The AZO-gated HEMTs show good DC characteristics and Schottky rectifying characteristics, and the gate electrodes achieve excellent transparencies. Compared with Ni/Au/Ni-gated HEMTs, AZO-gated HEMTs show a low saturation current, high threshold voltage, high Schottky barrier height, and low gate reverse leakage current. Due to the higher gate resistivity, AZO-gated HEMTs exhibit a current-gain cutoff frequency （fT） of 10 GHz and a power gain cutoff frequency （fmax） of 5 GHz, and lower maximum oscillation frequency than Ni/Au/Ni-gated HEMTs. Moreover, the C-V characteristics are measured and the gate interface characteristics of the AZO-gated devices are investigated by a C-V dual sweep.     

Heterogeneous integration of InP HEMTs on quartz wafer using BCB bonding technology

Heterogeneous integrated InP high electron mobility transistors(HEMTs)on quartz wafers are fabricated successfully by using a reverse-grown InP epitaxial structure and benzocyclobutene(BCB)bonding technology.The channel of the new device is In_0.7Ga_0.3As,and the gate length is 100 nm.A maximum extrinsic transconductance gm,max of 855.5 mS/mm and a maximum drain current of 536.5 mA/mm are obtained.The current gain cutoff frequency is as high as 262 GHz and the maximum oscillation frequency reaches 288 GHz.In addition,a small signal equivalent circuit model of heterogeneous integration of InP HEMTs on quartz wafer is built to characterize device performance.     

High power-added-efficiency AlGaN/GaN HEMTs fabricated by atomic level controlled etching

An atomic-level controlled etching(ACE)technology is invstigated for the fabrication of recessed gate AlGaN/GaN high-electron-mobility transistors(HEMTs)with high power added efficiency.We compare the recessed gate HEMTs with conventional etching(CE)based chlorine,Cl₂-only ACE and BCl³/Cl₂ACE,respectively.The mixed radicals of BCl₃/Cl₂were used as the active reactants in the step of chemical modification.For ensuring precise and controllable etching depth and low etching damage,the kinetic energy of argon ions was accurately controlled.These argon ions were used precisely to remove the chemical modified surface atomic layer.Compared to the HEMTs with CE,the characteristics of devices fabricated by ACE are significantly improved,which benefits from significant reduction of etching damage.For BCl₃/Cl₂ACE recessed HEMTs,the load pull test at 17 GHz shows a high power added efficiency(PAE)of 59.8%with an output power density of 1.6 W/mm at Vd=10 V,and a peak PAE of 44.8%with an output power density of 3.2 W/mm at Vd=20 V in a continuous-wave mode.     

阶梯AlGaN外延新型Al0.25Ga0.75N/GaNHEMTs器件实验研究

本文报道了作者提出的阶梯AlGaN外延层新型AlGaN/GaN HEMTs结构的实验结果. 实验利用感应耦合等离子体刻蚀(ICP)刻蚀栅边缘的AlGaN外延层, 形成阶梯的AlGaN 外延层结构, 获得浓度分区的沟道2DEG, 使得阶梯AlGaN外延层边缘出现新的电场峰, 有效降低栅边缘的高峰电场, 从而优化了AlGaN/GaN HEMTs器件的表面电场分布. 实验获得了阈值电压-1.5 V的新型AlGaN/GaN HEMTs器件. 经过测试, 同样面积的器件击穿电压从传统结构的67 V提高到新结构的106 V, 提高了58%左右; 脉冲测试下电流崩塌量也比传统结构减少了30%左右, 电流崩塌效应得到了一定的缓解.     

Improved device performance of recessed-gate AlGaN/GaN HEMTs by using in-situ N2O radical treatment

The N₂O radicals in-situ treatment on gate region has been employed to improve device performance of recessed-gate AlGaN/GaN high-electron-mobility transistors (HEMTs). The samples after gate recess etching were treated by N₂O radicals without physical bombardment. After in-situ treatment (IST) processing, the gate leakage currents decreased by more than one order of magnitude compared to the sample without IST. The fabricated HEMTs with the IST process show a low reverse gate current of 10^-9 A/mm, high on/off current ratio of 10⁸, and high f_T×L_g of 13.44 GHz· μm. A transmission electron microscope (TEM) imaging illustrates an oxide layer with a thickness of 1.8 nm exists at the AlGaN surface. X-ray photoelectron spectroscopy (XPS) measurement shows that the content of the Al-O and Ga-O bonds elevated after IST, indicating that the Al-N and Ga-N bonds on the AlGaN surface were broken and meanwhile the Al-O and Ga-O bonds formed. The oxide formed by a chemical reaction between radicals and the surface of the AlGaN barrier layer is responsible for improved device characteristics.     

基于脉冲方法的超短栅长GaN基高电子迁移率晶体管陷阱效应机理

陷阱效应导致的电流崩塌是制约GaN基微波功率电子器件性能提高的一个重要因素,研究深能级陷阱行为对材料生长和器件开发具有非常重要的意义.随着器件频率的提升,器件尺寸不断缩小,对小尺寸器件中深能级陷阱的表征变得越发困难.本文制备了超短栅长（L_g=80 nm）的AlGaN/GaN金属氧化物半导体高电子迁移率晶体管（MOSHEMT）,并基于脉冲I-V测试和二维数值瞬态仿真对器件的动态特性进行了深入研究,分析了深能级陷阱对AlGaN/GaN MOSHEMT器件动态特性的影响以及相关陷阱效应的内在物理机制.结果表明,AlGaN/GaN MOSHEMT器件的电流崩塌随着栅极静态偏置电压的增加呈非单调变化趋势,这是由栅漏电注入和热电子注入两种陷阱机制共同作用的结果.根据研究结果推断,可通过改善栅介质的质量以减小栅漏电或提高外延材料质量以减少缺陷密度等措施达到抑制陷阱效应的目的,从而进一步抑制电流崩塌.     

单轴应变硅N沟道金属氧化物半导体场效应晶体管电容特性模型

电容特性模型是单轴应变硅金属氧化物半导体场效应晶体管(Si MOSFET)和电路进行瞬态分析、交流小信号分析、噪声分析等的重要基础. 本文首先建立了单轴应变Si NMOSFET 的16 个微分电容模型, 并将微分电容的仿真结果与实验结果进行了比较, 验证了所建模型的正确性. 同时对其中的关键性栅电容C_gg 与应力强度、偏置电压、沟道长度、栅极掺杂浓度等的关系进行了分析研究. 结果表明, 与体硅器件相比, 应变的引入使得单轴应变Si NMOSFET器件的栅电容增大, 随偏置电压、沟道长度、栅极掺杂浓度的变化趋势保持不变.     

Performance of La₂O₃/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors

We report on the performance of La2O3/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors(MOSHEMTs) and InAlN/GaN high electron mobility transistors(HEMTs).The MOSHEMT presents a maximum drain current of 961 mA/mm at Vgs = 4 V and a maximum transconductance of 130 mS/mm compared with 710 mA/mm at Vgs = 1 V and 131 mS/mm for the HEMT device,while the gate leakage current in the reverse direction could be reduced by four orders of magnitude.Compared with the HEMT device of a similar geometry,MOSHEMT presents a large gate voltage swing and negligible current collapse.     

单晶金刚石氢终端场效应晶体管特性

基于微波等离子体化学气相淀积生长的单晶金刚石制作了栅长为2μm的耗尽型氢终端金刚石场效应晶体管,并对器件特性进行了分析.器件的饱和漏电流在栅压为-6 V时达到了96 mA/mm,但是在-6 V时栅泄漏电流过大.在-3.5 V的安全工作栅压下,饱和漏电流达到了77 mA/mm.在器件的饱和区,宽5.9 V的栅电压范围内,跨导随着栅电压的增加而近线性增大到30 mS/mm.通过对器件导通电阻和电容-电压特性的分析,氢终端单晶金刚石的二维空穴气浓度达到了1.99×10~(13)cm~(-2),并且迁移率和载流子浓度均随着栅压向正偏方向的移动而逐渐增大.分析认为,沟道中高密度的载流子、大的栅电容以及迁移率的逐渐增加是引起跨导在很大的栅压范围内近线性增加的原因.     

DC and analog/RF performance of C-shaped pocket TFET (CSP-TFET) with fully overlapping gate

A C-shaped pocket tunnel field effect transistor (CSP-TFET) has been designed and optimized based on the traditional double-gate TFETs by introducing a C-shaped pocket region between the source and channel to improve the device performance. A gate-to-pocket overlapping structure is also examined in the proposed CSP-TFET to enhance the gate controllability. The effects of the pocket length, pocket doping concentration and gate-to-pocket overlapping structure on the DC and analog/RF characteristics of the CSP-TFET are estimated after calibrating the tunneling model in double-gate TFETs. The DC and analog/RF performance such as on-state current (I_on), on/off current ratio (I_on/I_off), subthreshold swing (SS) transconductance (g_m), cut-off frequency (f_T) and gain-bandwidth product (GBP) are investigated. The optimized CSPTFET device exhibits excellent performance with high I_on (9.98×10 ^{- 4} A/μm), high I_on/I_off (～ 10¹¹), as well as low SS (～ 12 mV/dec). The results reveal that the CSP-TFET device could be a potential alternative for the next generation of semiconductor devices.     

场板结构AlGaN/GaN HEMT的电流崩塌机理

在不同的漏偏压下，研究了钝化和不同场板尺寸AlGaN/GaN HEMT对电流崩塌的抑制能力.实验结果表明，钝化器件对电流崩塌的抑制能力随着漏偏压的升高而显著下降；在高漏偏压下，场板的尺寸对器件抑制崩塌的能力有较大影响，而合适尺寸的场板结构在各个漏偏压下都能够很好的抑制电流崩塌.深入分析发现，场板结构不仅能够抑制虚栅的充电过程，而且提供了放电途径，有利于虚栅的放电，从而抑制电流崩塌.在此基础上，通过建立场板介质对虚栅放电的模型，解释了高漏偏压下场板的尺寸对器件抑制崩塌的能力有较大影响的原因.     

场板结构AlGaN/GaN HEMT的电流崩塌机理

在不同的漏偏压下,研究了钝化和不同场板尺寸AlGaN/GaN HEMT对电流崩塌的抑制能力.实验结果表明,钝化器件对电流崩塌的抑制能力随着漏偏压的升高而显著下降;在高漏偏压下,场板的尺寸对器件抑制崩塌的能力有较大影响,而合适尺寸的场板结构在各个漏偏压下都能够很好的抑制电流崩塌.深入分析发现,场板结构不仅能够抑制虚栅的充电过程,而且提供了放电途径,有利于虚栅的放电,从而抑制电流崩塌.在此基础上,通过建立场板介质对虚栅放电的模型,解释了高漏偏压下场板的尺寸对器件抑制崩塌的能力有较大影响的原因. 关键词： AlGaN/GaN HEMT 场板 电流崩塌     

Ni/Au Schottky gate oxidation and BCB passivation for high-breakdown-voltage AlGaN/GaN HEMT

A new AlGaN/GaN high electron mobility transistor (HEMT) employing Ni/Au Schottky gate oxidation and benzocyclobutene (BCB) passivation is fabricated in order to increase a breakdown voltage and forward drain current. The Ni/Au Schottky gate metal with a thickness of 50/300 nm is oxidized under oxygen ambient at 500 C and the highly resistive NiO is formed at the gate edge. The leakage current of AlGaN/GaN HEMTs is decreased from 4.94 μA to 3.34 nA due to the formation of NiO. The BCB, which has a low dielectric constant, successfully passivates AlGaN/GaN HEMTs by suppressing electron injection into surface states. The BCB passivation layer has a low capacitance, so BCB passivation increases the switching speed of AlGaN/GaN HEMTs compared with silicon nitride passivation, which has a high dielectric constant. The forward drain current of a BCB-passivated device is 199 mA /mm, while that of an unpassivated device is 172 mA /mm due to the increase in two-dimensional electron gas (2DEG) charge.     

Generalized Einstein manifolds

A Finslerian manifold is called a generalized Einstein manifold (GEM) if the Ricci directional curvature R(u,u) is independent of the direction. Let F⁰(M, g_t) be a deformation of a compact n-dimensional Finslerian manifold preserving the volume of the unitary fibre bundle W(M). We prove that the critical points g₀ F⁰(g_t) of the integral I(g_t) on W(M) of the Finslerian scalar curvature (and certain functions of the scalar curvature) define a GEM. We give an estimate of the eigenvalues of Laplacian Δ defined on W(M) operating on the functions coming from the base when (M, g) is of minima fibration with a constant scalar curvature H admitting a conformal infinitesimal deformation (CID). We obtain λ ≥ H/(n − 1) (Δf = λf). If M is simply connected and λ = H/(n − 1), then (M, g) is Riemannian and is isometric to an n-sphere. We first calculate, in the general case, the formula of the second variationals of the integral I (g_t) for G = g₀, then for a CID we show that for certain Finslerian manifolds, I″(g₀) > 0. Applications to the gravitation and electromagnetism in general relativity are given. We prove that the spaces characterizing Einstein-Maxwell equations are GEMs.     

Performance of La2O3/InAlN/GaN metal—oxide—semiconductor high electron mobility transistors

We report on the performance of La2O3/InAlN/GaN metal-oxide-semiconductor high electron mobility transistors(MOSHEMTs) and InAlN/GaN high electron mobility transistors(HEMTs).The MOSHEMT presents a maximum drain current of 961 mA/mm at Vgs = 4 V and a maximum transconductance of 130 mS/mm compared with 710 mA/mm at Vgs = 1 V and 131 mS/mm for the HEMT device,while the gate leakage current in the reverse direction could be reduced by four orders of magnitude.Compared with the HEMT device of a similar geometry,MOSHEMT presents a large gate voltage swing and negligible current collapse.     

Investigation on threshold voltage of p-channel GaN MOSFETs based on p-GaN/AlGaN/GaN heterostructure

The threshold voltage (V_th) of the p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) is investigated via Silvaco-Atlas simulations. The main factors which influence the threshold voltage of p-channel GaN MOSFETs are barrier height Φ_1,p, polarization charge density σ_b, and equivalent unite capacitance C_oc. It is found that the thinner thickness of p-GaN layer and oxide layer will acquire the more negative threshold voltage V_th, and threshold voltage |V_th| increases with the reduction in p-GaN doping concentration and the work-function of gate metal. Meanwhile, the increase in gate dielectric relative permittivity may cause the increase in threshold voltage |V_th|. Additionally, the parameter influencing output current most is the p-GaN doping concentration, and the maximum current density is 9.5 mA/mm with p-type doping concentration of 9.5×10¹⁶ cm^-3 at V_GS = -12 V and V_DS = -10 V.     

氢化非晶硅薄膜晶体管的低频噪声特性

针对氢化非晶硅薄膜晶体管(hydrogenated amorphous silicon thin film transistor,a-Si:H TFT)的低频噪声特性展开实验研究.由测量结果可知,a-Si:H TFT的低频噪声特性遵循1/f~γ(f为频率,γ≈0.92)的变化规律,主要受迁移率随机涨落效应的影响.基于与迁移率涨落相关的载流子数随机涨落模型(?N-?μ模型),在考虑源漏接触电阻、局域态俘获及释放载流子效应等情况时,对器件低频噪声特性随沟道电流的变化进行分析与拟合.基于a-Si:H TFT的亚阈区电流-电压特性提取器件表面能带弯曲量与栅源电压之间的关系,通过沟道电流噪声功率谱密度提取a-Si:H TFT有源层内局域态密度及其分布.实验结果表明:局域态在禁带内随能量呈e指数变化,两种缺陷态在导带底密度分别约为6.31×10~(18)和1.26×10~(18)cm~(-3)·eV~(-1),特征温度分别约为192和290 K,这符合非晶硅层内带尾态密度及其分布特征.最后提取器件的平均Hooge因子,为评价非晶硅材料及其稳定性提供参考.