Enhanced light extraction of GaN-based light-emitting diodes with periodic textured SiO_2 on Al-doped ZnO transparent conductive layer

We report an effective enhancement in light extraction of Ga N-based light-emitting diodes(LEDs) with an Al-doped Zn O(AZO) transparent conductive layer by incorporating a top regular textured SiO_2 layer. The 2 inch transparent throughpore anodic aluminum oxide(AAO) membrane was fabricated and used as the etching mask. The periodic pore with a pitch of about 410 nm was successfully transferred to the surface of the SiO_2 layer without any etching damages to the AZO layer and the electrodes. The light output power was enhanced by 19% at 20 m A and 56% at 100 m A compared to that of the planar LEDs without a patterned surface. This approach offers a technique to fabricate a low-cost and large-area regular pattern on the LED chip for achieving enhanced light extraction without an obvious increase of the forward voltage.     

Exciton diffusion dynamics in quantum nanostructures on V-groove patterned substrates

Time-resolved photoluminescence (PL) measurements were performed for two different quantum nanostructures on V-groove patterned substrates; SiGe/Si quantum wells (QWs) on V-grooved Si substrates and AlGaAs spontaneous vertical quantum wells on V-grooved GaAs substrates. Anomalous behaviours of the PL, such as the decrease of the decay time of the SiGe (111) QWs and the (111)A AlGaAs layer, were fully explained by taking the exciton diffusion towards the bottom of the V-groove into account, showing that the exciton diffusion driven by the spatial nonuniformity of the alloy compositions and/or geometry of the substrates is a key to controlling the PL properties of the nanostructures.     

CVD法制备硅基氮化镓薄膜

利用化学气相沉积法(CVD),分别以三氧化二镓(Ga₂O₃)和氨气(NH₃)为镓源和氮源在硅衬底合成了一种由片状微晶构成的氮化镓(GaN)薄膜,实验中没有使用缓冲层。通过场发射扫描电子显微镜(FESEM)、电子能量散射谱(EDS)、X射线衍射(XRD)、高分辨电镜(HRTEM)和光致发光谱(PL)对样品进行分析,生成物为质量较好的富镓的纯氮化镓薄膜。片状氮化镓微晶表面大小约数百纳米,厚度数十纳米,薄膜表面平整、致密,没有裂纹或龟裂现象,与Si衬底结合紧密。氮化镓薄膜的带边峰位于367nm处,同时出现了黄光发射峰。并对此种氮化镓薄膜的生长机理进行了探讨。     

Blue laser lithography for making antireflective submicron structures on silicon

The application of blue laser lithography for creating antireflective submicron structures on a crystalline silicon substrate was evaluated. The assembled blue laser lithography system was obtained by modifying a commercial blue laser optical pickup head and consisting of a 405-nm-wavelength blue laser and a 0.85-numerical-aperture objective lens. Si substrates were patterned with submicron column patterns of various periods and aspect ratios by blue laser lithography using a sputtered Ge-Sb-Sn-O layer as a resist. The reflectance of the patterned Si substrate decreased to 3% on average in the 300–1000 nm wavelength range, with a low sensitivity to the angle of incident light. Such patterned substrates showed potential for application in crystalline Si solar cells.     

AlN缓冲层对Si基GaN外延薄膜性质的影响

采用金属有机化合物化学气相沉积（MOCVD）方法制备了不同AlN缓冲层厚度的GaN样品,研究了AlN缓冲层厚度对GaN外延层的应力、表面形貌和晶体质量的影响。研究结果表明：厚度为15 nm的AlN缓冲层不仅可以有效抑制Si扩散,而且还给GaN外延层提供了一个较大的压应力,避免GaN薄膜出现裂纹。在该厚度AlN缓冲层上制备的GaN薄膜表面光亮、无裂纹,受到的张应力为0.3 GPa,（0002）和（1012）面的高分辨X射线衍射摇摆曲线峰值半高宽分别为536 arcsec和594 arcsec,原子力显微镜测试得到表面粗糙度为0.2 nm。     

Annealing study of two-dimensional patterned Ge nanostructures via nanosphere lithography

Experimental studies on patterning hexagonal Ge nanostructures have been conducted on Si substrates through deposition of Ge with colloidal particles as a mask. The deposited Ge thin film possesses, according to the X-ray diffraction measurements, in plane texture, being epitaxial and aligned with the (111) Si substrate. The size distribution of the patterned Ge nanostructures is narrow, as indicated by the atomic force microscopy and scanning electron microscopy measurements. We have obtained Ge nanostructures with lateral dimension of 490 nm (height 12 nm), 200 nm (height 6 nm) and 82 nm (height 6 nm) by using different sizes of polystyrene spheres. We have performed in depth studies of the Ge nanostructures’ behavior due to thermal and rapid thermal post-annealing processes. FT micro-Raman spectroscopy shows that there is no Si intermixing during the annealing process. In order to quantify the changes in the height and lateral dimension, we have performed atomic force microscopy and white light interferometry analysis. The changes in shape and the decrease in the area of a cross-section of Ge nanostructure will be discussed in respect to similar results shown in the literature for Ge thin films during the annealing process.     

硅(001)图形衬底上锗硅纳米线的定位生长

纳米线的定位生长是实现纳米线量子器件寻址和集成的前提.结合自上而下的纳米加工和自下而上的自组装技术,通过分子束外延生长方法,在具有周期性凹槽结构的硅(001)图形衬底上首先低温生长硅锗薄膜然后升温退火,实现了有序锗硅纳米线在凹槽中的定位生长,锗硅纳米线的表面晶面为(105)晶面.详细研究了退火温度、硅锗的比例及图形周期对纳米线形成与否,以及纳米线尺寸的影响.     

Read—out of a read—only super—resolution optical disc with a Si mask

A novel read-only super-resolution optical disc structure (substrate/mask layer/dielectric layer) is proposed in this paper. By using a Si thin film as the mask layer, the recording pits with a diameter 380nm and a depth 50nm are read out on the dynamic measuring equipment; the laser wavelength α is 632.8nm and the numerical aperture is 0.40. In the course of reproduction, the laser power is 5mW and the rotation velocity of the disc is 4m·s^-1. The optimum thickness of the Si thin film is 18nm and the signal-to-noise ratio is 32dB.     

图形衬底量子线生长制备与荧光特性研究

报道了在V型槽图形衬底上利用分子束外延技术外延生长的GaAs/AlGaAs量子线.外延截面在扫描电子显微镜下可以看到在V型槽底部形成了弯月型量子线结构,量子线尺寸约为底边60 nm高14 nm的近三角形.低温87 K下光致发光谱测试在793.7和799.5 nm处出现峰值,验证了量子线的存在.理论近似计算结果显示,相比等宽度量子阱有8 meV的蓝移正是由于横向量子限制引起的. 关键词： V型槽图形衬底 量子线 GaAs     

Ordering of Ge nanocrystals using FIB nanolithography

Formation and ordering of Ge nanocrystals (NC) are studied on Si(0 0 1) and SiO₂/Si(0 0 1) substrates patterned by focused ion beam (FIB). In both cases we use a three step process consisting of FIB milling of hole patterns with various periodicities, ex-situ substrate cleaning to remove Ga contamination and Ge NC growth by molecular beam epitaxy (MBE). We show that Ge NC can be ordered between or inside the holes on patterned Si(0 0 1) substrates and inside the holes on patterned SiO₂/Si(0 0 1) substrates.     

激光干涉结晶技术制备二维有序分布纳米硅阵列

利用结合移相光栅掩模 (PSGM) 的激光结晶技术在超薄a-SiN_x/a-Si:H/ a-SiN _x三明治结构样品中制备出二维有序分布的纳米硅阵列.原始样品是用等离子体 增强化学气相淀积法生长.a-Si:H层厚为10nm，a-SiN_x 为50nm，衬底材料为SiO ₂/Si或 熔凝石英.原子力显微镜、剖面透射电子显微镜、高分辨透射电子显微镜对样品表面形貌和 微结构的观测结果表明，采用该方法可以在原始淀积的a-Si:H层中得到位置可控的晶化区域 ：每个晶化区域直径约250nm，具有同PSGM一致的2μm周期；晶化区域内形成的纳米硅 颗粒尺寸接近原始淀积的a-Si:H层厚，且晶粒的择优取向为<111>. 关键词： 纳米硅 激光结晶 定域晶化 移相光栅     

场发射栅孔阵列的制备

 采用硅的局部氧化技术以及湿法刻蚀技术,利用2.6 μm的光刻掩模板在n型硅片上形成了栅极孔径为1 μm的场发射阴极的栅极空腔阵列,实现了用大阵点尺寸的栅极掩模板制备较小尺寸栅孔阵列。硅的湿法刻蚀溶液采用各向同性的硝酸和氢氟酸混合溶液,刻蚀后空腔的深度和宽度均随刻蚀时间线性增加。同时,由于刻蚀溶液具有较高的Si/SiO₂ 刻蚀选择比,栅极孔径随刻蚀时间增大的速度远低于深度和宽度增大的速度,栅极孔径主要取决于掩模的尺寸和氧化层的厚度。通过选择掩模板的尺寸以及氧化层的厚度,采用局部氧化技术和湿法刻蚀技术能够制备出微米或亚微米的场发射阴极的栅极空腔阵列。     

Mechano-chemical AFM nanolithography of metallic thin films: A statistical analysis

A mechano-chemical atomic force microscope (AFM) nanolithography on a metallic thin film (50 nm in thickness) covered by a spin-coated soft polymeric mask layer (50–60 nm in thickness) has been introduced. The surface stochastic properties of initial grooves mechanically patterned on the mask layer (grooves before chemical wet-etching) and the lithographed patterns on the metallic thin film (the grooves after chemical wet-etching) have been investigated and compared by using the structure factor, power spectral density, and AFM tip deconvolution analyses. The effective shape of cross section of the before and after etching grooves have been determined by using the tip deconvolution surface analysis. The wet-etching process improved the shape of the grooves and also smoothed the surface within them. We have indicated that relaxation of the surface tension of the deposited mask layer after the AFM scribing is independent from surface density of the grooves and also their length scale. Based on the statistical analysis, it was found that increase of the width of the grooves after the wet-etching and also relaxation of surface tension of the mask layer resulted in a down limit in the size of the metallic nanowires made by the combined nanolithography method. An extrapolation of the analyzed statistical data has indicated that, in this method, the minimum obtainable width and length of the metallic nanowires are about 55 nm and 2 μm, respectively.     

Optimization of a guided-mode resonance filter by varying the thickness of the buffer layer

In this Letter, we demonstrate that by adjusting the thickness of the buffer layer, the optical responses of a guided-mode resonance filter(GMRF) can be improved for sensor applications. The GMRF is fabricated using a replica molding with a plastic substrate and a UV-curable polymer. SiO_2 buffer layers of different thicknesses are deposited before the waveguide-layer deposition. The sensitivity of the GMRFs decreases slightly with increasing SiO_2 layer thickness. By contrast, the full width at half-maximum reduces substantially with increasing SiO_2 layer thickness, resulting in the improvement of the overall figure of merit.     

Temperature-dependent photoluminescence spectra of GaN epitaxial layer grown on Si(111) substrate

In this paper, the temperature-dependent photoluminescence(PL) properties of Ga N grown on Si(111) substrate are studied. The main emission peaks of Ga N films grown on Si(111) are investigated and compared with those grown on sapphire substrates. The positions of free and bound exciton luminescence peaks, i.e., FX A and D0 X peaks, of Ga N films grown on Si(111) substrates undergo red shifts compared with those grown on sapphire. This is attributed to the fact that the Ga N films grown on sapphire are under the action of compressive stress, while those grown on Si(111) substrate are subjected to tensile stress. Furthermore, the positions of these peaks may be additionally shifted due to different stress conditions in the real sample growth. The emission peaks due to stacking faults are found in Ga N films grown on Si(111) and an S-shaped temperature dependence of PL spectra can be observed, owing to the influence of the quantum well(QW) emission by the localized states near the conduction band gap edge and the temperature-dependent distribution of the photo-generated carriers.     

Growth of silica nanowire arrays by reaction of Si substrate with oxygen using Ga as catalyst

Silica nanowire arrays were grown by oxidizing Si substrates with Ga catalyst in temperatures of 520–900 °C. The Si substrates, painted with a layer of molten Ga, were placed on a quartz boat, and heated up in a tube furnace. At high temperatures, Ga atoms condense into spheres, along with a small amount of silicon atoms. Si–O–Ga then formed on the surface of Ga–Si alloy sphere, and silica nanowire arrays were eventually grown with typical diameters of about 15–20 nm. A growth model based on extended vapor–liquid–solid mechanism is suggested.     

Fabrication of Nanoimprint Stamp Using Interference Lithography

Interference lithography is used to fabricate a nanoimprint stamp, which is a key step for nanoimprint lithography. A layer of chromium in thickness of about 20 nm is deposited on the newly cleaned fused silica substrate by thermal evaporation, and a layer of positive resist in thickness of 150nm is spun on the chromium layer. Some patterns, including lines, holes and pillars, are observed on the photoresist film by exposing the resist to interference patterns and they are then transferred to the chromium layer by wet etching. Fused silica stamps are fabricated by reactive ion etching with CHF3/O2 as etchants using the chromium layer as etch mask. An atomic force microscope is used to analyse the pattern transfer in each step. The results show that regular hole patterns of fused silica, with average full width 143nm at half maximum （FWHM）, average hole depth of 76nm and spacing of 450nm, have been fabricated. The exposure method is fast, inexpensive and applicable for fabrication of nanoimprint stamps with large areas.     

Electrical performance of Ti/Pt thin films on glass-ceramic substrates after high temperature loading

In this study, the influence of post-deposition annealings (PDA) up to temperatures of T _PDA=700°C on the room-temperature resistivity of e-beam evaporated titanium/platinum (Ti/Pt) bi-layers on low temperature co-fired (LTCC) substrates covered with a glass encapsulate is investigated. The thickness of the platinum top layer is varied between 24 and 95 nm (titanium film thickness: 5 nm) and between 23 and 90 nm (titanium film thickness: 15 nm), respectively. In the “as-deposited” state and up to post-deposition annealing temperatures of T _PDA=450°C, the film resistivity is linearly correlated with the reciprocal value of the platinum film thickness according to the size effect. When applying, however, solely the Fuchs-Sondheimer model for evaluation, the effective mean free path for electrons is substantially above the value reported for crystalline platinum at room temperature. Compared to similar investigations on smooth Si/SiO₂ substrates yielding interpretable results within this theoretical approach, this is due to the increase of the thickness-dependent fraction in film resistivity which is strongly affected by the enhanced LTCC/glass surface roughness. At T _PDA>600°C, diffusion of titanium into the platinum top layer and the roughening of the LTCC/glass substrate dominate the electrical behavior, both causing an increase in film resistivity above average. In contrast to Si/SiO₂ substrates, thermal induced grooving effects in the Pt top layer play a minor role as the temperature coefficients of expansion of metallization and glass-ceramic substrate match better and the effective temperature difference for stress generation is lower due a glass softening temperature of about 450°C.     

离子束溅射沉积Ir膜真空紫外反射特性研究

根据吸收材料基底上单层金属膜数学计算模型,对不同基片上各种厚度的Ir膜真空紫外反射率进行了优化计算.采用离子束溅射沉积技术,在石英、K9玻璃和Si基片上沉积了不同厚度的Ir膜,研究了基片、表面厚度、离子束能量及镀后热处理对Ir膜反射率的影响,在波长120 nm处获得了近30％正入射反射率.     

硅衬底氮化镓基LED薄膜转移至柔性黏结层基板后其应力及发光性能变化的研究

本文将硅(Si)衬底上外延生长的氮化镓(GaN)基发光二极管(LED)薄膜转移至含有柔性黏结层的基板上, 获得了不受衬底和支撑基板束缚的LED薄膜. 利用高分辨率X射线衍射仪(HRXRD)研究了薄膜转移前后的应力变化, 同时对其光致发光(PL)光谱的特性进行了研究. 结果表明: 硅衬底GaN基LED薄膜转移至柔性基板后, GaN受到的应力会由转移前巨大的张应力变为转移后微小的压应力, InGaN/GaN量子阱受到的压应力则增大; 尽管LED薄膜室温无损转移至柔性基板其InGaN阱层的In组分不会改变, 然而按照HRXRD倒易空间图谱通用计算方法会得出平均铟组发生了变化; GaN基LED薄膜从外延片转移至柔性基板时其PL谱会发生明显红移.