Total Dose Radiation Tolerance of Phase Change Memory Cell with GeSbTe Alloy

Phase change memory （PCM） cell array is fabricated by a standard complementary metal-oxide-semiconductor process and the subsequent special fabrication technique. A chalcogenide Ge2Sb2Te5 film in thickness 50hm deposited by rf magnetron sputtering is used as storage medium for the PCM cell. Large snap-back effect is observed in current-voltage characteristics, indicating the phase transition from an amorphous state （higher resistance state） to the crystalline state （lower resistance state）. The resistance of amorphous state is two orders of magnitude larger than that of the crystalline state from the resistance measurement, and the threshold current needed for phase transition of our fabricated PCM cell array is very low （only several μA）. An x-ray total dose radiation test is carried out on the PCM cell array and the results show that this kind of PCM cell has excellent total dose radiation tolerance with total dose up to 2 ×10^6 rad（Si）, which makes it attractive for space-based applications.     

Chalcogenide Random Access Memory Cell with Structure of W Sub-Microtube Heater Electrode

In order to reduce the reset current of cllalcogenide random access memory; a W sub-microtube heater electrode with outer/inner diameter of 260/100nm, which was fabricated with standard 0.184-μm technology, is proposed for the first time to achieve a reset current of about 0.5 mA. The reasons may be that sub-microtube increases the number of electrode edge and thermal efficiency is improved greatly because the thermal density on the edge of sub-microtube electrode is generally the highest.     

Remarkable Resistance Change in Plasma Oxidized TiOx/TiNx Film for Memory Application

We report the experimental phenomenon of large resistance change in plasma oxidized TiOx/TiNx film fabricated on W bottom-electrode-contact （W-BEC） array. The W-BEC in diameter 26Ohm is fabricated by a 0.18μm CMOS technology, and the TiOx/TiNx cell array is formed by rf magnetron sputtering and reactive ion etching. In current-voltage （I- V） measurement for current-sweeping mode, large snap-back of voltage is observed, which indicates that the sample changes from high-resistance state （HRS） to low-resistance state （LRS）. In the I-V measurement for voltage-sweeping mode, large current collapse is observed, which indicates that the sample changes from LRS to HRS. The current difference between HRS and LRS is about two orders. The threshold current and voltage for the resistance change is about 5.0- 10^-5 A and 2.5 V, respectively. The pulse voltage can also change the resistance and the pulse time is as shorter as 30 ns for the resistance change. These properties of TiOx/TiNx film are comparable to that of conventional phase-change material, which makes it possible for RRAM application.     

氮化硅介质中双层纳米硅薄膜的两级电荷存储

研究镶嵌在超薄非晶氮化硅(a-SiN_x)层之间的双层纳米硅(nc-Si)的电荷存储现象.利用等离子体增强化学气相淀积(PECVD)技术在硅衬底上制备a-SiN_x/a-Si/a-SiN_x/a-Si/a-SiN_x多层薄膜结构.采用常规热退火方法使非晶硅(a-Si)层晶化，形成包含双层nc-Si的金属-氮化物-半导体(MIS)结构.通过电容电压(C-V)特性测量，观测到该结构中由于电荷存储引起的C-V回滞现象，并在室温下成功观察到载流子基于Fowler-Nordheim(F-N)隧穿注入到第一层、第二层nc-Si的两级电荷存储状态.结合电流电压(I-V)特性的测量，对电荷存储的机理进行了深入分析. 关键词： 纳米硅 氮化硅 电容电压法 电流电压法     

激光干涉结晶技术制备二维有序分布纳米硅阵列

利用结合移相光栅掩模 (PSGM) 的激光结晶技术在超薄a-SiN_x/a-Si:H/ a-SiN _x三明治结构样品中制备出二维有序分布的纳米硅阵列.原始样品是用等离子体 增强化学气相淀积法生长.a-Si:H层厚为10nm，a-SiN_x 为50nm，衬底材料为SiO ₂/Si或 熔凝石英.原子力显微镜、剖面透射电子显微镜、高分辨透射电子显微镜对样品表面形貌和 微结构的观测结果表明，采用该方法可以在原始淀积的a-Si:H层中得到位置可控的晶化区域 ：每个晶化区域直径约250nm，具有同PSGM一致的2μm周期；晶化区域内形成的纳米硅 颗粒尺寸接近原始淀积的a-Si:H层厚，且晶粒的择优取向为<111>. 关键词： 纳米硅 激光结晶 定域晶化 移相光栅     

Ge1Sb2Te4 Based Chalcogenide Random Access Memory Array Fabricated by 0.18-μm CMOS Technology

Ge1Sb2Te4-based chalcogenide random access memory array, with a tungsten heating electrode of 260hm in diameter, is fabricated by 0.18-μm CMOS technology. Electrical performance of the device, as web as physical and electrical properties of GelSb2 Te4 thin film, is characterized. SET and RESET programming currents are 1.6 and 4.1 mA, respectively, when pulse width is 100 ns. Both the values are larger than those of the Ge2Sb2 Tesbased ones with the same structure and contact size. Endurance up to 106 cycles with a resistance ratio of about 100 has been achieved.     

带隙可调的CdS纳米晶薄膜的化学浴制备和光学性质

CdS是一种直接带隙半导体,室温下其禁带宽度约为2.4eV,是一种良好的太阳能电池窗口层材料和过渡层材料。分别以CdCl2和(NH2)2CS作为镉源和硫源,用化学淀积法在玻璃上生长CdS纳米薄膜,考察了Cd2 浓度、淀积温度、淀积时间以及溶液pH值对CdS成膜的影响。紫外可见光吸收谱和荧光光谱的结果表明,在样品的制备过程中,通过改变反应条件如化学试剂的浓度、加热温度、加热时间等来控制薄膜中颗粒的尺寸大小,随着反应温度的逐渐降低或反应时间的减少等可以使得到的CdS纳米晶薄膜中晶粒尺寸逐渐减小,带隙增加;镉离子浓度越小或氨水浓度越大,所得CdS纳米晶薄膜带隙越大。     

原子层沉积与磁控溅射法制备TiO2薄膜性能对比研究

分别采用原子层沉积(ALD)和磁控溅射法(MS)在Si和石英衬底上制备TiO2薄膜,并进行退火处理.利用X射线衍射仪(XRD)、扫描电子显微镜(SEM)、原子力显微镜(AFM)和紫外分光光度计对这两种方法制备薄膜的晶型结构、表面形貌和光学特性进行分析对比.结果显示,对于沉积态TiO2薄膜,ALD-TiO2和MS-TiO2未能检测到TiO2衍射峰.ALD-TiO2为颗粒膜,其表面粗糙,颗粒尺寸大;MS-TiO2薄膜表面平整.经退火后,两种方法制备的TiO2薄膜能检测到锐钛矿A(101)衍射峰,但结晶质量不高.受薄膜表面形貌和晶型结构等因素影响,退火前后ALD-TiO2透过率与MS-TiO2透过率变化不一致.对于沉积态和退火态薄膜的禁带宽度,ALD-TiO2分别为3.8eV和3.7 eV,吸收边带发生红移,MS-TiO2分别为3.74 eV和3.84 eV,吸收边带发生蓝移.     

Effect of Mo doping on phase change performance of Sb2Te3

Mo, as a dopant, is doped into SbTe to improve its thermal stability. It is shown in this paper that the Mo-doped Sb₂Te₃ (Mo_0.26Sb₂Te₃, MST) material possesses phase change memory (PCM) applications. MST has better thermal stability than Sb₂Te₃(ST) and will crystallize only when the annealing temperature is higher than 250 ℃. With the good thermal stability, MST-based PCM cells have a fast crystallization time of 6 ns. Furthermore, endurance up to 4×10⁵ cycles with a resistance ratio of more than one order of magnitude makes MST a promising candidate for PCM applications.     

Si3.5Sb2Te3 Phase Change Material for Low-Power Phase Change Memory Application

Novel Si3.5Sb2Te3 phase change material for phase change memory is prepared by sputtering of Si and Sb2Te3 alloy targets. Crystalline Si3.5Sb2Te3 is a stable composite material consisting of amorphous Si and crystalline Sb2Te3, without separated Te phase. The thermally stable Si3.5Sb2Te3 material has data retention ability （10 years at 412K） better than that of the Ge2Sb2Te5 material （10 years at 383 K）. Phase change memory device based on Si3.5Sb2Te3 is successfully fabricated, showing low power consumption. Up to 2.2 × 107 cycles of endurance have been achieved with a resistance ratio lager than 300.