Numerical and experimental study of the mesa configuration in high-voltage 4H–SiC PiN rectifiers

The effect of the mesa configuration on the reverse breakdown characteristic of a SiC PiN rectifier for high-voltage applications is analyzed in this study.Three geometrical parameters,i.e.,mesa height,mesa angle and mesa bottom corner,are investigated by numerical simulation.The simulation results show that a deep mesa height,a small mesa angle and a smooth mesa bottom(without sub-trench) could contribute to a high breakdown voltage due to a smooth and uniform surface electric field distribution.Moreover,an optimized mesa structure without sub-trench(mesa height of 2.2 μm and mesa angle of 20°) is experimentally demonstrated.A maximum reverse blocking voltage of 4 kV and a forward voltage drop of 3.7 V at 100 A/cm~2 are obtained from the fabricated diode with a 30-μm thick N~- epi-layer,corresponding to 85% of the ideal parallel-plane value.The blocking characteristic as a function of the JTE dose is also discussed for the PiN rectifiers with and without interface charge.     

Trapezoid mesa trench metal-oxide semiconductor barrier Schottky rectifier: an improved Schottky rectifier with better reverse characteristics

An improved structure of Schottky rectifier,called a trapezoid mesa trench metal-oxide semiconductor (MOS) barrier Schottky rectifier (TM-TMBS),is proposed and studied by two-dimensional numerical simulations.Both forward and especially better reverse I-V characteristics,including lower leakage current and higher breakdown voltage,are demonstrated by comparing our proposed TM-TMBS with a regular trench MOS barrier Schottky rectifier (TMBS) as well as a conventional planar Schottky barrier diode rectifier.Optimized device parameters corresponding to the requirement for high breakdown voltage are given.With optimized parameters,TM-TMBS attains a breakdown voltage of 186 V,which is 6.3% larger than that of the optimized TMBS,and a leakage current of 4.3×10 6 A/cm 2,which is 26% smaller than that of the optimized TMBS.The relationship between optimized breakdown voltage and some device parameters is studied.Explanations and design rules are given according to this relationship.     

Fabrication and characterization of vertical GaN Schottky barrier diodes with boron-implanted termination

The vertical GaN-on-GaN Schottky barrier diode with boron-implanted termination was fabricated and characterized.Compared with the Schottky barrier diode(SBD)without boron-implanted termination,this SBD effectively improved the breakdown voltage from 189 V to 585 V and significantly reduced the reverse leakage current by 10^5 times.In addition,a high Ion/Ioff ratio of ~10^8 was achieved by the boron-implanted technology.We used Technology Computer Aided Design(TCAD)to analyze reasons for the improved performance of the SBD with boron-implanted termination.The improved performance of diodes may be attributed to that B+could confine free carriers to suppress electron field crowding at the edge of the diode,which could improve the breakdown voltage and suppress the reverse leakage current.     

Ultra-low specific on-resistance vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench

An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench(HK TG VDMOS) is proposed in this paper.The HK TG VDMOS features a high-k(HK) trench below the trench gate.Firstly,the extended HK trench not only causes an assistant depletion of the n-drift region,but also optimizes the electric field,which therefore reduces Ron,sp and increases the breakdown voltage(BV).Secondly,the extended HK trench weakens the sensitivity of BV to the n-drift doping concentration.Thirdly,compared with the superjunction(SJ) vertical double-diffused metal-oxide semiconductor(VDMOS),the new device is simplified in fabrication by etching and filling the extended trench.The HK TG VDMOS with BV = 172 V and Ron,sp = 0.85 mΩ·cm2 is obtained by simulation;its Ron,sp is reduced by 67% and 40% and its BV is increased by about 15% and 5%,in comparison with those of the conventional trench gate VDMOS(TG VDMOS) and conventional superjunction trench gate VDMOS(SJ TG CDMOS).     

Characterization of Microarc Oxidation Process on Aluminium Alloy

The specific features of electric current variation against time were studied by keeping the anode and cathode pulse voltage to be constant. The maximum thickness of the films fabricated by microarc oxidation was found to be closely related to the voltage. The surface morphology of the coatings can be divided into different stages according to the variation of electric current. A method for obtaining high micro hardness coating has been discussed.     

A new analytical model for the surface electric field distribution and breakdown voltage of the SOI trench LDMOS

A new analytical model for the surface electric field distribution and breakdown voltage of the silicon on insulator (SOI) trench lateral double-diffused metal-oxide-semiconductor (LDMOS) is presented. Based on the two-dimensional Laplace solution and Poisson solution, the model considers the influence of structure parameters such as the doping concentration of the drift region, and the depth and width of the trench on the surface electric field. Further, a simple analytical expression of the breakdown voltage is obtained, which offers an effective way to gain an optimal high voltage. All the analytical results are in good agreement with the simulation results.     

An oxide filled extended trench gate super junction MOSFET structure

This paper proposes an oxide filled extended trench gate super junction (SJ) MOSFET structure to meet the need of higher frequency power switches application. Compared with the conventional trench gate SJ MOSFET, new structure has the smaller input and output capacitances, and the remarkable improvements in the breakdown voltage, on-resistance and switching speed. Furthermore, the SJ in the new structure can be realized by the existing trench etching and shallow angle implantation, which offers more freedom to SJ MOSFET device design and fabrication.     

A super junction SiGe low-loss fast switching power diode

This paper proposes a novel super junction (SJ) SiGe switching power diode which has a columnar structure of alternating p^- and n^- doped pillar substituting conventional n^- base region and has far thinner strained SiGe p⁺ layer to overcome the drawbacks of existing Si switching power diode. The SJ SiGe diode can achieve low specific on-resistance, high breakdown voltages and fast switching speed. The results indicate that the forward voltage drop of SJ SiGe diode is much lower than that of conventional Si power diode when the operating current densities do not exceed 1000 A/cm², which is very good for getting lower operating loss. The forward voltage drop of the Si diode is 0.66V whereas that of the SJ SiGe diode is only 0.52 V at operating current density of 10 A/cm². The breakdown voltages are 203 V for the former and 235 V for the latter. Compared with the conventional Si power diode, the reverse recovery time of SJ SiGe diode with 20 per cent Ge content is shortened by above a half and the peak reverse current is reduced by over 15%. The SJ SiGe diode can remarkably improve the characteristics of power diode by combining the merits of both SJ structure and SiGe material.     

4H-SiC Schottky barrier diodes with semi-insulating polycrystalline silicon field plate termination

Based on the theoretical analysis of the 4H-SiC Schottky-barrier diodes(SBDs) with field plate termination, 4H-SiC SBD with semi-insulating polycrystalline silicon(SIPOS) FP termination has been fabricated. The relative dielectric constant of the SIPOS dielectric first used in 4H-SiC devices is 10.4, which is much higher than that of the SiO2dielectric,leading to benefitting the performance of devices. The breakdown voltage of the fabricated SBD could reach 1200 V at leakage current 20 μA, about 70% of the theoretical breakdown voltage. Meanwhile, both of the simulation and experimental results show that the length of the SIPOS FP termination is an important factor for structure design.     

High-Voltage AlGaN/GaN-Based Lateral Schottky Barrier Diodes

Lateral Schottky barrier diodes （SBDs） on A1GaN/GaN heterojunctions are fabricated and studied. The characteristics of the fabricated SBDs with different Schottky contact diameters and different Schottky-Ohmic contact spacings are investigated. The breakdown voltage can be increased by either increasing the Schottky-Ohmie con- tact spacing or increasing the Schottky contact diameter. However, the specific on-resistance is increased at the same time. A high breakdown voltage of 1400 V and low reverse leakage current below 20nA are achieved by the device with a Schottky contact diameter of 100 μm and a contact spacing of 40 μm, yielding a high V^2BR/ RoN,sp value of 194 MW.cm^-2.     

Polarization insensitivity in square split-ring resonators with asymmetrical arm widths

A polarization-insensitive, square split-ring resonator(SSRR) is simulated and experimented. By investigating the influence of the asymmetrical arm width in typical SSRRs, we find that the variation of the arm width enables a blue shift of the resonance frequency for the 0° polarized wave and a red shift of the resonance frequency for the 90° polarized wave. Thus, the resonance frequency for the 0° polarized wave and the resonance frequency for the 90° polarized wave will be identical by asymmetrically adjusting the arm width of the SSRR. Two modified, split-ring resonators(MSRRs) that are insensitive to the polarization with asymmetrical arm widths are designed, fabricated, and tested. Excellent agreement between the simulations and experiments for the MSRRs demonstrates the polarization insensitivity with asymmetrical arm widths. This work opens new opportunities for the investigation of polarization-insensitive, split-ring resonator metamaterials and will broaden the applications of split-ring resonators in various terahertz devices.     

Design consideration and fabrication of 1.2-kV 4H-SiC trenched-and-implanted vertical junction field-effect transistors

We present the design consideration and fabrication of 4H-SiC trenched-and-implanted vertical junction field-effect transistors （TI-VJFETs）. Different design factors, including channel width, channel doping, and mesa height, are con- sidered and evaluated by numerical simulations. Based on the simulation result, normally-on and normally-off devices are fabricated. The fabricated device has a 12 μm thick drift layer with 8 × 10^15 cm^-3 N-type doping and 2.6 μm channel length. The normally-on device shows a 1.2 kV blocking capability with a minimum on-state resistance of 2.33 mΩ.cm2, while the normally-off device shows an on-state resistance of 3.85 mΩ.cm2. Both the on-state and the blocking performances of the device are close to the state-of-the-art values in this voltage range.     

Modeling of 4H--SiC multi-floating-junction Schottky barrier diode

This paper develops a new and easy to implement analytical model for the specific on-resistance and electric field distribution along the critical path for 4H-SiC multi-floating junction Schottky barrier diode. Considering the charge compensation effects by the multilayer of buried opposite doped regions, it improves the breakdown voltage a lot in comparison with conventional one with the same on-resistance. The forward resistance of the floating junction Schottky barrier diode consists of several components and the electric field can be understood with superposition concept, both are consistent with MEDICI simulation results. Moreover, device parameters are optimized and the analyses show that in comparison with one layer floating junction, multilayer of floating junction layer is an effective way to increase the device performance when specific resistance and the breakdown voltage are traded off. The results show that the specific resistance increases 3.2 mΩ·cm 2 and breakdown voltage increases 422 V with an additional floating junction for the given structure.     

Reduce of Threshold of Laser Inducing Breakdown in Atmosphere by Introducing an Electric Spark

We report laser-generated plasmas in atmosphere with electrical spark generated by a synchronization circuit. The breakdown thresholds under the conditions that the electrical spark is used and not used are compared. The breakdown threshold has a distinct decrease after the electrical spark is used. Breakdown thresholds as a function of atmosphere pressure have also been measured at laser wavelengths 532nm and 1064 nm for the laser pulse width of 15ns. We also discuss the principle and performances of the ionized atmosphere by Nd：YAG laser under the condition of electrical spark introduction. Multiphoton ionization and cascade ionization play important roles in the whole process of atmosphere ionization. The free electron induced by electrical spark can supply the initialization free electron number for multiphoton ionization and cascade ionization. A model for breakdown in atmosphere, which is in good agreement with the experimental results, is described.     

Dual-gate lateral double-diffused metal—oxide semiconductor with ultra-low specific on-resistance

A new high voltage trench lateral double-diffused metal-oxide semiconductor (LDMOS) with ultra-low specific onresistance (R on,sp ) is proposed. The structure features a dual gate (DG LDMOS): a planar gate and a trench gate inset in the oxide trench. Firstly, the dual gate can provide a dual conduction channel and reduce R on,sp dramatically. Secondly, the oxide trench in the drift region modulates the electric field distribution and reduces the cell pitch but still can maintain comparable breakdown voltage (BV). Simulation results show that the cell pitch of the DG LDMOS can be reduced by 50% in comparison with that of conventional LDMOS at the equivalent BV; furthermore, R on,sp of the DG LDMOS can be reduced by 67% due to the smaller cell pitch and the dual gate.     

Study of silicon pixel sensor for synchrotron radiation detection

The silicon pixel sensor(SPS) is one of the key components of hybrid pixel single-photon-counting detectors for synchrotron radiation X-ray detection(SRD). In this paper, the design, fabrication, and characterization of SPSs for single beam X-ray photon detection is reported. The designed pixel sensor is a p+-in-n structure with guard-ring structures operated in full-depletion mode and is fabricated on 4-inch, N type, 320 μm thick, high-resistivity silicon wafers by a general Si planar process. To achieve high energy resolution of X-rays and obtain low dark current and high breakdown voltage as well as appropriate depletion voltage of the SPS, a series of technical optimizations of device structure and fabrication process are explored. With optimized device structure and fabrication process,excellent SPS characteristics with dark current of 2 n A/cm~2, full depletion voltage 50 V and breakdown voltage 150 V are achieved. The fabricated SPSs are wire bonded to ASIC circuits and tested for the performance of X-ray response to the 1W2 B synchrotron beam line of the Beijing Synchrotron Radiation Facility. The measured S-curves for SRD demonstrate a high discrimination for different energy X-rays. The extracted energy resolution is high( 20% for X-ray photon energy 10 keV) and the linear properties between input photo energy and the equivalent generator amplitude are well established. It confirmed that the fabricated SPSs have a good energy linearity and high count rate with the optimized technologies. The technology is expected to have a promising application in the development of a large scale SRD system for the Beijing Advanced Photon Source.     

A 3D SiC MOSFET with poly-silicon/SiC heterojunction diode

A three-dimensional(3D)silicon-carbide(SiC)trench metal-oxide-semiconductor field-effect transistor(MOSFET)with a heterojunction diode(HJD-TMOS)is proposed and studied in this work.The SiC MOSFET is characterized by an HJD which is partially embedded on one side of the gate.When the device is in the turn-on state,the body parasitic diode can be effectively controlled by the embedded HJD,the switching loss thus decreases for the device.Moreover,a highly-doped P+layer is encircled the gate oxide on the same side as the HJD and under the gate oxide,which is used to lighten the electric field concentration and improve the reliability of gate oxide layer.Physical mechanism for the HJD-TMOS is analyzed.Comparing with the conventional device with the same level of on-resistance,the breakdown voltage of the HJD-TMOS is improved by 23.4%,and the miller charge and the switching loss decrease by 43.2%and 48.6%,respectively.     

Laser-induced voltage effects in Ca3Co4O9 thin films on tilted LaAlO3（001） substrates grown by chemical solution deposition

Laser-induced voltage effects in c-axis oriented Ca3Co4O9 thin films have been studied with samples fabricated on 10 tilted LaAlO3(001) substrates by a simple chemical solution deposition method. An open-circuit voltage with a rise time of about 10 ns and full width at half maximum of about 28 ns is detected when the film surface is irradiated by a 308-nm laser pulse with a duration of 25 ns. Besides, open-circuit voltage signals are also observed when the film surface is irradiated separately by the laser pulses of 532 nm and 1064 nm. The results indicate that Ca3Co4O9 thin films have a great potential application in the wide range photodetctor from the ultraviolet to near infrared regions.     

Experimental and numerical analysis of the multi-recessed gate structure for microwave silicon carbide power MESFETs

This paper reports that multi-recessed gate 4H-SiC MESFETs (metal semiconductor filed effect transistors) with a gate periphery of 5-mm are fabricated and characterized. The multi-recessed region under the gate terminal is applied to improve the gate--drain breakdown voltage and to alleviate the trapping induced instabilities by moving the current path away from the surface of the device. The experimental results demonstrate that microwave output power density, power gain and power-added efficiency for multi-finger 5-mm gate periphery SiC MESFETs with multi-recessed gate structure are about 29%, 1.1dB and 7% higher than those of conventional devices fabricated in this work using the same process.     

Investigation of Weakly Relativistic Ponderomotive Effects on Self-Focusing During Interaction of High Power Elliptical Laser Beam with Plasma

This paper presents an investigation of weakly relativistic ponderomotive effects on self-focusing during interaction of high power elliptical laser beam with plasma. The nonlinear differential equations for the beam width parameters of elliptical laser beam have set up by using Wentzal–Krammers–Brillouin(WKB) and paraxial approximations. These equations have been solved numerically by using fourth order Runge–Kutta method to study the variation of these beam width parameters against normalized distance of propagation. Effects of variation in laser beam intensity,plasma density and electron temperature on the beam width parameters are also analyzed.