Influence of Triangle Structure Defect on the Carrier Lifetime of the 4H-SiC Ultra-Thick Epilayer

Effect of triangle structure defects in a 180-μm-thick as-grown n-type 4H-SiC homoepitaxial layer on the carrier lifetime is quantitatively analyzed, which is grown by a horizontal hot-wall chemical vapor deposition reactor.By microwave photoconductivity decay lifetime measurements and photoluminescence measurements, the results show that the average carrier lifetime of as-grown epilayer across the whole wafer is 2.59μs, while it is no more than 1.34μs near a triangle defect(TD). The scanning transmission electron microscope results show that the triangle structure defects have originated from 3C-SiC polytype and various types of as-grown stacking faults.Compared with the as-grown stacking faults, the 3C-SiC polytype has a great impact on the lifetime. The reduction of TD is essential to increasing the carrier lifetime of the as-grown thick epilayer.     

4H-SiC中基面位错发光特性研究

本文利用阴极荧光(CL)和选择性刻蚀的方法对4H-SiC同质外延材料中基面位错的发光特性进行了研究. 结果表明螺型基面位错(B_TSD)和混合型基面位错(B_MD)分别具有绿光和蓝绿光特性,其发光峰分别在530 nm附近和480 nm附近. 从测试结果中还发现B_MD 的发光位较B_TSD有所蓝移,分析认为B_TSD位错芯附近原子沿伯格斯 关键词： 4H-SiC 基面位错 发光特性 禁带宽度     

Comparison of the formation epitaxial graphenes on Si- and process and properties of C-face 6H-SiC substrates

In this paper,the epitaxial graphene layers grown on Si-and C-face 6H-SiC substrates are investigated under a low pressure of 400 Pa at 1600 C.By using atomic force microscopy and Raman spectroscopy,we find that there are distinct differences in the formation and the properties between the epitaxial graphene layers grown on the Si-face and the C-face substrates,including the hydrogen etching process,the stacking type,and the number of layers.Hopefully,our results will be useful for improving the quality of the epitaxial graphene on SiC substrate.     

界面态电荷对n沟6H-SiC MOSFET场效应迁移率的影响

针对界面态密度在禁带中的不均匀分布，分析了界面态电荷对n沟6H碳化硅MOSFET场效应迁移率的影响.分析结果显示，界面态电荷使n沟碳化硅器件的场效应迁移率明显降低.并给出了实验测定的场效应迁移率和反型层载流子迁移率的比值与界面态密度之间关系. 关键词： 碳化硅 界面态 反型层迁移率 场效应迁移率     

C-V法提取SiC隐埋沟道MOSFET沟道载流子浓度

本文对用C-V法提取SiC隐埋沟道MOSFET沟道载流子浓度的方法进行了理论和实验分析. pn结的存在所造成的埋沟MOS结构C-V曲线的畸变为沟道载流子浓度的提取带来一些问题. SiC/SiO₂界面上界面态的存在也会使提取出的数值与实际数值产生偏差. 本文首先从理论上分别分析了沟道深度和界面态对沟道载流子浓度提取结果的影响，然后对两种沟道深度的埋沟MOS结构C-V曲线进行了测试，提取出了沟道掺杂浓度. 在测试中，采用不同的扫描速率，分析了界面态对提取结果的影响. 理论分析结果和实验测 关键词： C-V法 SiC 隐埋沟道MOSFET 沟道载流子浓度     

Effect of Carbonized Conditions on Residual Strain and Crystallinity Quality of Heteroepitaxial Growth 3C-SiC Films

Heteroepitaxial growth of SiC on n-Si（111） substrates is performed by a low pressure chemicaJ vapor deposition process. The effects of different carbonized temperature and carbonized time on the crystalline quality and the residual strain of 3C-SiC films are discussed. The results show that the residual strain is obviously reduced and the crystalline quality is greatly improved at the best carbonized temperature of 1000℃ and the carbonized time of 5 min. Under these optimized carbonization conditions, thick epitaxial films of about 15 μm with good crystalline quality and low residual strain can be obtained.     

Study of a 4H-SiC epitaxial n-channel MOSFET

Epitaxial channel metal-oxide semiconductor field-effect transistors (MOSFETs) have been proposed as one possible way to avoid the problem of low inversion layers in traditional MOSFETs. This paper presents an equation of maximum depletion width modified which is more accurate than the original equation. A 4H--SiC epitaxial n-channel MOSFET using two-dimensional simulator ISE is simulated. Optimized structure would be realized based on the simulated results for increasing channel mobility.     

Edge termination study and fabrication of a 4Hben SiC junction barrier Schottky diode

The 4H-SiC junction barrier Schottky (JBS) diodes terminated by field guard rings and offset field plate are designed, fabricated and characterized. It is shown experimentally that a 3-μm P-type implantation window spacing gives an optimum trade-off between forward drop voltage and leakage current density for these diodes, yielding a specific on-resistance of 8.3 mΩ·cm². A JBS diode with a turn-on voltage of 0.65 V and a reverse current density less than 1 A/cm² under 500 V is fabricated, and the reverse recovery time is tested to be 80 ns, and the peak reverse current is 28.1 mA. Temperature-dependent characteristics are also studied in a temperature range of 75 ℃-200 ℃. The diode shows a stable Schottky barrier height of up to 200 ℃ and a stable operation under a continuous forward current of 100 A/cm².