BF+2注入多晶硅栅F迁移特性的分析与模拟

在深入分析BF⁺₂注入多晶硅栅F在多晶硅栅中迁移特性的基础上，建立了F在多晶硅栅中的迁移方程.采用有限差分法，模拟了BF⁺₂注入多晶硅栅F在多晶硅栅中的分布.模拟结果与二次离子质谱(SIMS)分析结果相符.给出了80keV，2×10¹⁵cm^-2 BF⁺₂注入多晶硅栅900℃，30min退火条件下F在多晶硅中的发射系数e=6×10关键词：     

Eu3+或Tb3+掺杂Y2O3纳米材料紫外激发光谱

采用燃烧法制备了不同Ln³⁺(Ln=Eu或Tb)掺杂浓度和不同平均粒径的Y₂O₃:Ln纳米晶体粉末和体材料样品。研究发现随着粒径的减小,Y₂O₃:Eu电荷迁移带的位置发生红移;并且,由于存在于近表面低结晶度环境中的Eu³⁺数量的增加,小粒径样品(5nm)的电荷迁移带还向长波方向发生了明显的展宽。实验中还观察到Y₂O₃:Tb纳米晶激发谱中4f5d(4f⁸→4f⁷5d¹)跃迁吸收对应激发峰(带)的谱线形状随样品粒径变化存在较大的差异,这是由于Tb³⁺存在于近表面的低结晶度和颗粒内部的高结晶度两种不同环境中,Tb³⁺的4f5d跃迁在两种环境中对应的吸收峰位置不同,当样品粒径发生变化时Tb³⁺处于两种环境中的比例随之变化,造成相应吸收跃迁对应的激发峰(带)强度发生变化,并改变了激发谱的谱线形状。实验中还发现,随着Tb³⁺(或Eu³⁺)浓度的减小,Y₂O₃基质激子跃迁吸收的激发峰对比4f5d跃迁(或电荷迁移带)激发峰的相对强度随之增强。     

Ta2O5-PMMA复合栅绝缘层对OFETs性能的影响

选用五氧化二钽（Ta₂O₅）-聚甲基丙烯酸甲酯（PMMA）复合材料作为栅绝缘层制备了并五苯有机场效应晶体管（OFETs）。通过在Ta₂O₅表面旋涂一层PMMA可以降低栅绝缘层的表面粗糙度,增大其场效应晶体管的迁移率。研究了厚度在20~60 nm范围内的PMMA对复合绝缘层表面形貌、粗糙度以及器件电学性能的影响。结果表明,当PMMA厚度为40 nm时,器件的电学性能最佳。与单一的Ta₂O₅栅绝缘层器件相比,其场效迁移率由4.2×10^-2 cm²/（V·s）提高到0.31 cm²/（V·s）;栅电压增加到-20 V时,开关电流比由2.9×10²增大到2.9×10⁵。     

Eu3+掺杂的Sr2CeO4发光材料的光致发光研究

利用高温固相反应法制备了Eu³⁺掺杂的Sr₂CeO₄样品,并对其吸附水前后的光谱特性进行了研究.结果发现,对于刚制备的Sr_2-xEu_xCeO_4+x/2样品, 在Ce⁴⁺—O^2-的电荷迁移激发中,只有强激发带(～35700cm^-1)与Eu³⁺离子间存在能量传递,而弱激发带 (～29400cm^-1)只是引起Ce⁴⁺—O^2-的电荷迁移发射;在Sr_2-xEu_xCeO_4+x/2样品吸附水后,Eu³⁺的线状吸收跃迁强度显著增加, Ce⁴⁺—O^2-两个激发带均向Eu³⁺离子传递能量. Ce⁴⁺—O^2-强激发带通过交换作用向Eu³⁺离子传递能量,而弱激发带与Eu³⁺离子间的能量传递机理是非辐射多极子近场力的相互作用. 关键词： 2-xEu_xCeO_4+x/2')" href="#">Sr_2-xEu_xCeO_4+x/2 发光性质 能量传递 吸附水     

基于P掺杂SiO2为栅介质的超低压侧栅薄膜晶体管

在室温下利用等离子体增强化学气相沉积法(PECVD)制备的颗粒膜P掺杂SiO₂为栅介质, 使用磁控溅射方法利用一步掩模法制备出一种新型结构的侧栅薄膜晶体管. 由于侧栅薄膜晶体管具有独特的结构, 在射频磁控溅射过程中, 仅仅利用一块镍掩模板, 无需复杂的光刻步骤, 就可同时沉积出氧化铟锡(ITO)源、漏、栅电极和沟道, 因此, 这种方法极大地简化了制备流程, 降低了工艺成本. 实验结果表明, 在P掺杂SiO₂栅介质层与沟道层界面处形成了超大的双电层电容(8 μF/cm²), 这使得这类晶体管具有超低的工作电压1 V, 小的亚阈值摆幅82 mV/dec、高的迁移率18.35 cm²/V·s和大的开关电流比1.1×10⁶. 因此, 这种P掺杂SiO₂双电层超低压薄膜晶体管将有望应用于低能耗便携式电子产品以及新型传感器领域. 关键词： 2')" href="#">P掺杂SiO₂ 侧栅薄膜晶体管 双电层(EDL) 超低压     

用SiCl4/H2气源沉积多晶硅薄膜光照稳定性的研究

对以SiH₄/H₂及SiCl₄/H₂为源气体、采用 等离子体增强化学气相沉积技术制备的非晶硅薄膜和多晶硅薄膜进行了光照稳定性的研究.实验表明，制备的多晶硅薄膜并没有出现 非晶硅中的光致衰减现象，其光电导、暗电导在光照过程中没有下降反而有所上升且电导率 变化快慢受氢稀释度的制约.多晶硅薄膜的光照稳定性可能来源于高的晶化度及Cl元素的存在. 关键词： 多晶硅薄膜 稳恒光电导效应 晶界 光致衰退效应     

Na+替位掺杂对Li2MnSiO4的电子结构以及Li+迁移过程的影响

在锂二次电池中, 硅酸锰锂作为正极材料得到广泛研究, 但其固有的电子和离子电导率较低, 直接影响着电池的功率密度和充放电速率. 本文建立了不同浓度的Na⁺离子替位掺杂Li⁺离子形成的Li_1-xNa_xMnSiO₄(x=0, 0.125, 0.25, 0.5)结构, 采用第一性原理的方法, 研究了掺杂前后硅酸锰锂的电子结构以及Li⁺离子的跃迁势垒. 发现在Li⁺位替代掺杂Na⁺, 导带底的能级向低能方向发生移动, 降低了Li₂MnSiO₄ 材料的禁带宽度, 有利于提升材料的电子导电性能. 随着掺杂浓度的升高, 禁带宽度逐渐变窄. CI-NEB结果表明, 在Li₂MnSiO₄体系中具有两条有效的Li⁺离子迁移通道, 掺杂Na⁺以后扩大了Li⁺ 离子在[100]晶向上的迁移通道, Li⁺离子的跃迁势垒由0.64 eV降低为0.48, 0.52和0.55 eV. 掺杂浓度为 x=0.125时, 离子迁移效果最佳. 研究表明Na⁺掺杂有利于提高Li₂MnSiO₄材料的离子和电子电导率.     

CaWO4晶体中F型色心电子结构的研究

运用相对论的密度泛函离散变分法(DV-Xα)研究了CaWO₄晶体中F型色心的电子结构. 计算结果表明，F和F⁺心在禁带中引入了新的施主能级；分析了晶体内可能存在的光学跃迁模式，并通过过渡态的方法计算了F，F⁺心跃迁到导带底的能量分别为1.92eV和2.42eV. 因此，从理论上推断了F和F⁺心在CaWO₄晶体中可能引起650nm和515nm的吸收，由此说明CaWO₄晶体中650nm和515nm吸收带起源于晶体中的F和F⁺心. 关键词： 4晶体')" href="#">CaWO₄晶体 +心')" href="#">F和F⁺心 DV-Xα     

MoS2/MoTe2垂直异质结的电荷传输及其调制

二维材料异质结器件具有纳米级厚度及范德瓦耳斯接触表面,因而表现出独特的光电特性.本文构建了栅压可调的MoS₂/MoTe₂垂直异质结器件,利用开尔文探针力显微镜(KPFM)技术结合电输运测量,揭示了MoS₂/MoTe₂异质结分别在黑暗和532 nm激光照射条件下的电荷输运行为,发现随着栅压的变化异质结表现出从n-n⁺结到p-n结的反双极性特征.系统地解释了MoS₂/MoTe₂异质结的电荷输运机制,包括n-n⁺结和p-n结在正偏和反偏下条件下的电荷输运过程、随栅压变化而发生的转变的结区行为、接触势垒对电荷输运的影响、n-n⁺结和p-n结具有不同整流特征的原因、偏压对带间隧穿的重要作用及光生载流子对电学输运行为的影响等.本文所使用的方法可推广到其他二维异质结体系,为提高二维半导体器件性能及其应用提供了重要的参考和借鉴.     

新型近红外超长余辉材料Zn3Al2Ge2O10：Cr3+的发光性能

采用高温固相法制备了新型近红外长余辉材料Zn₃Al₂Ge₂O₁₀：Cr³⁺,利用X射线衍射、荧光光谱和余辉衰减曲线等对合成的样品进行了分析。结果表明：样品Zn₃Al₂Ge₂O₁₀：Cr³⁺是Ge⁴⁺取代ZnAl₂O₄：Cr³⁺尖晶石中的部分Al³⁺而形成的固溶体。在397 nm光的激发下,发射光谱主要由两个明显的窄峰叠加在Cr³⁺离子的自旋允许跃迁⁴T₂→⁴A₂辐射的宽发射带上。发光强度随着Cr³⁺离子掺杂浓度的增大和煅烧温度的升高而出现浓度猝灭及温度猝灭现象。当Zn₃Al_2-xGe₂O₁₀：xCr³⁺中的Cr³⁺离子掺杂量x为2%且煅烧温度为1 350 ℃时,样品的近红外发光及余辉强度最大。材料的余辉持续时间超过300 h,余辉发射谱峰位与荧光发射光谱中的N线一致,均位于697 nm附近。最后分析了煅烧温度对样品余辉性能的影响,并对材料的余辉机制进行了探讨。     

The electrical characteristics of a 4H-silicon carbide metal-insulator-semiconductor structure with Al2O3 as the gate dielectric

A 4H-silicon carbide metal-insulator-semiconductor structure with ultra-thin Al₂O₃ as the gate dielectric, deposited by atomic layer deposition on the epitaxial layer of a 4H-SiC (0001) 8⁰N-/N+ substrate, has been fabricated. The experimental results indicate that the prepared ultra-thin Al₂O₃ gate dielectric exhibits good physical and electrical characteristics, including a high breakdown electrical field of 25 MV/cm, excellent interface properties (1×10¹⁴ cm^-2) and low gate-leakage current (I_G = 1 × 10^-3 A/cm^-2@E_ox = 8 MV/cm). Analysis of the current conduction mechanism on the deposited Al₂O₃ gate dielectric was also systematically performed. The confirmed conduction mechanisms consisted of Fowler-Nordheim (FN) tunneling, the Frenkel-Poole mechanism, direct tunneling and Schottky emission, and the dominant current conduction mechanism depends on the applied electrical field. When the gate leakage current mechanism is dominated by FN tunneling, the barrier height of SiC/Al₂O₃ is 1.4 eV, which can meet the requirements of silicon carbide metal-insulator-semiconductor transistor devices.     

Control of electronic properties of HfO2 with fluorine doping from first-principles

The authors investigate the effect of the fluorine doping on the electronic properties of HfO₂ in order to realize the perfect passivation of oxygen vacancy (Vo) with no excess charges, and with no band gap narrowing. Introducing of substitutional fluorine (Fs) can avoid deterioration in a gate oxide caused due to oxygen vacancies. However, introduction of fluorine alone adversely induces excess charges in gate oxide. Our calculated results provide new several dopants to control the electronic properties of HfO₂ in purpose of achieving a large energy gain for the most stable state, no band gap narrowing, and also no excess charges. Here, two dopant pairs, Fs-Ns, and Fs-Als, are proposed.     

Interface Evolution of TiN/Poly Si as Gate Material on Si/HfO2 Stack

TiN as gate electrode in Si/HfO₂/TiN/poly-Si stack is evaluated after the postmetal annealing treatments. Interface reactions are investigated usingelectron-energy-loss spectroscopy and x-ray photoelectron spectroscopy. The work function of the TiN/poly-Si stack shows strong dependence on the postmetal deposition annealing conditions. The interfacial product in TiN/poly-Si interface is inferred as TiSiN, which is beneficial for the whole high-k stack since TiSiN possesses higher work function compared to TiN and poly-Si.     

Characteristics of sandwich-structured Al2O3/HfO2/Al2O3 gate dielectric films on ultra-thin silicon-on-insulator substrates

Sandwich-structure Al₂O₃/HfO₂/Al₂O₃ gate dielectric films were grown on ultra-thin silicon-on-insulator (SOI) substrates by vacuum electron beam evaporation (EB-PVD) method. AFM and TEM observations showed that the films remained amorphous even after post-annealing treatment at 950 °C with smooth surface and clean silicon interface. EDX- and XPS-analysis results revealed no silicate or silicide at the silicon interface. The equivalent oxide thickness was 3 nm and the dielectric constant was around 7.2, as determined by electrical measurements. A fixed charge density of 3 × 10¹⁰ cm⁻² and a leakage current of 5 × 10⁻⁷A/cm² at 2 V gate bias were achieved for Au/gate stack /Si/SiO₂/Si/Au MIS capacitors. Post-annealing treatment was found to effectively reduce trap density, but increase in annealing temperature did not made any significant difference in the electrical performance.     

Characteristics improvement of HfO2/Ge gate stack structure by fluorine treatment of germanium surface

Chemical reactivity of fluorine molecule (F₂)-germanium (Ge) surface and dissociation of fluorine (F)-Ge bonding have been simulated by semi-empirical molecular orbital method theoretically, which shows that F on Ge surface is more stable compared to hydrogen. Ge MIS (metal insulator semiconductor) capacitor has been fabricated by using F₂-treated Ge(1 0 0) substrate and HfO₂ film deposited by photo-assisted MOCVD. Interface state density observed as a hump in the C-V curve of HfO₂/Ge gate stack and its C-V hysteresis were decreased by F₂-treatment of Ge surface. XPS (X-ray photoelectron spectroscopy) depth profiling reveals that interfacial layer between HfO₂ and Ge is sub-oxide layer (GeO_x or HfGeO_x), which is believed to be origin of interface state density.F was incorporated into interfacial layer easily by using F₂-treated Ge substrate. These results suggest that interface defect of HfO₂/Ge gate stack structure could be passivated by F effectively.     

Interstitial fluorine centers in the neutron-irradiated MgF2

The interstitial fluorine center is observed in a neutron-irradiated MgF₂. It is F^?₂ molecular ion; the hole trapped by the ion resides longer at one fluorine than at the other. Spin Hamiltonian parameters are determined from angular dependence of the ESR-spectrum. The center decays at about 550 K.     

RBa2Cu3Ox(R为稀土元素)超导体中F代O的研究

以CuF₂为配方试剂之一,合成系列掺F稀土超导体RBa₂Cu₃O_xF_y。对比观测发现,稀土氧化物超导体以F代O后,烧结温度明显降低,超导转变宽度变窄,零电阻温度稍有提高,晶胞参数发生变化,F进入123相晶格,文中还讨论掺F效应。 关键词：     

Effect of poly silicon thickness on the formation of Ni-FUSI gate by using atomic layer deposited nickel film

The effect of poly-Si thickness on silicidation of Ni film was investigated by using X-ray diffraction, auger electron spectroscopy, cross-sectional scanning transmission electron microscopy, resistivity, I–V, and C–V measurements. The poly-Si films with various thickness of 30–200 nm were deposited by LPCVD on thermally grown 50 nm thick SiO₂, followed by deposition of Ni film right after removing the native oxide. The Ni film was prepared by using atomic layer deposition with a N²-hydroxyhexafluoroisopropyl-N¹ (Bis-Ni) precursor. Rapid thermal process was then applied for a formation of fully silicide (FUSI) gate at temperature of 500 °C in N₂ ambient during 30 s. The resultant phase of Ni-silicide was strongly dependent on the thickness of poly-Si layer, continuously changing its phase from Ni-rich (Ni₃Si₂) to Si-rich (NiSi₂) with increasing the thickness of the poly-Si layer, which is believed to be responsible for the observed flat band voltage shift, ΔV_FB, in C–V curves.     

A study of GaN MOSFETs with atomic-layer-deposited Al2O3 as the gate dielectric

Accumulation-type GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) with atomic-layer-deposited Al₂O₃ gate dielectrics are fabricated. The device, with atomic-layer-deposited Al₂O₃ as the gate dielectric, presents a drain current of 260 mA/mm and a broad maximum transconductance of 34 mS/mm, which are better than those reported previously with Al₂O₃ as the gate dielectric. Furthermore, the device shows negligible current collapse in a wide range of bias voltages, owing to the effective passivation of the GaN surface by the Al₂O₃ film. The gate drain breakdown voltage is found to be about 59.5 V, and in addition the channel mobility of the n-GaN layer is about 380 cm²/Vs, which is consistent with the Hall result, and it is not degraded by atomic-layer-deposition Al₂O₃ growth and device fabrication.