硅基单片式复合晶体管的结构参数对高功率微波损伤效应的影响（英文）

建立了三种不同结构的硅基单片式复合晶体管(由T1和T2两个晶体管构成)的二维电热模型,研究了高功率微波对不同结构的硅基单片式复合晶体管的损伤效应的影响。获得了不同器件结构下导致复合晶体管损伤的损伤功率阈值和损伤能量阈值分别与脉宽的关系。结果表明,当复合晶体管的总体尺寸不变而T2和T1晶体管的面积比值更大时需要更多的功率和能量来损伤器件。通过分析器件内部电场、电流密度和温度分布的变化,得到了复合晶体管的结构对其微波损伤效应的影响规律。对比发现,三种结构的复合晶体管的损伤点均位于T2管的发射极附近,随着T2和T1晶体管面积比的增大,电场、电流密度和温度在器件内部的分布将变得更加分散。此外,在发射极处增加外接电阻Re,研究表明损伤时间随发射极电阻的增大而增加。因此可以得出结论,适当改变器件结构或增加外接元件可以增强器件的抗微波损伤能力。晶体管的仿真毁伤点与实验结果一致。     

具有P型覆盖层新型超级结横向双扩散功率器件

为了设计功率集成电路所需要的低功耗横向双扩散金属氧化物半导体器件(lateral double-diffused MOSFET), 在已有的N型缓冲层超级结LDMOS(N-buffered-SJ-LDMOS)结构基础上, 提出了一种具有P型覆盖层新型超级结LDMOS结构(P-covered-SJ-LDMOS). 这种结构不但能够消除传统的N沟道SJ-LDMOS由于P型衬底产生的衬底辅助耗尽问题, 使得超级结层的N区和P区的电荷完全补偿, 而且还能利用覆盖层的电荷补偿作用, 提高N型缓冲层浓度, 从而降低了器件的比导通电阻. 利用三维仿真软件ISE分析表明, 在漂移区长度均为10 μm的情况下, P-covered-SJ-LDMOS的比导通电阻较一般SJ-LDMOS结构降低了59%左右, 较文献提出的N型缓冲层 SJ-LDMOS(N-buffered-SJ-LDMOS)结构降低了43%左右.     

阶梯AlGaN外延新型Al0.25Ga0.75N/GaNHEMTs器件实验研究

本文报道了作者提出的阶梯AlGaN外延层新型AlGaN/GaN HEMTs结构的实验结果. 实验利用感应耦合等离子体刻蚀(ICP)刻蚀栅边缘的AlGaN外延层, 形成阶梯的AlGaN 外延层结构, 获得浓度分区的沟道2DEG, 使得阶梯AlGaN外延层边缘出现新的电场峰, 有效降低栅边缘的高峰电场, 从而优化了AlGaN/GaN HEMTs器件的表面电场分布. 实验获得了阈值电压-1.5 V的新型AlGaN/GaN HEMTs器件. 经过测试, 同样面积的器件击穿电压从传统结构的67 V提高到新结构的106 V, 提高了58%左右; 脉冲测试下电流崩塌量也比传统结构减少了30%左右, 电流崩塌效应得到了一定的缓解.     

A novel low-swing interconnect optimization model with delay and bandwidth constraints

Interconnect power and repeater area are important in the interconnect optimization of nanometer scale integrated circuits.Based on the RLC interconnect delay model,by wire sizing,wire spacing and adopting low-swing interconnect technology,this paper proposed a power-area optimization model considering delay and bandwidth constraints simultaneously.The optimized model is verified based on 65-nm and 90-nm complementary metal-oxide semiconductor(CMOS) interconnect parameters.The verified results show that averages of 36% of interconnect power and 26% of repeater area can be saved under 65-nm CMOS process.The proposed model is especially suitable for the computer-aided design of nanometer scale systems-on-chip.     

Damage effect and mechanism of the GaAs pseudomorphic high electron mobility transistor induced by the electromagnetic pulse

The damage effect and mechanism of the electromagnetic pulse(EMP) on the GaAs pseudomorphic high electron mobility transistor(PHEMT) are investigated in this paper. By using the device simulation software, the distributions and variations of the electric field, the current density and the temperature are analyzed. The simulation results show that there are three physical effects, i.e., the forward-biased effect of the gate Schottky junction, the avalanche breakdown, and the thermal breakdown of the barrier layer, which influence the device current in the damage process. It is found that the damage position of the device changes with the amplitude of the step voltage pulse. The damage appears under the gate near the drain when the amplitude of the pulse is low, and it also occurs under the gate near the source when the amplitude is sufficiently high, which is consistent with the experimental results.     

Parasitic effects of air-gap through-silicon vias in high-speed three-dimensional integrated circuits

In this paper,ground-signal-ground type through-silicon vias(TSVs) exploiting air gaps as insulation layers are designed,analyzed and simulated for applications in millimeter wave.The compact wideband equivalent-circuit model and passive elements(RLGC) parameters based on the physical parameters are presented with the frequency up to 100 GHz.The parasitic capacitance of TSVs can be approximated as the dielectric capacitance of air gaps when the thickness of air gaps is greater than 0.75 μm.Therefore,the applied voltage of TSVs only needs to achieve the flatband voltage,and there is no need to indicate the threshold voltage.This is due to the small permittivity of air gaps.The proposed model shows good agreement with the simulation results of ADS and Ansoft's HFSS over a wide frequency range.     

Pulsed microwave damage trend of bipolar transistor as a function of pulse parameters

In the present paper we conduct a theoretical study of the thermal accumulation effect of a typical bipolar transistor caused by high power pulsed microwave (HPM), and investigate the thermal accumulation effect as a function of pulse repetition frequency (PRF) and duty cycle. A study of the damage mechanism of the device is carried out from the variation analysis of the distribution of the electric field and the current density. The result shows that the accumulation temperature increases with PRF increasing and the threshold for the transistor is about 2 kHz. The response of the peak temperature induced by the injected single pulses indicates that the falling time is much longer than the rising time. Adopting the fitting method, the relationship between the peak temperature and the time during the rising edge and that between the peak temperature and the time during the falling edge are obtained. Moreover, the accumulation temperature decreases with duty cycle increasing for a certain mean power.     

SiC电子霍耳迁移率的计算

基于对自身能带结构的分析以及各向同性弛豫时间近似法,采用三椭球等能面、抛物线性简化,建立了适于模拟n型6H-SiC电子霍耳迁移率和霍耳散射因子的解析模型,精确描述了不同散射机制对于6H-SiC低场电子输运特性的影响.计算结果与实测值有很好的一致性.     

基于S域RLC传输线模型的多芯片组件互连功耗计算

为了分析多芯片组件的互连功耗,用RLC传输线模型对多芯片组件的互连进行表征,通过对输入互连的电流及其等效电阻的近似,推导出多芯片组件互连功耗的频域数学表达式,给出计算机仿真试验结果,对方法的有效性进行验证.