高碳铬铁在氢氧化钠水溶液中电化学氧化过程

铬铁电化学氧化法是一种新的制备铬酸钠的方法,然而高碳铬铁在NaOH水溶液中的电化学氧化过程尚不明确。 采用循环伏安法(CV)、稳态极化法(LSV)等电化学测试方法对金属铬、高碳铬铁在NaOH水溶液中的电化学氧化过程进行研究,通过扫描电子显微镜(SEM)、能量散射谱(EDS)和X射线光电子能谱(XPS)对高碳铬铁电解后固相产物表征,判断固相产物的组成。 结果表明,高碳铬铁不同于金属铬的电氧化过程,它在NaOH溶液中通过Cr(0)→Cr(Ⅵ)的电氧化方式生成铬酸钠,中间产物Cr(OH)₃和Fe(0)发生电化学反应生成稳定的FeCr₂O₄。 随着NaOH浓度的增加,电势较低时,受高碳铬铁中Fe(0)的影响,高碳铬铁容易在NaOH水溶液中发生钝化;当电势足够正时,钝化膜溶解,生成铬酸钠、氢氧化铁和亚铬酸亚铁,同时,阳极表面有氧气析出。 高碳铬铁电化学氧化制备铬酸钠的适宜条件:碱浓度≥2 mol/L,阳极电势≥1.6 V(vs.SCE)。     

由Lévy过程驱动的BSDE定义的一般非线性期望

本文研究了平凡可积随机变量的一类非线性期望f-期望.利用陈增敬推广g-期望的方法,扩张了f-期望的定义空间.     

基于时域有限差分法分析等离子波导和介质波导耦合

使用Rsoft软件中的时域有限差分模块Fullwave分析二维介质波导和等离子波导耦合特性,利用软件仿真耦合结构并自动计算出光在介质波导和等离子波导中传输的耦合效率,进而测绘耦合效率随波导尺寸和光波长的变化曲线图,发现MDM导波结构的缝隙宽度和光通信质量密切相关,在确定尺寸下,传输损耗随传输距离成指数衰减.根据分析得到的耦合效率变化规律发现介质波导和等离子波导间距最佳点都应设为15 nm,进而优化波导的几何结构参数后,可以将耦合效率提高到83%.     

Fmoc-His(Mtt)-OH的合成

以二氯二甲基硅烷为双保护试剂,在碱性条件下组氨酸(His)的咪唑环和α-氨基位分别引入4-甲基-三苯甲基(Mtt)和9-笏甲氧羰基(Fmoc)保护基,合成了Fmoc-His(Mtt)-OH,其结构经1H NMR和MS确证。     

两个3-甲基-2-乙酰吡嗪缩4-苯基氨基脲双核铜Ⅱ配合物的晶体结构及与DNA的相互作用

合成并通过单晶X射线衍射、元素分析及红外光谱表征了配合物[Cu₂（L）₂Cl₂]（1）和[Cu₂（L）₂（OAc）₂]（2）的结构（HL为3-甲基2-乙酰吡嗪缩4-苯基氨基脲）。单晶衍射结果表明,2个配合物中,每个拥有四方锥配位构型的Cu(Ⅱ)离子与来自1个阴离子配体L^-的N₂O电子供体和2个阴离子配位（1中为氯离子,2中为醋酸根离子）,其中1个阴离子为μ²桥联配位模式。荧光光谱结果表明,配合物与DNA的相互作用强于配体。     

两个3-甲基-2-乙酰吡嗪缩4-苯基氨基脲双核铜Ⅱ配合物的晶体结构及与DNA的相互作用

合成并通过单晶X射线衍射、元素分析及红外光谱表征了配合物[Cu₂（L）₂Cl₂]（1）和[Cu₂（L）₂（OAc）₂]（2）的结构（HL为3-甲基2-乙酰吡嗪缩4-苯基氨基脲）。单晶衍射结果表明,2个配合物中,每个拥有四方锥配位构型的Cu(Ⅱ)离子与来自1个阴离子配体L^-的N₂O电子供体和2个阴离子配位（1中为氯离子,2中为醋酸根离子）,其中1个阴离子为μ²桥联配位模式。荧光光谱结果表明,配合物与DNA的相互作用强于配体。     

Adaptive synchronization of chaos in permanent magnet synchronous motors based on passivity theory

An adaptive synchronization control method is proposed for chaotic permanent magnet synchronous motors based on the property of a passive system. We prove that the controller makes the synchronization error system between the driving and the response systems not only passive but also asymptotically stable. The simulation results show that the proposed method is effective and robust against uncertainties in the systemic parameters.     

Analysis of the breakdown mechanism for an ultra high voltage high-side thin layer silicon-on-insulator p-channel lateral double-diffused metal\ben oxide semiconductor

This paper discusses the breakdown mechanism and proposes a new simulation and test method of breakdown voltage (BV) for an ultra-high-voltage (UHV) high-side thin layer silicon-on-insulator (SOI) p-channel low-density metal-oxide semiconductor (LDMOS). Compared with the conventional simulation method, the new one is more accordant with the actual conditions of a device that can be used in the high voltage circuit. The BV of the SOI p-channel LDMOS can be properly represented and the effect of reduced bulk field can be revealed by employing the new simulation method. Simulation results show that the off-state (on-state) BV of the SOI p-channel LDMOS can reach 741 (620) V in the 3-μm-thick buried oxide layer, 50-μm-length drift region, and at -400 V back-gate voltage, enabling the device to be used in a 400 V UHV integrated circuit.     

A novel superjunction MOSFET with improved ruggedness under unclamped inductive switching

The ruggedness of a superjunction metal–oxide semiconductor field-effect transistor (MOSFET) under unclamped inductive switching conditions is improved by optimizing the avalanche current path. Inserting a P-island with relatively high doping concentration into the P-column, the avalanche breakdown point is localized. In addition, a trench type P+ contact is designed to shorten the current path. As a consequence, the avalanche current path is located away from the N+ source/P-body junction and the activation of the parasitic transistor can be effectively avoided. To verify the proposed structural mechanism, a two-dimensional (2D) numerical simulation is performed to describe its static and on-state avalanche behaviours, and a method of mixed-mode device and circuit simulation is used to predict its performances under realistic unclamped inductive switching. Simulation shows that the proposed structure can endure a remarkably higher avalanche energy compared with a conventional superjunction MOSFET.     

Analysis of the breakdown mechanism for an ultra high voltage high-side thin layer silicon-on-insulator p-channel low-density metal-oxide semiconductor

This paper discusses the breakdown mechanism and proposes a new simulation and test method of breakdown voltage(BV) for an ultra-high-voltage(UHV) high-side thin layer silicon-on-insulator(SOI) p-channel lateral double-diffused metal-oxide semiconductor(LDMOS).Compared with the conventional simulation method,the new one is more accordant with the actual conditions of a device that can be used in the high voltage circuit.The BV of the SOI p-channel LDMOS can be properly represented and the effect of reduced bulk field can be revealed by employing the new simulation method.Simulation results show that the off-state(on-state) BV of the SOI p-channel LDMOS can reach 741(620) V in the 3-μm-thick buried oxide layer,50-μm-length drift region,and at 400 V back-gate voltage,enabling the device to be used in a 400 V UHV integrated circuit.