超薄屏蔽层300 V SOI LDMOS抗电离辐射总剂量仿真研究

本文研究了300 V绝缘体上硅横向双扩散金属氧化物半导体场效应管在电离辐射总剂量效应下的线性电流退化机理,提出了一种具有超薄屏蔽层的抗辐射结构实现线性电流加固.超薄屏蔽层位于器件场氧化层的下方,旨在阻止P型掺杂层表面发生反型,从而截断表面电流路径,有效抑制线性电流的退化.对于横向双扩散金属氧化物半导体场效应管,漂移区上的场氧化层中引入的空穴对线性电流的退化起着主导作用.本文基于器件工艺仿真软件,研究器件在辐照前后的电学特性,对超薄屏蔽层的长度、注入能量、横向间距进行优化,给出相应的剂量窗口,在电离辐射总剂量为0—500 krad(Si)的条件下,将最大线性电流增量从传统结构的447%缩减至10%以内,且辐照前后击穿电压均维持在300 V以上.     

Analysis of the breakdown mechanism for an ultra high voltage high-side thin layer silicon-on-insulator p-channel lateral double-diffused metal\ben oxide semiconductor

This paper discusses the breakdown mechanism and proposes a new simulation and test method of breakdown voltage (BV) for an ultra-high-voltage (UHV) high-side thin layer silicon-on-insulator (SOI) p-channel low-density metal-oxide semiconductor (LDMOS). Compared with the conventional simulation method, the new one is more accordant with the actual conditions of a device that can be used in the high voltage circuit. The BV of the SOI p-channel LDMOS can be properly represented and the effect of reduced bulk field can be revealed by employing the new simulation method. Simulation results show that the off-state (on-state) BV of the SOI p-channel LDMOS can reach 741 (620) V in the 3-μm-thick buried oxide layer, 50-μm-length drift region, and at -400 V back-gate voltage, enabling the device to be used in a 400 V UHV integrated circuit.     

Analysis of the breakdown mechanism for an ultra high voltage high-side thin layer silicon-on-insulator p-channel low-density metal-oxide semiconductor

This paper discusses the breakdown mechanism and proposes a new simulation and test method of breakdown voltage(BV) for an ultra-high-voltage(UHV) high-side thin layer silicon-on-insulator(SOI) p-channel lateral double-diffused metal-oxide semiconductor(LDMOS).Compared with the conventional simulation method,the new one is more accordant with the actual conditions of a device that can be used in the high voltage circuit.The BV of the SOI p-channel LDMOS can be properly represented and the effect of reduced bulk field can be revealed by employing the new simulation method.Simulation results show that the off-state(on-state) BV of the SOI p-channel LDMOS can reach 741(620) V in the 3-μm-thick buried oxide layer,50-μm-length drift region,and at 400 V back-gate voltage,enabling the device to be used in a 400 V UHV integrated circuit.     

Modeling of a triple reduced surface field silicon-on-insulator lateral double-diffused metal–oxide–semiconductor field-effect transistor with low on-state resistance

An analytical model for a novel triple reduced surface field(RESURF) silicon-on-insulator(SOI) lateral doublediffused metal–oxide–semiconductor(LDMOS) field effect transistor with n-type top(N-top) layer, which can obtain a low on-state resistance, is proposed in this paper. The analytical model for surface potential and electric field distributions of the novel triple RESURF SOI LDMOS is presented by solving the two-dimensional(2D) Poisson's equation, which can also be applied to single, double and conventional triple RESURF SOI structures. The breakdown voltage(BV) is formulized to quantify the breakdown characteristic. Besides, the optimal integrated charge of N-top layer(Q_(ntop)) is derived, which can give guidance for doping the N-top layer. All the analytical results are well verified by numerical simulation results,showing the validity of the presented model. Hence, the proposed model can be a good tool for the device designers to provide accurate first-order design schemes and physical insights into the high voltage triple RESURF SOI device with N-top layer.     

High holding voltage SCR for robust electrostatic discharge protection

A novel silicon controlled rectifier(SCR) with high holding voltage(Vh) for electrostatic discharge(ESD) protection is proposed and investigated in this paper. The proposed SCR obtains high Vhby adding a long N+ layer(LN+) and a long P+ layer(LP+), which divide the conventional low voltage trigger silicon controlled rectifier(LVTSCR) into two SCRs(SCR1: P+/Nwell/Pwell/N+ and SCR2: P+/LN+/LP+/N+) with a shared emitter. Under the low ESD current(IESD), the two SCRs are turned on at the same time to induce the first snapback with high V_h(V_(h1)). As the IESDincreases, the SCR2 will be turned off because of its low current gain. Therefore, the IESDwill flow through the longer SCR1 path, bypassing SCR2, which induces the second snapback with high V_h(V_(h2)). The anti-latch-up ability of the proposed SCR for ESD protection is proved by a dynamic TLP-like(Transmission Line Pulse-like) simulation. An optimized V_(h2) of 7.4 V with a maximum failure current(I_(t2)) of 14.7 m A/μm is obtained by the simulation.     

The breakdown mechanism of a high-side pLDMOS based on a thin-layer silicon-on-insulator structure

A high-side thin-layer silicon-on-insulator (SOI) pLDMOS is proposed, adopting field implant (FI) and multiple field plate (MFP) technologies. The breakdown mechanisms of back gate (BG) turn-on, surface channel punch-through, and vertical and lateral avalanche breakdown are investigated by setting up analytical models, simulating related parameters and verifying experimentally. The device structure is optimized based on the above research. The shallow junction achieved through FI technology attenuates the BG effect, the optimized channel length eliminates the surface channel punch-through, the advised thickness of the buried oxide dispels the vertical avalanche breakdown, and the MFP technology avoids premature lateral avalanche breakdown by modulating the electric field distribution. Finally, for the first time, a 300 V high-side pLDMOS is experimentally realized on a 1.5 μ m thick thin-layer SOI.     

催化脱硝技术研究进展—催化剂的种类、制备方法及催化活性

随着工业及城市交通的发展,其所排放的NO和NO_2逐渐增多,由此导致的光化学烟雾、酸雨等大气污染问题愈加严重,与此同时,人类的身体健康也同样受到了威胁.据此, NO_x的消除成为当下的一个重要研究方向.目前NO_x的去除方法主要为选择性催化还原(SCR)去除方法,该法具有高效率的NO_x去除效果、高温度区间,较低的SO_2转化率等特点.催化剂在SCR反应中起着关键和核心作用, NO_x脱除效率的高低取决于催化剂的催化效率,如何提高催化剂的催化效率一直是研究者不断努力的目标.催化剂由载体和活性组分两大部分构成,载体的物质种类、活性组分的组成物质以及二者间的相互作用,是影响催化效率的主要因素.载体物质目前常用的主要是Al_2O_3、 SiO_2和TiO_2等金属氧化物,而活性组分则主要为Pd、 Pt、 Mn、 Ce、 V和W等,但目前应用较为广泛的活性组分主要为Mn、 Ce、 V和W等.研究开发新的载体物质及活性组分对催化脱硝技术的进步具有十分重要的意义.     

铜和铝离子/UV催化臭氧降解偶氮二异丁腈废水研究

利用多相催化臭氧(O3)工艺处理偶氮二异丁腈(AIBN)废水,探讨不同催化O3体系(Cu2+、Al3+、Cu2++Al3+/UV催化O3)对AIBN废水中氰类污染物的降解特性,并对不同催化O3体系的动力学特性进行研究。结果表明,金属离子对催化O3工艺的处理效率具有明显影响,不同催化O3工艺对CN-去除作用都呈现起始去除速率较高而后减弱的特点,其中Cu2+和Al3+共同催化O3工艺的整体去除率较高,优于单独Cu2+和Al3+的催化性能。这可能是由于p H变化、金属离子与CN-配合作用、金属离子和O3作用的综合影响结果。动力学研究结果表明,不同催化O3体系降解AIBN废水中的CN-污染物的氧化反应符合准一级动力学反应,表观反应速率常数k在0.0245~0.00301 min-1之间。     

物質的颜色

对这个問題,首先由光的性質、眼和視觉談起,从而对光与物質的作用,加以广泛介紹,最后从物質結構的观点,对物質显現顏色的原因,根据收集的材料,写出初步的解釋,想这样对物質的顏色作点滴的了解。     

Novel high-voltage power lateral MOSFET with adaptive buried electrodes

A new high-voltage and low-specific on-resistance (R on,sp ) adaptive buried electrode (ABE) silicon-on-insulator (SOI) power lateral MOSFET and its analytical model of the electric fields are proposed. The MOSFET features are that the electrodes are in the buried oxide (BOX) layer, the negative drain voltage V d is divided into many partial voltages and the output to the electrodes is in the buried oxide layer and the potentials on the electrodes change linearly from the drain to the source. Because the interface silicon layer potentials are lower than the neighboring electrode potentials, the electronic potential wells are formed above the electrode regions, and the hole potential wells are formed in the spacing of two neighbouring electrode regions. The interface hole concentration is much higher than the electron concentration through designing the buried layer electrode potentials. Based on the interface charge enhanced dielectric layer field theory, the electric field strength in the buried layer is enhanced. The vertical electric field E I and the breakdown voltage (BV) of ABE SOI are 545 V/μm and -587 V in the 50 μm long drift region and the 1 μm thick dielectric layer, and a low R on,sp is obtained. Furthermore, the structure also alleviates the self-heating effect (SHE). The analytical model matches the simulation results.