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1.
陈开茅  金泗轩  邱素娟 《物理学报》1994,43(8):1352-1359
用深能级瞬态谱(DLTS)技术测量了高温退火的Be和Si共注入的LEC半绝缘GaAs(无掺杂)。在多子脉冲作用下的Al/Be-Si共注LECSIGaAs肖特基势垒中,观测到E01(0.298),E02(0.341),E03(0.555)和E04(0.821)等四个电子陷阱以及两个主要的少子(空穴)陷阱H'03(0.54)和H″03(0.57)。两少子陷阱的DLTS信号具有若干特点,比如它们的DLTS·峰难于通过增宽脉冲达到最大高度;以及峰的高度强烈地依赖于温度等。这些现象可以用少子陷阱的少子俘获和热发射理论进行合理地解释。鉴于用DLTS技术测量这种陷阱的困难,我们用恒温电容瞬态技术测定它们的空穴表观激活能分别为0.54和0.57eV。它们是新观测到的和Be-Si共注SIGaAs有关缺陷。 关键词:  相似文献   

2.
In the present work the photoconductive response of low resistivity, n-type GaAs epitaxial layers is studied by experimentally monitoring the dependence of the photoconductive gain (PG) optoelectronic parameter upon incident photon flux and temperature. The characterized samples fall into three major categories: ion implanted (II) GaAs epilayers formed within undoped, semi-insulating GaAs substrates; GaAs epitaxial layers grown by liquid phase epitaxy (LPE) on Cr-doped, semi-insulating GaAs substrates; and ungated GaAs MESFETs.  相似文献   

3.
邱素娟  陈开茅  武兰青 《物理学报》1993,42(8):1304-1310
用深能级瞬态谱(DLTS)详细研究了硅离子注入Liquid-encapsulated Czochralski(缩写为LEC)半绝缘GaAs的深中心。结果表明,在注硅并经高温退火的有源区中观测到4个多子(电子)陷阱,E01,E02,E03和E04。它们的电子表观激活能分别为0.298,0.341,0.555和0.821eV。其中E04与EL2有关,但不是EL2缺陷。E04的电子 关键词:  相似文献   

4.
Deep level transient spectroscopy(DLTS) as a method to investigate deep traps in AlGaN/GaN heterostructure or high electron mobility transistors(HEMTs) has been widely utilized.The DLTS measurements under different bias conditions are carried out in this paper.Two hole-like traps with active energies of E_v + 0.47 eV,and E_v + 0.10 eV are observed,which are related to surface states.The electron traps with active energies of E_c-0.56 eV are located in the channel,those with E_c-0.33 eV and E_c-0.88 eV are located in the AlGaN layer.The presence of surface states has a strong influence on the detection of electron traps,especially when the electron traps are low in density.The DLTS signal peak height of the electron trap is reduced and even disappears due to the presence of plentiful surface state.  相似文献   

5.
ZnO films have been prepared on p-type Si substrates by metal-organic chemical vapour deposition (MOCVD) at different total gas flow rates. The current versus voltage and temperature (I - V - T) characteristics, the deep-level transient spectroscopy (DLTS) and the photoluminescence (PL) spectra of the samples were measured. DLTS shows two deep-level centres of E1 (Ec-0.13±0.02eV) and E2 (Ec-0.43±0.05eV) in sample 1202a, which has a ZnO/p-Si heterostructure. A deep level at Ec-0.13±0.01 eV was also obtained from the I -T characteristics. It was considered to be the same as E1 obtained from DLTS measurement. The emission related to this deep level center was detected by PL spectra. In addition, the energy location and the relative trap density of E1 was varied when the total gas flow rate was changed.  相似文献   

6.
Defects created in rapid thermally annealed n-GaAs epilayers capped with native oxide layers have been investigated using deep-level transient spectroscopy (DLTS). The native oxide layers were formed at room temperature using pulsed anodic oxidation. A hole trap H0, due to either interface states or injection of interstitials, is observed around the detection limit of DLTS in oxidized samples. Rapid thermal annealing introduces three additional minority-carrier traps H1 (EV+0.44 eV), H2 (EV+0.73 eV), and H3 (EV+0.76 eV). These hole traps are introduced in conjunction with electron traps S1 (EC-0.23 eV) and S2 (EC-0.45 eV), which are observed in the same epilayers following disordering using SiO2 capping layers. We also provide evidence that a hole trap whose DLTS peak overlaps with that of EL2 is present in the disordered n-GaAs layers. The mechanisms through which these hole traps are created are discussed. Capacitance–voltage measurements reveal that impurity-free disordering using native oxides of GaAs produced higher free-carrier compensation compared to SiO2 capping layers. Received: 12 March 2002 / Accepted: 15 July 2002 / Published online: 22 November 2002 RID="*" ID="*"Corresponding author. Fax: +61-2/6125-0381, E-mail: pnk109@rsphysse.anu.edu.au  相似文献   

7.
用深能级瞬态谱(DLTS)和恒温电容瞬态等技术研究了浅杂质注入LEC半绝缘GaAs的γ射线辐照缺陷。在Be-Si共注的LEC半绝缘GaAs中,γ射线辐照引入一电子陷阶E2,并且大大增强了原有的E01(0.298)和E02(0.341)等缺陷,同时明显地瓦解了原有的少子陷阱H03。在单纯注Si的LEC半绝缘GaAs中,γ射线辐阳引进了E'01(0.216),E'02(0.341),E'2,E'4和E'5(0.608)等缺陷。其中E01和E'01是新发现的和γ辐照有关的GaAs缺陷。和低阻衬底同质外延GaAs相比,Be-Si共注LEC半绝缘GaAs具有较低的γ射线辐照缺陷引入率,与此相反,单纯注Si的LEC半绝缘GaAs具有较高的γ射线辐照缺陷的引入率。 关键词:  相似文献   

8.
The authors review what has been learned concerning the electrical and annealing properties of point defects in high-energy electron or proton irradiated Si from deep level transient spectroscopy (DLTS). The authors have focused mainly on the properties of electron traps, and to a lesser extent on the properties of hole traps. In addition to an in-depth discussion of hydrogen-related defects in Si, this review article provides a brief tutorial on ion-solid interactions and the theory underlying DLTS. The authors also provide a few examples of the power of high resolution Laplace DLTS in analyzing radiation induced defects. The collection of results gathered in this article may provide the fundamental information for successful defect engineering in light-particle irradiated Si.  相似文献   

9.
The occurence and physical properties of electron traps in device-quality VPEn-GaAs are studied using transient capacitance and DLTS (deep level transient spectroscopy). Four traps labeled A, B, C, and F are seen. Trap A is identified to be the same as the often reported one, commonly attributed to oxygen in substrate material; this trap is also dominant in the VPE layers. The other traps are (to our knowledge) reported here for the first time. No correlation appears to exist between the concentrations of the various traps. The emission rate vs. temperature dependence, a characteristic physical property, is obtained for each of these traps.  相似文献   

10.
In this paper we propose to use a combination of a modified isothermal Deep Level Transient Spectroscopy (IDLTS) method with optical excitation and a filtering method of multi-exponential decays for IDLTS signal represented by a nonexponential transient capacitance. Excellent agreement with published results is achieved using this method for the investigation of a hole trap response (HL4) interfering with other traps in Schottky barriers that were fabricated on an epitaxial GaAs layer grown by VPE on bulk N-GaAs.The authors express sincere thanks to I. Thurzo and F. Dubecký of the Slovak Academy of Sciences who provided samples for these experiments and for useful advice.  相似文献   

11.
This paper describes the principle of the determination of interface-state parameters by deep level transient spectroscopy (DLTS) and presents a new, simple and exact method to discriminate the DLTS signal due to the emission from interface states from that from bulk traps. The n-type Au-GaAs and Cr-GaAs interfaces have been investigated by the technique. The results obtained in the investigation have revealed the dependences of the energy position, density and capture cross section for the interface states on the metal deposited onto the semiconductor surface, which is consistent with the theoretical prediction by Yndurain and the experimental results obtained by other authors.  相似文献   

12.
应用深能级瞬态谱(DLTS)技术详细研究分子束外延生长的Pseudomorphic—high electron mobility transistor(P-HEMT)结构中深能级行为。样品的DLTS表明,在P-HEMT结构的n-AlGaAs层里存在着较大浓度(1015-1017cm-3和俘获截面(10-16cm2)的高温电子陷阱。它们直接影响着器件性能。高温电子陷阱的产生可能与AlGaAs层里的氧  相似文献   

13.
The defects at the Si/SiO2 interface have been studied by the deep-level transient spectroscopy (DLTS) technique in p-type MOS structures with and without gold diffusion. The experimental results show that the interaction of gold and Si/SiO2 interface defect,Hit(0.494), results in the formation of a new interface de-fect, Au-Hit(0.445). Just like the interface defect, Hit(0.494), the new interface defect possesses a few interesting properties, for example, when the gate voltage applied across the MOS structure reduces the energy interval between Fermi-level and Si valence band of the Si surface to values smaller than the hole ionization Gibbs free energy of the defect, a sharp DLTS peak is still observable; and the hole apparent activation energy increases with the decrease of the Si surface potential barrier height. These properties can be successfully explained with the transition energy band model of the Si/SiO2 interface.  相似文献   

14.
应用深能级瞬态谱(DLTS)技术研究分子束外延(MBE)生长的AlGaAs/GaAs graded index separate confinement heterostructure single well(GRIN-SCH SQW)激光器的高温陷阱。样品的DLTS表明,在激光器的n-AlGaAs层里存在着高温(空穴、电子)陷阱,它直接影响着激光器的性能。高温空穴陷阱可能分布在xAl =0.2→0.43和xAl=0.43的n-AlGaAs层界面附近,而高温电子陷阱则可能分布在xAl=0.43的n-AlGaAs层里xAl值不连续的界面附近。高温电子陷阱的产生可能与AlGaAs层里的O有关。 关键词:  相似文献   

15.
The effect of doping of the polyaniline emeraldine base (PEB), with Ni as well as Ni over layer coating has been investigated using variable low energy positron beam. Depth-resolved Doppler S-parameter measurements have been performed on undoped, Ni-doped polyaniline (PANI), and Ag (40 nm) film deposited PANI samples. Significant variation in S-parameter is observed for undoped and Ni-doped PANI. The size of the free volume hole has shifted to lower values upon doping with Ni as compared to that of undoped PANI, which is consistent with the conductivity measurements. For Ag-coated PANI systems, the S vs. Ep curves show distinct changes at the surface and interior regions. These results are discussed in the light of changes in free volume hole size distribution.  相似文献   

16.
吴征  周炳林  张桂成 《发光学报》1987,8(2):135-141
用DLTS和单次脉冲瞬态电容技术研究了液相外延生长的双异质结AlxGa1-xAs/GaAs发光管,掺Si的n-Al0.05Ga0.95As有源层中的深能级。着重分析了一个与氧有关的电子陷阱,其发射激活能为EC-ED=0.29eV。我们发现该电子陷阱随正向注入脉冲宽度tp的增加DLTS峰向低温移动,即在确定的温度下发射率随tp的增加而增加。用DLTS首次测得该能级的俘获瞬态谱,发现俘获峰随反向撤空脉冲宽度tR的增加向低温端移动,即在确定的温度下俘获率随tR的增加而增加,并且俘获激活能从△Eσ=0.28eV变化到0.26eV,用位形坐标图讨论了引起变化的原因。  相似文献   

17.
Low temperature (2dg K) photoluminescence measurements have been performed on (i) Cr-diffused and (ii) thermally converted SI Cr-doped, GaAs substrates. Several defect related luminescence peaks have been observed but the deep levels (present in the original SI samples) associated with Cr impurities are totally absent in the above two substrates, instead a new band peaking at 1.23 eV is observed in the Cr-diffused samples. Possible causes are outlined.  相似文献   

18.
The defects at the Si/SiO2 interface have been studied by the deep-level transient spectroscopy (DLTS) technique in p-type MOS structures with and without gold diffusion. The experimental results show that the interaction of gold and Si/SiO2 interface defect,Hit(0.494), results in the formation of a new interface de-fect, Au-Hit(0.445). Just like the interface defect, Hit(0.494), the new interface defect possesses a few interesting properties, for example, when the gate voltage applied across the MOS structure reduces the energy interval between Fermi-level and Si valence band of the Si surface to values smaller than the hole ionization Gibbs free energy of the defect, a sharp DLTS peak is still observable; and the hole apparent activation energy increases with the decrease of the Si surface potential barrier height. These properties can be successfully explained with the transition energy band model of the Si/SiO2 interface.  相似文献   

19.
We investigate the density of states (DOS) for hole transport in undoped and doped amorphous organic films using high lateral resolution Kelvin probe force microscopy. Measurements are done on field effect transistors made of N,N1-diphenyl-N, N1-bis(1-naphthyl)-1,10-biphenyl-4,4II-diamine undoped or p doped with tetrafluoro-tetracyanoquinodimethane. We determine the DOS structure of the undoped material, including an anomalous peak related to interfaces between regions of different surface potential, the DOS doping-induced broadening, and doping-induced sharp peaks on the main DOS distribution.  相似文献   

20.
Thin film CdS/CdTe solar cells have been prepared by conventional vacuum deposition technique. Deep level transient spectroscopy (DLTS), temperature and frequency dependent capacitance-voltage (C-V) measurements were utilised to investigate the performance limiting defect states in the CdTe layer subjected to the post deposition treatments such as CdCl2-dipping and/or annealing in air. Five hole traps, all of which have been previously reported in the literature, were identified in as-grown CdTe at 0.19, 0.20, 0.22, 0.30 and 0.40 eV above the valence band. A single hole trap level has been evidenced at 0.45 eV after both post deposition heat and CdCl2 treatments.  相似文献   

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