BEPCⅡ国产500 MHz超导腔运行综述

北京正负电子对撞机二期(BEPCⅡ),国产500 MHz超导腔经过紧张的安装调试于2017年10月正式投入带束流运行。首先对此国产超导腔两次降温调试的相关参数进行了监测和对比分析;其次研究了通过高功率老练的方法改善超导腔的品质因数,并实时监测超导腔老练过程中的辐射剂量;最后对超导腔的带束流运行情况进行了介绍分析。结果表明:BEPCⅡ国产500 MHz超导腔虽然放置了6年,但是状态良好,通过高功率老练能够降低超导腔的辐射剂量,改善其性能,完全满足束流运行要求。     

超导薄膜磁场穿透深度的双线圈互感测量

磁场穿透深度是联系超导体宏观电动力学与微观机制的重要物理量,其精确测量对于研究超导机理以及探索超导应用具有重要意义.在众多的磁场穿透深度测量方法中,双线圈互感法具有测量精度高、技术相对成熟、对样品没有破坏等优点,可被用于细致地研究超导薄膜的磁场穿透深度对温度、掺杂、外延应力等参量的依赖关系.本文首先简要介绍了双线圈互感法的基本原理,指出该方法的测量精度主要受系统几何参数及薄膜边缘漏磁的影响;之后对自主设计搭建的透射型双线圈互感装置进行了系统的校验,并详细说明了其测量精度:对于厚度为100 nm,穿透深度为150 nm的典型薄膜样品,穿透深度绝对值的测量误差小于10%;最后通过测量NbN超导薄膜的磁场穿透深度进一步检验了装置的精度,分析表明穿透深度的测量值与文献报道结果符合.     

Horizontal test for BEPCⅡ 500 MHz spare cavity

The horizontal test for the BEPCⅡ 500 MHz spare cavity has been completed at IHEP. The maximum voltage of the cavity reached 2.17 MV, while Q₀ was 5.78× 10⁸. The process and results of the high power horizontal test are presented and discussed in this paper.     

High power conditioning of the input coupler for BEPCⅡ superconductingcavity

High power conditioning of the input coupler for BEPCII superconducting cavity has been performed. After room temperature conditioning, the RF power of 150 kW with continuous wave at standing wave mode passed through the coupler without any problem. Meanwhile, a series of methods have also been studied to improve the performance of the coupler during the beam operation. Up to now, the input coupler can feed a RF power up to 100 kW stably with high current of 250 mA at 2.5 GeV.     

FPGA-based amplitude and phase detection in DLLRF

The new generation particle accelerator requires a highly stable radio frequency（RF） system. The stability of the RF system is realized by the Low Level RF（LLRF） subsystem which controls the amplitude and phase of the RF signal. The detection of the RF signal＇s amplitude and phase is fundamental to LLRF controls. High-speed ADC（Analog to Digital Converter） ,DAC（Digital to Analog Converter） and FPGA（Field Programmable Gate Array） play very important roles in digital LLRF control systems. This paper describes the implementation of real-time amplitude and phase detection based of the FPGA with an analysis of the main factors that affect the detection accuracy such as jitter,algorithm＇s defects and non-linearity of devices,which is helpful for future work on high precision detection and control.