数字BPM时钟锁相电路的设计与实现

为实现数字BPM时钟系统的锁相,设计了一种基于锁相环同步原理的低抖动、低相位噪声的时钟同步系统。根据锁相环电路工作原理,对数字BPM时钟同步系统的硬件及固件程序进行了设计,实现了外部输入时钟信号与系统内部产生的主工作时钟信号的锁相,并且时钟信号输出的频率及相位均可调整以满足后端ADC采样的要求。测试结果表明,设计可以完成对一定频率范围内变化的外部输入时钟信号的锁相,输出时钟信号抖动满足束流实验要求,为数字BPM后续算法研究提供了基础。     

一种新型的FPGA实现RS422串口通信方法

在FPGA实现RS422串口通信的常用方法中经常遇到诸多问题,如FIFO深度读取不正确、FIFO写数据端口与读数据端口时序竞争、多个模块间信号延时导致FPGA亚稳态等问题,因此设计了一种新型的RS422串口通信实现方法;该方法通过利用寄存器数组作为循环缓存代替FIFO,利用计数器代替传统的波特率产生模块,把常用方法中的多个模块整合成一个模块,只采用一个主时钟,所有寄存器的时钟输入端共享一个时钟,对FPGA逻辑与时序进行了有效约束,避免了FPGA中亚稳态产生;试验结果表明该方法实现的RS422串口通信高速、可靠、稳定,并且利用FPGA实现RS422串口通信,可使整个系统更为灵活、紧凑,减小整个电路的体积,提高系统的可靠性和稳定性。     

A pipelined architecture for real time correction of non-uniformity in infrared focal plane arrays imaging system using multiprocessors

This paper proposes a kind of pipelined electric circuit architecture implemented in FPGA, a very large scale integrated circuit (VLSI), which efficiently deals with the real time non-uniformity correction (NUC) algorithm for infrared focal plane arrays (IRFPA). Dual Nios II soft-core processors and a DSP with a 64+ core together constitute this image system. Each processor undertakes own systematic task, coordinating its work with each other’s. The system on programmable chip (SOPC) in FPGA works steadily under the global clock frequency of 96Mhz. Adequate time allowance makes FPGA perform NUC image pre-processing algorithm with ease, which has offered favorable guarantee for the work of post image processing in DSP. And at the meantime, this paper presents a hardware (HW) and software (SW) co-design in FPGA. Thus, this systematic architecture yields an image processing system with multiprocessor, and a smart solution to the satisfaction with the performance of the system.     

分布式测试系统时间同步技术的研究

分布式测试系统是集计算机控制技术、网络通信技术与多传感器信息融合技术于一体的复杂测控系统;与独立测试系统不同,在网络化分布式测试系统中,各测试装置需按通信协议与网关节点通信以完成相应的测试;不同测试装置在接收网关节点发出的信号时,由于传输距离不同会引起时延差;如果系统中的各个测试装置不具备统一的时间基准,那么得到的测试数据因为时钟差异将无法反映出信息的真实情况;因此,整个网络中所有测试装置需要保持时间同步;针对分布式测试系统时间同步的需求,对信号传输过程中的时延问题进行了研究,提出了一种基于FPGA的时延测量方法,对这种软硬件结合时延测量方法的实现原理进行了详细阐述,并进行了功能仿真及试验验证。     

A simple timing circuit for optical PCM repeaters

A simple synchronization system is proposed for timing recovery in optical PCM repeaters. The basic idea is to exploit the spectral line at the transmission rate, which is already present in the unipolar symbol stream travelling along the fibre. Since a nonlinear circuit is no longer needed, the amplified signal at the photodetector output is directly filtered by a resonant circuit to give the clock recovery by means of a zero-crossing detector. The limits of effectiveness of this synchronization system are then discussed, especially with regard to the accumulation of timing jitter as well as of alignment error.     

CMOS传感器感光范围测定系统及其可编程接口的实现

介绍了一种实用的CMOS传感器感光范围测定系统。利用积分球作标准光源,并用逻辑分析仪作数字输出信号的分析统计,测出CMOS传感器光照度接收曲线。在此基础上提出了一种基于可编程接口(FPGA)芯片控制的CMOS传感器自动调光技术。利用FPGA控制CMOS传感器的电子快门,以此来控制其光照度,达到自动调光的目的。由于FPGA是在线可编程器件,具有电路简单,实时性好,适应性强等特点,并能与后期的图像处理有机结合,所以简化了整个系统的设计。     

一种便携式冲击波超压测试系统

针对现在军用和民用对爆破的测量需求,提出了一种基于现场可编程逻辑门阵列FPGA和ICP传感器的便携式冲击波超压测试系统。测试系统主要以FPGA为主控芯片,采用ICP压电传感器,包含信号放大调理电路,AD转换电路,存储器模块以及工作状态显示电路。系统具有光触发、节点互触发和多节点同步触发等多种触发方式,连续重触发功能,以及多次采集时FLASH分块存储功能。系统上位机是以VC++为开发工具设计的软件,用于对数据进行分析、处理和显示。实验结果表明系统工作可靠,操作简便,能够实现对爆破冲击波超压的测试。     

IIC总线和LVDS在高速数据传输接口电路中的应用研究

当前在高速数据系统中,LVDS接口已被广泛应用,为实现同系列设备之间的智能识别、自动握手以及LVDS高速数据链路通信质量的检测,利用FPGA的IO电路结构,设计一种模拟IIC总线协议电路,该IIC总线高效地实现设备之间的信息双向传递;同时利用FPGA内部丰富寄存器资源设计PRBS码型电路来检测LVDS接口芯片电路误码率。实际测试表明该多通道LVDS传输方式在2米长电缆连接能够实现数据的稳定、低误码率传输,并且在时钟频率为100MHz时,数据传输速率高达4.68Gb/s。     

亚像元边缘检测系统的FPGA实现

提出了一种集成于单片FPGA的数字化线阵CCD边缘检测系统。通过对CCD输出图像的边缘灰度梯度分析,利用高斯滤波除噪、边缘检测算法确定其像元级边界,并提出了一种以最小二乘多项式拟合来确定亚像元级边界位置的新算法。整个系统以现场可编程门阵列器件作为核心及数字电路硬件的载体,利用VHDL语言及图形化输入方式在QuartusⅡ7.2软件平台上进行了系统的设计。误差分析及仿真结果表明,该边缘检测系统的分辨率可达到将近六十分之一的像元宽度,可应用于研制高精度CCD光电自准直仪。     

A new synchronization scheme based on time division multiplexing and wavelength division multiplexing technology for practical quantum key distribution system

Three clock synchronization schemes for a quantum key distribution system are compared experimentally through the outdoor fibre and the interaction physical model of the the clock signal and the the quantum signal in the quantum key distribution system is analysed to propose a new synchronization scheme based on time division multiplexing and wavelength division multiplexing technology to reduce quantum bits error rates under some transmission rate conditions.The proposed synchronization scheme can not only completely eliminate noise photons from the bright background light of the the clock signal,but also suppress the fibre nonlinear crosstalk.     

基于EPL的分布式时钟同步方法

工业以太网协议Ethernet POWERLINK(EPL)分布式站点的时钟同步方法并不能在实时运行过程中保持很高的同步精度,无法满足特定环境下的控制要求。研究了工业以太网协议EPL的两种时钟同步机制,通过数理计算分析了时钟同步误差产生的原因,针对误差较大的缺点,提出了减小误差的方法。通过迭代计算消除了主从站同步报文往返的路径延迟,并设计基于现场可编程门阵列(FPGA)的集线器(Hub)用于EPL菊花链网络拓扑结构,有效地克服了时钟同步报文往返传输延时不一致的缺点,测试结果表明新方法明显优于协议自身的时钟同步方法,对于实现基于EPL的高精度分布式时钟同步网络具有重要意义。     

小型集成三通道机抖激光陀螺数字式控制电路设计

针对军事和民用工程中亟待解决的捷联式机械抖动激光陀螺惯导的小型化、集成化和高精度问题,提出了一种以单块电路板实现对3个机械抖动激光陀螺进行数字式稳频控制、抖动控制、稳流控制、信号检测及脉冲计数的全功能小型机抖激光陀螺集成控制方案,设计了以DSP和FPGA为核心控制器的陀螺电路。试验结果表明,该集成控制电路能同时实现3路陀螺的自动控制,参数调整灵活方便,控制精确稳定,在实现小型化集成化的同时,提高了激光陀螺的输出精度,为捷联式机械抖动激光陀螺惯导的小型化、集成化和高精度奠定了基础,已在多个项目中获得工程应用,具有较高实用价值。     

基于FPGA的准直测角系统

为了提高线阵CCD准直测角系统的精度、速度、集成度,以及可靠性,提出一种集成于单片FPGA、光积分时间可自适应调节的片上准直测角系统。以FPGA作为系统处理核心,利用高斯滤波算法对CCD输出信号进行数字滤波,利用边缘自动检测算法获得图像的像元级边界,在此基础上应用多项式插值算法对图像边缘位置进行亚像元细分,最终计算出失准角。利用VHDL语言以及MAX+plus II软件完成了系统设计。系统仿真和实验表明,所设计的片上系统具有高精度、高集成度、高可靠性的特点。     

神龙一号电子束束参数测量系统猝发式的精确触发方式研究

为了准确了解电子束随时间变化的性能, 在神龙一号直线感应加速器上进行电子束束参数测量时要求测量系统精确地同步于电子束的产生和输运. 其功率系统开关放电波形后沿幅度高达250kV, 下降时间约20ns, 并且从该下降沿到电子束打靶的时间有145ns, 抖动1—2ns, 非常稳定; 如果以陡峭的后沿作为测量时间基准, 则可以获得与其抖动相同量级的同步精度. 因此通过对其波形的下降沿进行微分来获取测量系统的触发信号, 选择合适的微分参数可以得到对应于下降沿 约ns级精度的测量时间基准, 通过采用光纤驱动电路完全消除了高压开关对低压测量系统的干扰, 保证测量系统正常工作. 该方法消除了传统触发方式因延时长、精度低、抖动大等对确定测量时间基准的不利影响, 满足了使用高速测量设备准确获取电子束不同时刻的束参数波形的精确触发要求.     

Accurate Burst Trigger Mode for Dragon-Ⅰ Electron Beam Measurement System

The electron beam measurement system for Dragon-I must work synchronously with the beam production and transportation accurately in order to obtain correct data．The synchronization with about 1ns is important．The output waveform of Blumlein lines in pulsed-power system is of amplitude of about 250kV and 20ns active edge time(following edge)．The electron beam will hit the conversion target in about 145ns later steadily and the jitter time is about 1—2ns．The synchronization precision with the same level of the jitter time will be reached if the sharp following edge of waveform is selected to be the time base．The synchronization trigger signal for measurement system can be obtained by the way of differentiating the following edge and the accuracy of about ns can also be reached with suitable circuit parameters．The optical fiber is also adopted to remove the interference on the measurement system from the high voltage system．This kind of burst trigger mode overcomes many disadvantages such as low accuracy, long delay time, large jitter in normal trigger mode and can provide the trigger time accurately．It can meet the need to measure the electron beam parameters at any required time．     

光通信数字接收中位同步信号的智能提取

在光通信数字接收机中,为了达到系统的位同步,结合数字锁相环的基本原理,采用现场可编程技术,设计了位同步信号的时序逻辑电路,并用FPGA芯片实现了整个位同步电路.通过单片机实时控制FPGA,进行频带宽度和中心频率的实时调节,实现了位同步信号的智能提取.仿真分析和实际测试表明,该系统具有实时跟踪,提取快速且稳定,抗干扰能力强,升级方便等特点.     

基于FPGA和蓝牙的远程图像采集同步系统

针对核物理实验中高精度时间同步触发图像采集系统的要求,设计了一套基于FPGA和蓝牙的远程图像采集同步系统。该系统以FPGA作为主控制器,负责USB 接口通信、命令解析、蓝牙通信和同步控制等,触发信号延时精度可达10 ns;使用RS485 或TTL 标准以适应长距离触发和短距离触发,通过GigE 千兆网口实现远程图像数据采集。采用LabVIEW 开发了上位机图形化软件界面,基于蓝牙BLE4.0 协议,实现了基于手机APP的无线终端控制,完成了对相机延时时间、同步触发脉冲宽度、图像采集等命令的同步控制。A image acquisition and synchronization control system based on FPGA (Field Programmable Gate Array) and bluetooth is studied in this paper. FPGA as the main controller is responsible for USB (Universal Serial BUS) interface, command analyze, delay control, and trigger signal generation. Trigger signal can be RS485 or TTL. RS485 signals can be used for long-distance transmission without distortion while TTL is suitable for near field. The system's delay accuracy is reached to 10ns. It can be obtain images from GigE Ethernet port. Meanwhile,a PC graphical control software is developed by LabView. And based on the Bluetooth BLE4.0 protocol, a Android mobile phone APP is developed for wireless control.     

Characteristic signal extracted from a continuous time signal on the aspect of frequency domain

Extracting characteristic signal from a continuous signal can effectively reduce the difficulty of analyzing the running states of a single-variable nonlinear system.Whether the extracted characteristic signal can accurately reflect the running states of the system is very important.In this paper, a method called automatic sampling method(ASM) for extracting characteristic signals is investigated.The complete definition is described, the effectiveness is proved theoretically, and the general formulas of the extracted characteristic signals are derived for the first time.Furthermore, typical Chua's circuit is used to accomplish a lot of experimental research on the aspect of frequency domain.The experimental results show that ASM is feasible and practical, and can automatically generate a characteristic signal with the change of the original signal.     

PCIe接口的BAC时统节点设计

针对BAC时统节点在PCIe计算机系统中的应用,基于新型线性隔离和PCIe端点硬核应用和BAC码转换解析,实现了一种BAC时统节点设计。实现了该节点的总体电路设计,同时实现了BAC输入信号的线性隔离电路、迟滞比较输出BAC信号采样点电路、BAC信号的A/D转换采集电路、ALTERA FPGA的FIFO和PCIe端点硬核应用设计。基于FPGA实现的PCIe接口、FIFO和控制逻辑计以及实现的线性隔离,在简化节点设计的同时,也大大提高了适用性。     

COMPASS time synchronization and dissemination—Toward centimetre positioning accuracy

In this paper we investigate methods to achieve highly accurate time synchronization among the satellites of the COMPASS global navigation satellite system (GNSS). Owing to the special design of COMPASS which implements several geo-stationary satellites (GEO), time synchronization can be highly accurate via microwave links between ground stations to the GEO satellites. Serving as space-borne relay stations, the GEO satellites can further disseminate time and frequency signals to other satellites such as the inclined geo-synchronous (IGSO) and mid-earth orbit (MEO) satellites within the system. It is shown that, because of the accuracy in clock synchronization, the theoretical accuracy of COMPASS positioning and navigation will surpass that of the GPS. In addition, the COMPASS system can function with its entire positioning, navigation, and time-dissemination services even without the ground link, thus making it much more robust and secure. We further show that time dissemination using the COMPASS-GEO satellites to earth-fixed stations can achieve very high accuracy, to reach 100 ps in time dissemination and 3 cm in positioning accuracy, respectively. In this paper, we also analyze two feasible synchronization plans. All special and general relativistic effects related to COMPASS clocks frequency and time shifts are given. We conclude that COMPASS can reach centimeter-level positioning accuracy and discuss potential applications.