采用发射极非均匀指间距技术改善功率异质结双极晶体管热稳定性的研究

为了提高多发射极功率异质结双极晶体管的热稳定性,本文利用耦合热阻表征发射极指间距变化对发射极指间热耦合作用的影响,得到了耦合热阻与发射极指间距之间的变化关系,提出了发射极非均匀指间距技术.通过热电反馈模型对采用发射极非均匀指间距技术的功率HBT进行热稳定性分析,得到了多发射极指上的温度分布.结果表明,多发射极HBT在采用非均匀发射极指间距技术后,峰值温度明显下降,温度变化幅度更加平缓,有效地提高了器件的热稳定性. 关键词： 异质结双极晶体管 耦合热阻 指间距     

Thermal stability improvement of a multiple finger power SiGe heterojunction bipolar transistor under different power dissipations using non-uniform finger spacing

A method of non-uniform finger spacing is proposed to enhance thermal stability of a multiple finger power SiGe heterojunction bipolar transistor under different power dissipations. Temperature distribution on the emitter fingers of a multi-finger SiGe heterojunction bipolar transistor is studied using a numerical electro-thermal model. The results show that the SiGe heterojunction bipolar transistor with non-uniform finger spacing has a small temperature difference between fingers compared with a traditional uniform finger spacing heterojunction bipolar transistor at the same power dissipation. What is most important is that the ability to improve temperature non-uniformity is not weakened as power dissipation increases. So the method of non-uniform finger spacing is very effective in enhancing the thermal stability and the power handing capability of power device. Experimental results verify our conclusions.     

Designing power heterojunction bipolar transistors with non-uniform emitter finger lengths to achieve high thermal stability

With the aid of a thermal-electrical model,a practical method for designing multi-finger power heterojunction bipolar transistors with finger lengths divided in groups is proposed.The method can effectively enhance the thermal stability of the devices without sacrificing the design time.Taking a 40-finger heterojunction bipolar transistor for example,the device with non-uniform emitter finger lengths is optimized and fabricated.Both the theoretical and the experimental results show that,for the optimum device,the peak temperature is lowered by 26.19 K and the maximum temperature difference is reduced by 56.67% when compared with the conventional heterojunction bipolar transistor with uniform emitter finger length.Furthermore,the ability to improve the uniformity of the temperature profile and to expand the thermal stable operation range is strengthened as the power level increases,which is ascribed to the improvement of the thermal resistance in the optimum device.A detailed design procedure is also summarized to provide a general guide for designing power heterojunction bipolar transistors with non-uniform finger lengths.     

新型宽温区高热稳定性微波功率SiGe 异质结双极晶体管

宽温区大电流下的热不稳定性严重制约着功率SiGe 异质结双极晶体管 (HBT) 在射频和微波电路中的应用.为改善器件的热不稳定性, 本文利用SILVACO TCAD建立的多指功率SiGe HBT模型, 分析了器件纵向结构中基区Ge组分分布对微波功率SiGe HBT电学特性和热学特性的影响. 研究表明, 对于基区Ge组分为阶梯分布的HBT, 由于Ge组分缓变引入了少子加速电场, 使它与均匀基区Ge组分HBT相比, 具有更高的特征频率f_T, 且电流增益β和f_T随温度变化变弱, 这有利于防止器件在宽温区工作时电学特性的漂移.同时, 器件整体温度有所降低, 但器件各指温度分布均匀性较差.考虑多指HBT各发射极指散热能力存在差异, 在器件纵向结构设计为基区Ge组分阶梯分布的同时, 对其横向版图进行发射极指间距渐变结构设计, 用于改善器件各指温度分布的均匀性, 进而提高HBT的热稳定性.结果表明, 与基区Ge组分为均匀分布的等发射极指间距结构HBT相比, 新器件各指温度分布均匀性明显改善, f_T保持了较高的值, 且β和f_T 随温度变化不敏感, 热不稳定性得到显著改善, 显示了新器件在宽温区大电流下工作的优越性. 关键词： SiGe 异质结双极晶体管 Ge组分分布 发射极指间距渐变技术 热稳定性     

三维单芯片多处理器温度特性

给出热阻矩阵的表达式,研究三维单芯片多处理器(3D CMP,three-dimensional chip-multiprocessor)的温度特性,通过Matlab分析热容、热阻和功耗对温度的影响.结果表明:减小热阻和功耗可以有效约束3D-CMP的稳态温度;热容增大可以导致3D-CMP温度上升时间变长,但不影响其最终稳态温度.     

基于拉曼热测量技术的铜基复合物法兰GaN基晶体管的热阻分析

采用拉曼热测量技术结合有限元热仿真模型,分析比较新型铜/石墨复合物法兰封装与传统铜钼法兰封装的GaN器件的结温与热阻,发现前者的整体热阻比铜钼法兰器件的整体热阻低18.7%,器件内部各层材料的温度分布显示铜/石墨复合物法兰在器件中的热阻占比相比铜钼法兰在器件中的热阻占比低13%,这证明使用高热导率铜/石墨复合物法兰封装提高GaN器件热扩散性能的有效性.通过对两种GaN器件热阻占比的测量与分析,发现除了封装法兰以外,热阻占比最高的是GaN外延与衬底材料之间的界面热阻,降低界面热阻是进一步提高器件热性能的关键.同时,详细阐述了使用拉曼光热技术测量GaN器件结温和热阻的原理和过程,展示了拉曼光热技术作为一种GaN器件热特性表征方法的有效性.     

功率AlGaAs/GaAs HBT自加热频率特性

提出了一种功率AlGaAs/GaAs HBT的自加热温度模型,讨论了在大电流条件下,器件晶格温度升高和基区扩展效应对HBT器件频率特性的影响,并对器件的晶格温度、截止频率和最高振荡频率在自加热条件下的变化分别进行了计算和模拟.     

能带工程对射频功率SiGe异质结双极晶体管热性能的改善

众所周知,基区"能带工程"可以改善Si_1-xGe _{x 基区异质结双极晶体管(HBT)的直流、频率和噪声等特性,但"能带工程"对HBT热学特性的影响的研究还很少。本文基于三维热电反馈模型,分析了"能带工程"对射频功率SiGe HBT热性能的影响。考虑到电流增益随温度的变化以及发射结电压负温度系数,给出了器件热稳定所需最小镇流电阻(REmin)的表达式,在此基础上给出了非均匀镇流电阻的设计,进一步提高了SiGe HBT的热稳定性 关键词： SiGe HBT Ge组分 热电反馈 镇流电阻}     

Power dissipation in oxide-confined 980-nm vertical-cavity surface-emitting lasers

We presented 980-nm oxide-confined vertical-cavity surface-emitting lasers (VCSELs) with a 16-μm oxide aperture. Optical power, voltage, and emission wavelength are measured in an ambient temperature range of 5℃ C-80℃. Measurements combined with an empirical model are used to analyse the power dissipation in the device and the physical mechanism contributing to the thermal rollover phenomenon in VCSEL. It is found that the carrier leakage induced selfheating in the active region and the Joule heating caused by the series resistance are the main sources of power dissipation. In addition, carrier leakage induced selfheating increases as the injection current increases, resulting in a rapid decrease of the internal quantum efficiency, which is a dominant contribution to the thermal rollover of the VCSEL at a larger current. Our study provides useful guidelines to design a 980-nm oxide-confined VCSEL for thermal performance enhancement.     

考虑界面接触热阻的一维复合结构的热整流机理

建立了考虑变截面、变热导率及界面接触热阻效应的组合热整流结构的温度场及热整流系数的理论模型和有限元解.数值算例证明了本文模型及算法的可靠性,进而通过参数影响研究确定了若干几何及材料参数对结构热整流系数的影响规律,揭示界面接触热阻对热整流效果的影响机理.研究结果表明长度比、截面半径变化率、热导率、边界条件温差和界面接触热阻等因素必须通过优化设计才能得到最大的热整流系数,同时界面接触热阻的引入也为调控热整流系数提供了一条新的途径.     

Analysis of temperature profiles of thermo-optic waveguides

The temperature profiles of thermo-optic waveguides are analyzed by the finite element method. The heat generated by a thin-film heater causes the temperature of a nearby waveguide to increase. The analysis results show that thermal coupling is a function of the waveguide spacing and depth. Thermal coupling increases with the waveguide depth but decreases with the waveguide spacing. Thermal coupling could be reduced by placing a cooler on the adjacent waveguide or etching a deep trench between the waveguides. The cooler can reduce the coupling, but it is not effective for deep waveguides. For the trenched structure, the temperature of the heated waveguide increases as the trench depth increases; however, the temperature of the nearby waveguide will decrease.     

A technique for simultaneously improving the product of cutoff frequency–breakdown voltage and thermal stability of SOI SiGe HBT

The product of the cutoff frequency and breakdown voltage( fT×BVCEO) is an important figure of merit(FOM) to characterize overall performance of heterojunction bipolar transistor(HBT). In this paper, an approach to introducing a thin N+-buried layer into N collector region in silicon-on-insulator(SOI) Si Ge HBT to simultaneously improve the FOM of fT×BVCEOand thermal stability is presented by using two-dimensional(2D) numerical simulation through SILVACO device simulator. Firstly, in order to show some disadvantages of the introduction of SOI structure, the effects of SOI insulation layer thickness(TBOX) on fT, BVCEO, and the FOM of fT×BVCEOare presented. The introduction of SOI structure remarkably reduces the electron concentration in collector region near SOI substrate insulation layer, obviously reduces fT, slightly increases BVCEOto some extent, but ultimately degrades the FOM of fT×BVCEO. Although the fT,BVCEO, and the FOM of fT×BVCEOcan be improved by increasing SOI insulator Si O_2 layer thickness TBOXin SOI structure, the device temperature and collector current are increased due to lower thermal conductivity of Si O_2 layer, as a result, the self-heating effect of the device is enhanced, and the thermal stability of the device is degraded. Secondly, in order to alleviate the foregoing problem of low electron concentration in collector region near SOI insulation layer and the thermal stability resulting from thick TBOX, a thin N+-buried layer is introduced into collector region to not only improve the FOM of fT×BVCEO, but also weaken the self-heating effect of the device, thus improving the thermal stability of the device. Furthermore, the effect of the location of the thin N+-buried layer in collector region is investigated in detail. The result show that the FOM of fT×BVCEOis improved and the device temperature decreases as the N+-buried layer shifts toward SOI substrate insulation layer. The approach to introducing a thin N+-buried layer into collector region provides an effective method to improve SOI Si Ge HBT overall performance.     

Electro-thermal analysis of non-rectangular FinFET and modeling of fin shape effect on thermal resistance

A novel non rectangular structure of Fin field-effect transistor with the modified channel is introduced as the solution of corner effects. In the proposed FinFET, the top region of fin has cylindrical structure and the bottom region of the fin has a rounded shape. The extended bottom region of fin with a round shape reduces the self-heating effects by distributing the heat from the widespread edges. The top cylindrical region of fin adjusts the corner effects and improves the gate controllability over the channel. The proposed structure with the modified channel which is called MC-FinFET is proven to have better thermal stability, lower hot carrier and self heating effects, improved short channel effects, reduced DIBL and better subthreshold characteristics in comparison with a conventional FinFET. Here, by a thermal conductivity model the effect of fin shape on the thermal resistance and the effective width of the proposed irregular FinFET is analyzed. Moreover, the thermal sensitivity of electro-thermal characteristics in the proposed structure is evaluated with three-dimensional simulations. The superiority of the MC-FinFET is owing to the sharp edges elimination for reducing the self-heating and corner effects. The electro-thermal results demonstrate the ability of MC-FinFET as a higher performance device over the conventional one.     

非制冷热像仪内部温升对测温精度的影响修正

随着非制冷型热像仪工作时间的增长,其内部器件、机械结构所积累的热量越来越多,其温升所导致的热辐射势必会对热像仪的测温精度产生严重影响。因此,要实现热像仪的准确测温,必须对其内部的各温升影响因素进行相应的修正。本文通过对影响测温精度的镜筒辐射温度、探测器靶面温度以及热像仪工作累积时间三个因素进行评估和建模,并对其相互关系进行评价,根据数据模型对热像仪辐射测温值进行修正。结果表明,在实验室条件下,经过修正,非制冷型红外热像仪测温精度可控制在±1℃以内,其稳定性可控制在±0.5℃以内。修正后的温度结果基本不受内部温升的影响,有效的提高了非制冷测温型热像仪的稳定性、可重复性以及测温精度。     

激光诱导热光栅光谱测温技术研究

报道了激光诱导热光栅光谱测温技术的研究. 通过两束相干交叉的脉冲抽运光, 在NO₂/N₂混合气中诱导出热光栅, 一束满足布拉格散射条件的连续探测光在交叉区域激励出相干的热光栅信号, 经过空间和光谱滤波的信号光由光电倍增管探测, 并由数字示波器显示和存储. 该信号携带了丰富的流场信息, 通过频域分析, 对气体的温度进行了测量, 热光栅光谱技术测量的温度与热电偶温度符合得很好. 同时还利用热光栅光谱技术进行了气体声速的直接测量, 在一定的温度范围内, 测量结果与理论曲线基本一致, 显示了该技术具有较高的测量精度与多参数同时测量的能力. 对影响信号波形的因素进行了分析, 结果表明, 热光栅光谱测温技术在高压强环境下应用具有独特的优势, 是一种应用前景广阔的激光燃烧诊断技术.     

Threshold power of induced thermal scattering in silica microcavities

The threshold power of Iaser-induced thermal scattering in a high-Q spherical silica microcavity is investigated theoretically as a function of diffraction parameter and the laser pump wavelength for twomode coupling. The threshold power is found to be comparable in order of magnitude with the threshold of Raman lasing and thermal instability in spherical silica microcavities and amounts to 100 fuW for a resonator with a radius of 35 fu m at a pump wavelength of 0.840 fu m. This ensures the application of microcavities as high-sensitive tools for measuring temperature, thermal conductivity, and heat capacity and as stabilizers for microlasers.     

螺旋线慢波结构中界面热阻率的研究

通过理论和实验的方法,对螺旋线慢波结构中的界面热阻率进行了研究.分析了两个接触处的界面热阻率对慢波结构散热性能的不同影响.提出了一种计算界面热阻率的方法,并对其准确性和可行性进行了验证.该方法可以分别估算两个接触处的界面热阻率,并考虑了组件材料属性随温度变化的特性.利用该方法研究了夹持杆材料和装配方法对螺旋线慢波结构界面热阻率的影响. 关键词： 慢波结构 散热性能 界面热阻率     

射频溅射功率对AZO薄膜结构及光电特性和热稳定性的影响

采用射频磁控溅射法,在玻璃基片上制备了ZnO:Al(AZO)透明导电薄膜。用X射线衍射(XRD)仪、紫外-可见分光光度计、方块电阻测试仪和台阶仪对不同溅射功率下Al掺杂ZnO薄膜的结晶、光学、电学性能、沉积速率以及热稳定性进行了研究。研究结果表明:不同溅射功率下沉积的AZO薄膜具有六角纤锌矿结构,均呈c轴择优取向;(002)衍射峰强和薄膜的结晶度随溅射功率的提高逐渐增强;随溅射功率的提高,AZO薄膜的透射率有所下降,但在可见光(380～780nm)范围内平均透射率仍80%;薄膜的方块电阻随溅射功率的增加逐渐减小;功率为160～200W时,薄膜的热稳定性最好,升温前后方块电阻变化率为13%。     

Measurements of electron-phonon coupling factor and interfacial thermal resistance of metallic nano-films using a transient thermoreflectance technique

Using a transient thermoreflectance (TTR) technique,several Au films with different thicknesses on glass and SiC substrates are measured for thermal characterization of metallic nano-films,including the electron-phonon coupling factor G,interfacial thermal resistance R,and thermal conductivity K s of the substrate. The rear heating-front detecting (RF) method is used to ensure the femtosecond temporal resolution. An intense laser beam is focused on the rear surface to heat the film,and another weak laser beam is focused on the very spot of the front surface to detect the change in the electron temperature. By varying the optical path delay between the two beams,a complete electron temperature profile can be scanned. Different from the normally used single-layer model,the double-layer model involving interfacial thermal resistance is studied here. The electron temperature cooling profile can be affected by the electron energy transfer into the substrate or the electron-phonon interactions in the metallic films. For multiple-target optimization,the genetic algorithm (GA) is used to obtain both G and R. The experimental result gives a deep understanding of the mechanism of ultra-fast heat transfer in metals.     

Heat transfer enhancement in MOSFET mounted on different FR4 substrates by thermal transient measurement

Miniaturization of electronic package leads to high heat density and heat accumulation in electronics device, resulting in short life time and premature failure of the device. Junction temperature and thermal resistance are the critical parameters that determine the thermal management and reliability in electronics cooling. Metal oxide field effect transistor (MOSFET) is an important semiconductor device for light emitting diode-integrated circuit (LED IC) driver application, and thermal management in MOSFET is a major challenge. In this study, investigations on thermal performance of MOSFET are performed for evaluating the junction temperature and thermal resistance. Suitable modifications in FR4 substrates are proposed by introducing thermal vias and copper layer coating to improve the thermal performance of MOSFET. Experiments are conducted using thermal transient tester (T3ster) at 2.0 A input current and ambient temperature varying from 25 ℃to 75 °C. The thermal parameters are measured for three proposed designs: FR4 with circular thermal vias, FR4 with single strip of copper layer and embedded vias, and FR4 with I-shaped copper layer, and compared with that of plain FR4 substrate. From the experimental results, FR4_I-shaped shows promising results by 33.71% reduction in junction temperature and 54.19% reduction in thermal resistance. For elevated temperature, the relative increases in junction temperature and thermal resistance are lower for FR4_I-shaped than those for other substrates considered. The introduction of thermal vias and copper layer plays a significant role in thermal performance.