Effects of gate-buffer combined with a p-type spacer structure on silicon carbide metal-semiconductor field-effect transistors

An improved structure of silicon carbide metal-semiconductor field-effect transistors (MESFET) is proposed for high power microwave applications. Numerical models for the physical and electrical mechanisms of the device are presented, and the static and dynamic electrical performances are analysed. By comparison with the conventional structure, the proposed structure exhibits a superior frequency response while possessing better DC characteristics. A p-type spacer layer, inserted between the oxide and the channel, is shown to suppress the surface trap effect and improve the distribution of the electric field at the gate edge. Meanwhile, a lightly doped n-type buffer layer under the gate reduces depletion in the channel, resulting in an increase in the output current and a reduction in the gate-capacitance. The structural parameter dependences of the device performance are discussed, and an optimized design is obtained. The results show that the maximum saturation current density of 325 mA/mm is yielded, compared with 182 mA/mm for conventional MESFETs under the condition that the breakdown voltage of the proposed MESFET is larger than that of the conventional MESFET, leading to an increase of 79% in the output power density. In addition, improvements of 27% cut-off frequency and 28% maximum oscillation frequency are achieved compared with a conventional MESFET, respectively.     

High-power SiC MESFET using a dual p-buffer layer for an S-band power amplifier

A silicon carbide (SiC) based metal semiconductor field effect transistor (MESFET) is fabricated by using a standard SiC MESFET structure with the application of a dual p-buffer layer and a multi-recessed gate to the process for an S-band power amplifier. The lower doped upper-buffer layer serves to maintain the channel current, while the higher doped lower-buffer layer is used to provide excellent electron confinement in the channel layer. A 20-mm gate periphery SiC MESFET biased at a drain voltage of 85 V demonstrates a pulsed wave saturated output power of 94 W, a linear gain of 11.7 dB, and a maximum power added efficiency of 24.3% at 3.4 GHz. These results are improved compared with those of the conventional single p-buffer MESFET fabricated in this work using the same process. A radio-frequency power output greater than 4.7 W/mm is achieved, showing the potential as a high-voltage operation device for high-power solid-state amplifier applications.     

High-power SiC MESFET using dual p-buffer layer for S-band power amplifier

Silicon carbide (SiC) based metal semiconductor field effect transistor (MESFET) is fabricated by using a standard SiC MESFET structure with the application of a dual p-buffer layer and a multi-recessed gate to the process for S-band power amplifier. The lower doped upper-buffer layer serves to maintain the channel current, while the higher doped lower-buffer layer is used to provide excellent electron confinement in the channel layer. A 20-mm gate periphery SiC MESFET biased at a drain voltage of 85 V demonstrates a pulsed wave saturated output power of 94 W, a linear gain of 11.7 dB, and a maximum power added efficiency of 24.3% at 3.4 GHz. These results are improved compared with those of the conventional single p-buffer MESFET fabricated in this work using the same process. A radio-frequency power output greater than 4.7 W/mm is achieved, showing the potential as a high-voltage operation device for high-power solid-state amplifier applications.     

New 4H silicon carbide metal semiconductor field-effect transistor with a buffer layer between the gate and the channel layer

A new 4H silicon carbide metal semiconductor field-effect transistor (4H-SiC MESFET) structure with a buffer layer between the gate and the channel layer is proposed in this paper for high power microwave applications. The physics-based analytical models for calculating the performance of the proposed device are obtained by solving one- and two-dimensional Poisson's equations. In the models, we take into account not only two regions under the gate but also a third high field region between the gate and the drain which is usually omitted. The direct-current and the alternating-current performances for the proposed 4H-SiC MESFET with a buffer layer of 0.2 μ m are calculated. The calculated results are in good agreement with the experimental data. The current is larger than that of the conventional structure. The cutoff frequency (f_T) and the maximum oscillation frequency (f_max) are 20.4 GHz and 101.6 GHz, respectively, which are higher than 7.8 GHz and 45.3 GHz of the conventional structure. Therefore, the proposed 4H-SiC MESFET structure has better power and microwave performances than the conventional structure.     

Application of superlattice gate and modulation-doped buffer for GaAs power MESFET grown by MBE

A new power GaAs MESFET (SGMBT), using the undoped superlattice gate and modulation-doped (MD) buffer, has been fabricated successfully by MBE. A much higher gate-drain breakdown voltage (30 V) and lower gate reverse leakage current have been obtained due to the existence of the undoped AlGaAs/GaAs superlattice gate insulator. The use of MD buffer structure introduces a high output resistance and low trap concentration at AlGaAs/GaAs interface. The degradation region at channel-buffer interface is estimated to be smaller than 40 Å. Thus the sharpness and smoothness between active channel and buffer is truly improved by the insertion of MD structure. The maximum output saturation current and output power of SGMBT are 300 mA/mm and 0.67 W/mm, respectively. By optimizing the device geometry and gate dimension, the output performance of SGMBT can be improved further.     

Improved 4H–SiC MESFET with double source field plate structures

An improved 4H–SiC power MESFET with double source field plates (DSFP) for high-power applications is proposed (DSFP-MESFET). The DSFP structure significantly modifies the electric field in the drift layer. The influence of the DSFP structure on saturation current, breakdown voltage (V_b), and small-signal characteristics of the DSFP-MESFET were studied by numerical device simulation. The V_b of 359 V is obtained for the DSFP-MESFET compared to 301 V of the conventional source field plate MESFET (LSFP-MESFET). Hence, the maximum output power density of 24.7 and 21.8 W/mm are achieved for the DSFP-MESFET and LSFP-MESFET, respectively, which means 13% improvement for the proposed device. Also, the cut-off frequency (f_T) of 24.5 and the maximum oscillation frequency (f_max) of 89.1 GHz for the 4H–SiC DSFP-MESFET are obtained compared to 23.1 and 85.3 GHz for that of the LSFP-MESFET structure, respectively. The DSFP-MESFET shows a superior maximum stable gain (MSG) exceeding 23.3 dB at 3.1 GHz, which is presenting the potential of the proposed device for high-power operations.     

高线性度Al_xGa_(1-x)N/Al_yGa_(1-y)N/GaN高电子迁移率晶体管优化设计

对新型复合沟道AlxGa1-xN/AlyGa1-yN/GaN高电子迁移率晶体管(HEMT)进行了优化设计.从半导体能带理论与量子阱理论出发,自洽求解了器件层结构参数对器件导带能级以及二维电子气(2DEG)中载流子浓度和横向电场的影响.用TCAD软件仿真得到了器件的层结构参数对器件性能的影响.结合理论分析和仿真结果确定了器件的最佳外延层结构Al0.31Ga0.69N/Al0.04Ga0.96N/GaNHEMT.对栅长1μm,栅宽100μm的器件仿真表明,器件的最大跨导为300mS/mm,且在栅极电压-2—1V的宽范围内跨导变化很小,表明器件具有较好的线性度;器件的最大电流密度为1300mA/mm,特征频率为11.5GHz,最大振荡频率为32.5GHz.     

A novel 4H–SiC MESFET with modified channel depletion region for high power and high frequency applications

In this paper, a novel 4H–SiC metal semiconductor field effect transistor (MESFET) with modified depletion region is introduced. The key idea in this work is modifying the depletion region in the channel for improving the electrical performances. The proposed structure consists of upper and lower gates. Also, the lower gate is divided into a number (N) of smaller step-shaped sections. Therefore, we have called the proposed structure multiple-recessed 4H–SiC MESFET (MR-MESFET). DC and RF characteristics of the MR-MESFET structure with various lower gate segments are analyzed by 2D numerical simulation. The simulated results show that as the number of the lower gate sections increases, the channel depletion region is modified and the drain current (I_D) enhances. Also, by increasing the number of the lower gate sections, the breakdown voltage (V_BR) enhances, too. Improvement of the I_D and V_BR leads to a further increase in the output power density of the device. Also, cut-off frequency (f_T), maximum oscillation frequency (f_max), and maximum available gain (MAG) improvements are achieved for the MR-MESFET structure with further number of the lower gate sections. The results show that the MR-MESFET structure with higher number of the lower gate segments has superior electrical characteristics and performances in comparison with the MR-MESFET structure with fewer number of the lower gate sections.     

双沟4H-SiC MESFET优化结构的解析模型及性能

优化双沟4H-SiC MESFET结构,通过求解一维和二维泊松方程,建立优化结构的解析模型,分析这种结构的直流和交流特性.结果表明,饱和电流密度的计算结果与实验一致,结构优化后4H-SiC MESFET的饱和电流密度和击穿电压分别为420μA·μm^-1和155 V,明显高于优化前的275μA·μm^-1和141 V;最高输出功率密度为7.4 W·mm^-1,比优化前提高约64%;截止频率和最高振荡频率比优化前略微提高.双沟结构经优化后其交流小信号特性未退化而功率特性获得明显改善.     

Improved performance of 4H-SiC metal-semiconductor field-effect transistors with step p-buffer layer

An improved 4H-SiC metal-semiconductor field-effect transistors (MESFETs) with step p-buffer layer is proposed, and the static and dynamic electrical performances are analysed in this paper. A step p-buffer layer has been applied not only to increase the channel current, but also to improve the transconductance. This is due to the fact that the variation in p-buffer layer depth leads to the decrease in parasitic series resistance resulting from the change in the active channel thickness and modulation in the electric field distribution inside the channel. Detailed numerical simulations demonstrate that the saturation drain current and the maximum theoretical output power density of the proposed structure are about 30% and 37% larger than those of the conventional structure. The cut-off frequency and the maximum oscillation frequency of the proposed MESFETs are 14.5 and 62 GHz, respectively, which are higher than that of the conventional structure. Therefore, the 4H-SiC MESFETs with step p-buffer layer have superior direct-current and radio-frequency performances compared to the similar devices based on the conventional structure.     

阶梯AlGaN外延新型Al0.25Ga0.75N/GaNHEMTs器件实验研究

本文报道了作者提出的阶梯AlGaN外延层新型AlGaN/GaN HEMTs结构的实验结果. 实验利用感应耦合等离子体刻蚀(ICP)刻蚀栅边缘的AlGaN外延层, 形成阶梯的AlGaN 外延层结构, 获得浓度分区的沟道2DEG, 使得阶梯AlGaN外延层边缘出现新的电场峰, 有效降低栅边缘的高峰电场, 从而优化了AlGaN/GaN HEMTs器件的表面电场分布. 实验获得了阈值电压-1.5 V的新型AlGaN/GaN HEMTs器件. 经过测试, 同样面积的器件击穿电压从传统结构的67 V提高到新结构的106 V, 提高了58%左右; 脉冲测试下电流崩塌量也比传统结构减少了30%左右, 电流崩塌效应得到了一定的缓解.     

Novel attributes of AlGaN/AlN/GaN/SiC HEMTs with the multiple indented channel

In this paper, a high performance AlGaN/AlN/GaN/SiC High Electron Mobility Transistor (HEMT) with the multiple indented channel (MIC-HEMT) is proposed. The main focus of the proposed structure is based on reduction of the space around the gate, stop of the spread of the depletion region around the source–drain, and decrement of the thickness of the channel between the gate and drain. Therefore, the breakdown voltage increases, meanwhile the elimination of the gate depletion layer extension to source/drain decreases the gate–source and gate–drain capacitances. The optimized results reveal that the breakdown voltage and the drain saturation current increase about 178% and 46% compared with a conventional HEMT (C-HEMT), respectively. Therefore, the maximum output power density is improved by factor 4.1 in comparison with conventional one. Also, the cut-off frequency of 25.2 GHz and the maximum oscillation frequency of 92.1 GHz for the MIC-HEMT are obtained compared to 13 GHz and 43 GHz for that of the C-HEMT and the minimum figure noise decreased consequently of reducing the gate–drain and gate–source capacitances by about 42% and 40%, respectively. The proposed MIC-HEMT shows a maximum stable gain (MSG) exceeding 24.1 dB at 3.1 GHz which the greatest gain is yet reported for HEMTs, showing the potential of this device for high power RF applications.     

In-situ SiN combined with etch-stop barrier structure for high-frequency AlGaN/GaN HEMT

The etch-stop structure including the in-situ SiN and AlGaN/GaN barrier is proposed for high frequency applications.The etch-stop process is realized by placing an in-situ SiN layer on the top of the thin AlGaN barrier.F-based etching can be self-terminated after removing SiN,leaving the AlGaN barrier in the gate region.With this in-situ SiN and thin barrier etch-stop structure,the short channel effect can be suppressed,meanwhile achieving highly precisely controlled and low damage etching process.The device shows a maximum drain current of 1022 mA/mm,a peak transconductance of 459 mS/mm,and a maximum oscillation frequency(fmax)of 248 GHz.     

A novel double-recessed 4H-SiC MESFET with partly undoped space region

In this paper, a novel double-recessed 4H-SiC metal semiconductor field effect transistor (MESFET) with partly undoped space region (DRUS-MESFET) is introduced. The key idea in this work is to improve the DC and RF characteristics of the device by introducing an undoped space region. Using two-dimensional and two-carrier device simulation, we demonstrate that breakdown voltage (V_BR) increases from 109 V in conventional double recessed MESFET (DR-MESFET) structure to 144.5 V in the DRUS-MESFET structure due to the modified channel electric field distribution of the proposed structure. The maximum output power density of the DRUS-MESFET structure is about 25.4% larger than that of the DR-MESFET structure. Furthermore, lower gate-drain capacitance (C_GD), higher cut-off frequency (f_T), larger maximum available gain (MAG), and higher maximum oscillation frequency (f_max) are achieved for the DRUS-MESFET structure. The results show that the f_max and f_T of the proposed structure improve 95.6% and 13.07% respectively, compared with that of the DR-MESFET structure. Also, the MAG of the DRUS-MESET is 4.5 dB higher than that of the DR-MESFET structure at 40 GHz. The results show that the DRUS-MESFET structure has superior electrical characteristics and performances in comparison with the DR-MESFET structure.     

具有部分本征GaN帽层新型AlGaN/GaN高电子迁移率晶体管特性分析

为了优化传统Al GaN/GaN高电子迁移率晶体管(high electron mobility transistors,HEMTs)器件的表面电场,提高击穿电压,本文提出了一种具有部分本征GaN帽层的新型Al GaN/GaN HEMTs器件结构.新型结构通过在Al GaN势垒层顶部、栅电极到漏电极的漂移区之间引入部分本征GaN帽层,由于本征GaN帽层和Al GaN势垒层界面处的极化效应,降低了沟道二维电子气(two dimensional electron gas,2DEG)的浓度,形成了栅边缘低浓度2DEG区域,使得沟道2DEG浓度分区,由均匀分布变为阶梯分布.通过调制沟道2DEG的浓度分布,从而调制了Al GaN/GaN HEMTs器件的表面电场.利用电场调制效应,产生了新的电场峰,且有效降低了栅边缘的高峰电场,Al GaN/GaN HEMTs器件的表面电场分布更加均匀.利用ISE-TCAD软件仿真分析得出:通过设计一定厚度和长度的本征GaN帽层,Al GaN/GaN HEMTs器件的击穿电压从传统结构的427 V提高到新型结构的960 V.由于沟道2DEG浓度减小,沟道电阻增加,使得新型Al GaN/GaN HEMTs器件的最大输出电流减小了9.2%,截止频率几乎保持不变,而最大振荡频率提高了12%.     

Operational improvement of AlGaN/GaN HEMT on SiC substrate with the amended depletion region

In this paper, a high performance AlGaN/GaN High Electron Mobility Transistor (HEMT) on SiC substrates is presented to improve the electrical operation with the amended depletion region using a multiple recessed gate (MRG–HEMT). The basic idea is to change the gate depletion region and a better distribution of the electric field in the channel and improve the device breakdown voltage. The proposed gate consists of lower and upper gate to control the channel thickness. Also, the charge of the depletion region will change due to the optimized gate. In addition, a metal between the gate and drain including the horizontal and vertical parts is used to better control the thickness of the channel. The breakdown voltage, maximum output power density, cut-off frequency, maximum oscillation frequency, minimum noise figure, maximum available gain (MAG), and maximum stable gain (MSG) are some parameters for designers which are considered and are improved in this paper.     

Heterogeneous integration of InP HEMTs on quartz wafer using BCB bonding technology

Heterogeneous integrated InP high electron mobility transistors(HEMTs)on quartz wafers are fabricated successfully by using a reverse-grown InP epitaxial structure and benzocyclobutene(BCB)bonding technology.The channel of the new device is In_0.7Ga_0.3As,and the gate length is 100 nm.A maximum extrinsic transconductance gm,max of 855.5 mS/mm and a maximum drain current of 536.5 mA/mm are obtained.The current gain cutoff frequency is as high as 262 GHz and the maximum oscillation frequency reaches 288 GHz.In addition,a small signal equivalent circuit model of heterogeneous integration of InP HEMTs on quartz wafer is built to characterize device performance.     

Exploring the warped bulk

In this study, a gallium nitride (GaN) high electron mobility transistor (HEMT) with recessed insulator and barrier is reported. In the proposed structure, insulator is recessed into the barrier at the drain side and barrier is recessed into the buffer layer at the source side. We study important device characteristics such as electric field, breakdown voltage, drain current, maximum output power density, gate-drain capacitance, short channel effects and DC transconductance using two-dimensional and two-carrier device simulator. Recessed insulator in the drain side of the proposed structure reduces maximum electric field in the channel and therefore increases the breakdown voltage and maximum output power density compared to the conventional counterpart. Also, gate-drain capacitance value in the proposed structure is less than that of the conventional structure. Overall, the proposed structure reduces short channel effects. Because of the recessed regions at both the source and the drain sides, the average barrier thickness of the proposed structure is not changed. Thus, the drain current of the proposed structure is almost equivalent to that of the conventional transistor. In this work, length (L _r) and thickness (T _r) of the recessed region of the barrier at the source side are the same as those of the insulator at the drain side.     

Three-Dimensional Simulations of RESET Operation in Phase-Change Random Access Memory with Blade-Type Like Phase Change Layer by Finite Element Modeling

An optimized device structure for reducing the RESET current of phase-change random access memory(PCRAM)with blade-type like(BTL) phase change layer is proposed.The electrical thermal analysis of the BTL cell and the blade heater contactor structure by three-dimensional finite element modeling are compared with each other during RESET operation.The simulation results show that the programming region of the phase change layer in the BTL cell is much smaller,and thermal electrical distributions of the BTL cell are more concentrated on the TiN/GST interface.The results indicate that the BTL cell has the superiorities of increasing the heating efficiency,decreasing the power consumption and reducing the RESET current from 0.67 mA to 0.32 mA.Therefore,the BTL cell will be appropriate for high performance PCRAM device with lower power consumption and lower RESET current.     

Experimental and numerical analysis of the multi-recessed gate structure for microwave silicon carbide power MESFETs

This paper reports that multi-recessed gate 4H-SiC MESFETs (metal semiconductor filed effect transistors) with a gate periphery of 5-mm are fabricated and characterized. The multi-recessed region under the gate terminal is applied to improve the gate--drain breakdown voltage and to alleviate the trapping induced instabilities by moving the current path away from the surface of the device. The experimental results demonstrate that microwave output power density, power gain and power-added efficiency for multi-finger 5-mm gate periphery SiC MESFETs with multi-recessed gate structure are about 29%, 1.1dB and 7% higher than those of conventional devices fabricated in this work using the same process.