Band Structures of Metal-Oxide Capped Graphene： A First Principles Study

We perform a first-principles calculation based on density functional theory to investigate the interface between single layer graphene and metal oxides. Our study reveals that the monolayer graphene becomes semiconducting by single crystal SiO2 and Al2O3 contact, with energy gaps to - 0.9 and - 1.8 eV, respectively. We find the gap originates from the breakage of π bond integrity, whose extent is related to the interface atom configuration. We believe that our results highlight a promising direction for the feasibility to apply large scale graphene layers as building blocks in future electronics devices.     

Liquid-phase and solid-phase microwave irradiations for reduction of graphite oxide

In this paper, two microwave irradiation methods：（i） liquid-phase microwave irradiation（MWI） reduction of graphite oxide suspension dissolved in de-ionized water and N, N-dimethylformamide, respectively, and（ii） solid-phase MWI reduction of graphite oxide powder have been successfully carried out to reduce graphite oxide. The reduced graphene oxide products are thoroughly characterized by scanning electron microscopy, atomic force microscopy, X-ray photoelectron spectroscopy, Fourier transform infrared spectral analysis, Raman spectroscopy, UV-Vis absorption spectral analysis,and four-point probe conductivity measurements. The results show that both methods can efficiently remove the oxygencontaining functional groups attached to the graphite layers, though the solid-phase MWI reduction method can obtain far more efficiently a higher quality-reduced graphene oxide with fewer defects. The I（D）/I（G） ratio of the solid-phase MWI sample is as low as 0.46, which is only half of that of the liquid-phase MWI samples. The electrical conductivity of the reduced graphene oxide by the solid method reaches 747.9 S/m, which is about 25 times higher than that made by the liquid-phase method.     

Memory Effect of Metal-Oxide-Silicon Capacitors with Self-Assembly Double-Layer Au Nanocrystals Embedded in Atomic-Layer-Deposited HfO2 Dielectric

We report the chemical self-assembly growth of Au nanocrystals on atomic-layer-deposited HfO2 films aminosilanized by （3-Aminopropyl）-trimethoxysilane aforehand for memory applications. The resulting Au nanocrystals show a density of about 4 × 10^11 cm^-2 and a diameter range of 5-8nm. The metal-oxide-silicon capacitor with double-layer Au nanocrystals embedded in HfO2 dielectric exhibits a large C - V hysteresis window of 11.9 V for ±11 V gate voltage sweeps at 1MHz, a flat-band voltage shift of 1.5 V after the electrical stress under 7 V for 1ms, a leakage current density of 2.9 × 10^-8 A/cm^-2 at 9 V and room temperature. Compared to single-layer Au nanocrystals, the double-layer Au nanocrystals increase the hysteresis window significantly, and the underlying mechanism is thus discussed.     

Robust Low Voltage Program-Erasable Cobalt-Nanocrystal Memory Capacitors with Multistacked Al2O3/HfO2/Al2O3 Tunnel Barrier

A n atomic-layer-deposited Al2O3/HfO2/Al2O3 （A/H/A） tunnel barrier is in vestigated for Co nanocrystal memory capacitors. Compared to a single Al2O3 tunnel barrier, the A/H/A barrier can significantly increase the hysteresis window, i.e., an increase by 9 V for ±12 V sweep range. This is attributed to a marked decrease in the energy barriers of charge injections for the A/H/A tunnel barrier. Further, the Co-nanocrystal memory capacitor with the A/H/A tunnel barrier exhibits a memory window as large as 4.1 V for 100 μs program/erase at a low voltage of ±7 V, which is due to fast charge injection rates, i.e., about 2.4× 10^16 cm^-2 s^-1 for electrons and 1.9× 1016 cm^-2 s^-1 for holes.