Memory Effect of Metal--Insulator--Silicon Capacitors with SiO2/HfO2/Al2O3 Dielectrics

Charge trapping characteristics of the metal-insulator-silicon （MIS） capacitors with Si02/HfO2//A12O3 stacked dielectrics are investigated for memory applications＇. A capacitance-voltage hysteresis memory window as large as 7.3 V is achieved for the gate voltage sweeping of ±12 V, and a fiat-band voltage shift of 1.5 V is observed in terms of programming under 5 V and I ms. Furthermore, the time- and voltage-dependent charge trapping characteristics are also demonstrated, the former is related to charge trapping saturation and the latter is ascribed to variable tunnelling barriers for electron injecting and discharging under different voltages.     

基于Al2O3/Pt纳米晶/HfO2叠层的MOS电容存储效应研究

采用电子束蒸发Pt和后快速热退火的方法,研究了退火条件对Pt纳米晶的生长特性的影响,结果显示Pt纳米晶的密度随退火温度的升高和退火时间的延长均表现出先增大后减小的趋势.在800℃下退火20 s能得到分布均匀的、密度为30×10¹¹ cm^-2的Pt纳米晶.进一步研究了基于Al₂O₃/Pt纳米晶/HfO₂叠层的MOS电容结构的存储效应,表明其在-3—+8 V扫描电压范围下C-V< 关键词： Pt纳米晶 快速热退火 原子层淀积 存储效应     

Robust Low Voltage Program-Erasable Cobalt-Nanocrystal Memory Capacitors with Multistacked Al2O3/HfO2/Al2O3 Tunnel Barrier

A n atomic-layer-deposited Al2O3/HfO2/Al2O3 （A/H/A） tunnel barrier is in vestigated for Co nanocrystal memory capacitors. Compared to a single Al2O3 tunnel barrier, the A/H/A barrier can significantly increase the hysteresis window, i.e., an increase by 9 V for ±12 V sweep range. This is attributed to a marked decrease in the energy barriers of charge injections for the A/H/A tunnel barrier. Further, the Co-nanocrystal memory capacitor with the A/H/A tunnel barrier exhibits a memory window as large as 4.1 V for 100 μs program/erase at a low voltage of ±7 V, which is due to fast charge injection rates, i.e., about 2.4× 10^16 cm^-2 s^-1 for electrons and 1.9× 1016 cm^-2 s^-1 for holes.