ARGET ATRP 与ROP 结合制备pH 响应两亲性聚合物分子刷及其自组装研究

结合电子转移活化剂再生-原子转移自由基聚合(ARGET ATRP)和开环聚合(ROP)法合成了一种具有无规疏水/ pH 响应结构的两亲性聚合物分子刷聚(甲基丙烯酸聚丙交酯酯-co-甲基丙烯酸)-b-聚甲基丙烯酸单甲氧基聚乙二醇酯 [P(PLAMA-co-MAA)-b-PPEGMA]. 通过核磁共振氢谱(¹H NMR)和凝胶渗透色谱(GPC)表征了聚合物的结构、分子量及分子量分布. 优化了反应条件并合成出分子量可控、分子量分布窄的聚合产物. 采用动态光散射法(DLS)、扫描电子显微镜(SEM)研究了聚合物分子刷在水溶液中自组装胶束的粒径、形貌及pH 响应行为. P(PLAMA-co-MAA)-b-PPEGMA 自组装形成粒径分布均匀的球形胶束. 且随着溶液pH 值从7 降低至3, 胶束中的PMAA 逐渐去离子化, 溶胀的胶束逐渐收缩, 粒径由200～300 nm 减小至150 nm 左右; 但当pH 值减小到2 以下, 胶束表面电荷量非常小, 胶束聚集, 使得粒径增大.     

Band Structures of Metal-Oxide Capped Graphene： A First Principles Study

We perform a first-principles calculation based on density functional theory to investigate the interface between single layer graphene and metal oxides. Our study reveals that the monolayer graphene becomes semiconducting by single crystal SiO2 and Al2O3 contact, with energy gaps to - 0.9 and - 1.8 eV, respectively. We find the gap originates from the breakage of π bond integrity, whose extent is related to the interface atom configuration. We believe that our results highlight a promising direction for the feasibility to apply large scale graphene layers as building blocks in future electronics devices.     

Memory Effect of Metal--Insulator--Silicon Capacitors with SiO2/HfO2/Al2O3 Dielectrics

Charge trapping characteristics of the metal-insulator-silicon （MIS） capacitors with Si02/HfO2//A12O3 stacked dielectrics are investigated for memory applications＇. A capacitance-voltage hysteresis memory window as large as 7.3 V is achieved for the gate voltage sweeping of ±12 V, and a fiat-band voltage shift of 1.5 V is observed in terms of programming under 5 V and I ms. Furthermore, the time- and voltage-dependent charge trapping characteristics are also demonstrated, the former is related to charge trapping saturation and the latter is ascribed to variable tunnelling barriers for electron injecting and discharging under different voltages.     

Atomic Layer Deposition of Al2O3 on H-Passivated GeSi： Initial Surface Reaction Pathways with H/GeSi（100）-2 × 1

The reaction mechanisms of Al（CH3 ）3 （TMA） adsorption on H-passivated GeSi（100）-2 × 1 surface are investigated with density functional theory. The Si-Ge and Ge-Ge one-dimer cluster models are employed to represent the GeSi（100）-2 × 1 surface with different Ge compositions. For a Si-Ge dimer of a H-passivated SiGe surface, TMA adsorption on both Si-H^＊ and Ge-H^＊ sites is considered. The activation barrier of TMA with the Si-H^＊ site （1.2eV） is higher than that of TMA with the Ge-H^＊ site （0.91 eV）, which indicates that the reaction proceeds more slowly on the Si-H^＊ site than on the Ge-H^＊ site. In addition, adsorption of TMA is more energetically favorable on the Ge-Ge dimer than on the Si-Ge dimer of H-passivated SiGe.     

基于Al2O3/Pt纳米晶/HfO2叠层的MOS电容存储效应研究

采用电子束蒸发Pt和后快速热退火的方法,研究了退火条件对Pt纳米晶的生长特性的影响,结果显示Pt纳米晶的密度随退火温度的升高和退火时间的延长均表现出先增大后减小的趋势.在800℃下退火20 s能得到分布均匀的、密度为30×10¹¹ cm^-2的Pt纳米晶.进一步研究了基于Al₂O₃/Pt纳米晶/HfO₂叠层的MOS电容结构的存储效应,表明其在-3—+8 V扫描电压范围下C-V< 关键词： Pt纳米晶 快速热退火 原子层淀积 存储效应     

Memory Effect of Metal-Oxide-Silicon Capacitors with Self-Assembly Double-Layer Au Nanocrystals Embedded in Atomic-Layer-Deposited HfO2 Dielectric

We report the chemical self-assembly growth of Au nanocrystals on atomic-layer-deposited HfO2 films aminosilanized by （3-Aminopropyl）-trimethoxysilane aforehand for memory applications. The resulting Au nanocrystals show a density of about 4 × 10^11 cm^-2 and a diameter range of 5-8nm. The metal-oxide-silicon capacitor with double-layer Au nanocrystals embedded in HfO2 dielectric exhibits a large C - V hysteresis window of 11.9 V for ±11 V gate voltage sweeps at 1MHz, a flat-band voltage shift of 1.5 V after the electrical stress under 7 V for 1ms, a leakage current density of 2.9 × 10^-8 A/cm^-2 at 9 V and room temperature. Compared to single-layer Au nanocrystals, the double-layer Au nanocrystals increase the hysteresis window significantly, and the underlying mechanism is thus discussed.     

Improvement of Atomic-Layer-Deposited Al2O3/GaAs Interface Property by Sulfuration and NH3 Thermal Nitridation

Fermi level pinning at the interface between high-h gate dielectric and GaAs induced by unstable native oxides is a major obstacle for high performance GaAs-based metal-oxide-semiconductor （MOS） devices. We demonstrate the improved Al2O3/GaAs interracial characteristics by （NH4）2S immersion and NH3 thermal pretreatment prior to A1203 deposition. X-ray photoelectron spectroscopy （XPS） analysis confirms that sulfuration of GaAs surface by （NH4 ）2S solution can effectively reduce As-O bonds while Ga-O bonds and elemental As still exist at Al2O3 /GaAs interface. However, it is found that N incorporation during the further thermal nitridation on sulfurated GaAs can effectively suppress the native oxides and elemental As in the sequent deposition of Al2O3. Atomic force microscopy （AFM） shows that the further thermal nitridation on sulfurated GaAs surface can also improve the surface roughness.     

Preparation of Ultra Low- k Porous SiOCH Films from Ring-Type Siloxane with Unsaturated Hydrocarbon Side Chains by Spin-On Deposition

An ultra-low-dielectric-constant （ultra low-k, or ULK） porous SiOCH film is prepared using a single ring-type siloxane precursor of the 2,4,6,8-tetravinyl-2,4,6,8-tetramethylcyclotetrasiloxane by means of spin-on deposition, followed by crosslinking reactions between the precursor monomers under UV irradiation. The as-prepared film has an ultra low k of 2.41 at 1 MHz due to incorporation of pores and hydrocarbon crosslinkages, a leakage current density of 9.86×10-7 A/cm2 at 1 MV/cm, as well as a breakdown field strength of ~1.5 MV/cm. Further, annealing at 300°C results in lower k （i.e., 1.94 at 1 MHz）, smaller leakage current density （2.96×10-7 A/cm2 at 1 MV/cm） and higher breakdown field strength （about 3.5 MV/cm）, which are likely caused by the short-ranged structural rearrangement and reduction of defects in the film. Finally, the mechanical properties and surface morphology of films are also evaluated after different temperature annealing.     

Robust Low Voltage Program-Erasable Cobalt-Nanocrystal Memory Capacitors with Multistacked Al2O3/HfO2/Al2O3 Tunnel Barrier

A n atomic-layer-deposited Al2O3/HfO2/Al2O3 （A/H/A） tunnel barrier is in vestigated for Co nanocrystal memory capacitors. Compared to a single Al2O3 tunnel barrier, the A/H/A barrier can significantly increase the hysteresis window, i.e., an increase by 9 V for ±12 V sweep range. This is attributed to a marked decrease in the energy barriers of charge injections for the A/H/A tunnel barrier. Further, the Co-nanocrystal memory capacitor with the A/H/A tunnel barrier exhibits a memory window as large as 4.1 V for 100 μs program/erase at a low voltage of ±7 V, which is due to fast charge injection rates, i.e., about 2.4× 10^16 cm^-2 s^-1 for electrons and 1.9× 1016 cm^-2 s^-1 for holes.