硅基单片式复合晶体管的结构参数对高功率微波损伤效应的影响（英文）

建立了三种不同结构的硅基单片式复合晶体管(由T1和T2两个晶体管构成)的二维电热模型,研究了高功率微波对不同结构的硅基单片式复合晶体管的损伤效应的影响。获得了不同器件结构下导致复合晶体管损伤的损伤功率阈值和损伤能量阈值分别与脉宽的关系。结果表明,当复合晶体管的总体尺寸不变而T2和T1晶体管的面积比值更大时需要更多的功率和能量来损伤器件。通过分析器件内部电场、电流密度和温度分布的变化,得到了复合晶体管的结构对其微波损伤效应的影响规律。对比发现,三种结构的复合晶体管的损伤点均位于T2管的发射极附近,随着T2和T1晶体管面积比的增大,电场、电流密度和温度在器件内部的分布将变得更加分散。此外,在发射极处增加外接电阻Re,研究表明损伤时间随发射极电阻的增大而增加。因此可以得出结论,适当改变器件结构或增加外接元件可以增强器件的抗微波损伤能力。晶体管的仿真毁伤点与实验结果一致。     

微流控芯片上的细胞分析研究进展

近年来,微流控分析系统(μTAS)在生物细胞分离领域的发展引起了广泛的关注。微流控芯片的微米级尺寸的通道适合于单细胞样品的引入、操控、反应、分离和检测,已经在微芯片上实现了上述功能,并将这些功能集成在具备毛细管电泳分离功能的微芯片上。     

Damage effects and mechanism of the silicon NPN monolithic composite transistor induced by high-power microwaves

A two-dimensional model of the silicon NPN monolithic composite transistor is established for the first time by utilizing the semiconductor device simulator, Sentaurus-TCAD. By analyzing the internal distributions of electric field,current density, and temperature of the device, a detailed investigation on the damage process and mechanism induced by high-power microwaves(HPM) is performed. The results indicate that the temperature elevation occurs in the negative half-period and the temperature drop process is in the positive half-period under the HPM injection from the output port.The damage point is located near the edge of the base–emitter junction of T2, while with the input injection it exists between the base and the emitter of T2. Comparing these two kinds of injection, the input injection is more likely to damage the device than the output injection. The dependences of the damage energy threshold and the damage power threshold causing the device failure on the pulse-width are obtained, and the formulas obtained have the same form as the experimental equations, which demonstrates that more power is required to destroy the device if the pulse-width is shorter. Furthermore,the simulation result in this paper has a good coincidence with the experimental result.     

T型及KA分子筛膜的制备、修复及其天然气脱水蒸气性能研究

天然气在长距离输送之前必须进行脱水蒸气,膜分离法是天然气脱水蒸气的有效方法,其中膜材料是关键,而分子筛膜因具有均一的孔径、规则的孔道、良好的稳定性而备受关注。本研究选择孔径为3-5 μm,直径为2 cm的圆片状多孔氧化铝陶瓷作为成膜基底,通过在基底上预涂晶种后原位生长得到了T型和NaA分子筛膜,NaA分子筛膜进一步经过金属离子交换获得了KA分子筛膜,最后将两种分子筛膜应用于水蒸气含量为3.5%的甲烷气体(作为模型天然气)进行天然气脱水蒸气实验。研究结果表明,T型及KA分子筛膜对模型天然气脱水蒸气的H₂O/CH₄选择性分别为2.80和3.16。进而采用表面涂层法对分子筛膜中的缺陷进行了修复,从而有效提高了其模型天然气脱水蒸气性能,修复后的T型及KA分子筛膜的H₂O/CH₄选择性分别达到了10.52和17.71,水蒸气的渗透系数分别为104397 Barrer和28200 Barrer,甲烷损失率分别仅为2%和1%,修复后的两种分子筛膜皆具有良好的稳定性。     

环烷酸钴-氯二异丁基铝催化体系相态的研究

研究了Co(naph) 2 Al(i Bu) 2 Cl催化体系的相态 .通过Tyndall效应、电镜观察和超过滤实验 ,证明了Co(naph) 2 Al(i Bu) 2 Cl催化体系在溶有丁二烯的苯溶剂中以纳米级小颗粒分散 ,在较佳配比时 ,粒径在 1～10 0nm之间 ,为胶体催化剂 ,属于高度分散的多相催化体系 .催化剂的活性位位于胶粒表面 ,催化剂颗粒是无定形的 .以较佳配比得到的催化剂颗粒较小、分布均匀 ,催化丁二烯聚合反应活性高 .归纳出胶体催化剂的制备特点为外观类似于均相催化体系 ,但是制备方法 (各组分配比、加入顺序、陈化等 )对催化活性有明显的影响 .并给出将胶体催化动力学作均相动力学近似的条件 ,在聚合反应初期 ,且单体浓度比烷基铝以及其他填加物浓度大 2～ 3数量级     

Modeling and understanding of the thermal failure induced by high power microwave in CMOS inverter

The thermal failure induced by high power microwave(HPM) in a complementary metal oxide semiconductor(CMOS) inverter is investigated and its dependence on microwave parameters is discussed in detail. An analytical model of the temperature distribution is established and the relationships between hotspot temperature and pulse width and between hotspot temperature and frequency are predicted, which reveals a more severe rise in temperature under the influence of microwave with longer width and lower frequency. The temperature variation mechanism and the theoretical temperature model are validated and explained by the simulation. Furthermore, variation trend of damage threshold with microwave parameters is derived theoretically, and the conclusions are consistent with simulation results and reported data.     

Physics-based analysis and simulation model of electromagnetic interference induced soft logic upset in CMOS inverter

The instantaneous reversible soft logic upset induced by the electromagnetic interference(EMI) severely affects the performances and reliabilities of complementary metal–oxide–semiconductor(CMOS) inverters. This kind of soft logic upset is investigated in theory and simulation. Physics-based analysis is performed, and the result shows that the upset is caused by the non-equilibrium carrier accumulation in channels, which can ultimately lead to an abnormal turn-on of specific metal–oxide–semiconductor field-effect transistor(MOSFET) in CMOS inverter. Then a soft logic upset simulation model is introduced. Using this model, analysis of upset characteristic reveals an increasing susceptibility under higher injection powers, which accords well with experimental results, and the influences of EMI frequency and device size are studied respectively using the same model. The research indicates that in a range from L waveband to C waveband, lower interference frequency and smaller device size are more likely to be affected by the soft logic upset.     

来流边界层效应下斜坡诱导的斜爆轰波

以超声速预混气中的斜爆轰波为研究对象,对其在来流边界层效应下的特性进行了实验研究.在马赫数为3的超声速预混风洞中,通过斜坡诱导产生了斜爆轰波.当来流的当量比较低时,预混气中产生的是化学反应锋面与激波面非耦合的激波诱导燃烧现象.此时边界层分离区中的化学反应放热将使分离区尺度显著增大,流场非定常性显著增强,激波位置剧烈振荡.当来流的当量比较高时,预混气将产生斜爆轰波.此时边界层分离区会影响到斜爆轰波起爆时的形态.在小尺度分离区下,斜爆轰波起爆时呈突跃结构(有横波);在中等尺度分离区下,流场固有的非定常性使斜爆轰波呈间歇突跃结构;在大尺度分离区下,斜爆轰波起爆则呈完全的平滑结构(无横波).     

CMOS反相器的快上升沿强电磁脉冲损伤特性（英文）

随着电磁环境的日益复杂,保证集成电路(IC)的可靠性成为一个巨大的挑战。在此基础上,通过对CMOS反相器的仿真和实验研究,研究了快上升沿电磁脉冲(EMP)引起的陷阱辅助隧穿(TAT)效应。对此进行了详细的机理分析用于解释其物理损伤过程。EMP感应电场在氧化层中产生陷阱和泄漏电流,从而导致器件的输出退化和热失效。建立了退化和失效的理论模型,以描述输出退化及热积累对EMP特征的依赖性。温度分布函数由半导体中的热传导方程导出。基于TLP测试系统进行的相应实验证实了出现的性能退化,与机理分析一致。Sentaurus TCAD的仿真结果表明,EMP引起的损坏是由栅极氧化层中发生的TAT电流路径引起的,这也是器件的易烧坏位置。此外,还讨论了器件失效与脉冲上升沿的关系。本文的机理分析有助于加强其他半导体器件的EMP可靠性研究,可以对CMOS数字集成电路的EMP加固提出建议。