High temperature characteristics of AlGaN/GaN high electron mobility transistors

Direct current (DC) and pulsed measurements are performed to determine the degradation mechanisms of AlGaN/GaN high electron mobility transistors (HEMTs) under high temperature. The degradation of the DC characteristics is mainly attributed to the reduction in the density and the mobility of the two-dimensional electron gas (2DEG). The pulsed measurements indicate that the trap assisted tunneling is the dominant gate leakage mechanism in the temperature range of interest. The traps in the barrier layer become active as the temperature increases, which is conducive to the electron tunneling between the gate and the channel. The enhancement of the tunneling results in the weakening of the current collapse effects, as the electrons trapped by the barrier traps can escape more easily at the higher temperature.     

Enhancement-mode AlGaN/GaN high electronic mobility transistors with thin barrier

An enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMTs) was fabricated with 15-nm AlGaN barrier layer. E-mode operation was achieved by using fluorine plasma treatment and post-gate rapid thermal annealing. The thin barrier depletion-HEMTs with a threshold voltage typically around --1.7 V, which is higher than that of the 22-nm barrier depletion-mode HEMTs (--3.5 V). Therefore, the thin barrier is emerging as an excellent candidate to realize the enhancement-mode operation. With 0.6-μ m gate length, the devices treated by fluorine plasma for 150-W RF power at 150 s exhibited a threshold voltage of 1.3 V. The maximum drain current and maximum transconductance are 300 mA/mm, and 177 mS/mm, respectively. Compared with the 22-nm barrier E-mode devices, V_T of the thin barrier HEMTs is much more stable under the gate step-stress.     

Magnetotransport properties of two-dimensional electron gas in AlGaN/AlN/GaN heterostructures

Magnetotransport measurements are carried out on the AlGaN/AlN/GaN in an SiC heterostructure, which demonstrates the existence of the high-quality two-dimensional electron gas (2DGE) at the AlN/GaN interface. While the carrier concentration reaches 1.32 × 10¹³ cm ^{- 2} and stays relatively unchanged with the decreasing temperature, the mobility of the 2DEG increases to 1.21 × 10⁴ cm²/(V·s) at 2 K. The Shubnikov—de Haas (SdH) oscillations are observed in a magnetic field as low as 2.5 T at 2 K. By the measurements and the analyses of the temperature-dependent SdH oscillations, the effective mass of the 2DEG is determined. The ratio of the transport lifetime to the quantum scattering time is 9 in our sample, indicating that small-angle scattering is predominant.     

氢终端单晶金刚石反相器特性

超宽禁带半导体金刚石材料在高温、高压电路中具有重要的应用潜力.本研究采用微波等离子体化学气相沉积生长的单晶金刚石衬底制备了原子层沉积(atomic layer deposition, ALD)的Al₂O₃栅介质的氢终端金刚石金属氧化物半导体场效应晶体管(metal oxide semiconductor field effect transistor, MOSFET)器件,并与负载电阻互连,成功制备了金刚石反相器. 4μm栅长的氢终端金刚石器件实现了最大113.4 m A/mm的输出饱和漏电流,器件开关比高达109,并在不同负载电阻条件下均成功测得金刚石反相器的电压反转特性,反相器的最大增益为10.     

Vertical polarization-induced doping InN/InGaN heterojunction tunnel FET with hetero T-shaped gate

A novel vertical InN/InGaN heterojunction tunnel FET with hetero T-shaped gate as well as polarization-doped source and drain region (InN-Hetero-TG-TFET) is proposed and investigated by Silvaco-Atlas simulations for the first time. Compared with the conventional physical doping TFET devices, the proposed device can realize the P-type source and N-type drain region by means of the polarization effect near the top InN/InGaN and bottom InGaN/InN heterojunctions respectively, which could provide an effective solution of random dopant fluctuation (RDF) and the related problems about the high thermal budget and expensive annealing techniques due to ion-implantation physical doping. Besides, due to the hetero T-shaped gate, the improvement of the on-state performance can be achieved in the proposed device. The simulations of the device proposed here in this work show I_ON of 4.45×10^-5 A/μm, I_ON/I_OFF ratio of 10¹³, and SS_avg of 7.5 mV/dec in InN-Hetero-TG-TFET, which are better than the counterparts of the device with a homo T-shaped gate (InN-Homo-TG-TFET) and our reported lateral polarization-induced InN-based TFET (PI-InN-TFET). These results can provide useful reference for further developing the TFETs without physical doping process in low power electronics applications.     

Improved mobility of AlGaN channel heterojunction material using an AlGaN/GaN composite buffer layer

The quality of an AlGaN channel heterojunction on a sapphire substrate is massively improved by using an AlGaN/GaN composite buffer layer. We demonstrate an Al0.4Ga0.6N/Al0.18Ga0.82N heterojunction with a state-of-the-art mobility of 815 cm2/(V·s) and a sheet resistance of 890Ω/ under room temperature. The crystalline quality and the electrical properties of the AlGaN heterojunction material are analyzed by atomic force microscopy, high-resolution X-ray diffraction, and van der Pauw Hall and capacitance–voltage(C–V) measurements. The results indicate that the improved electrical properties should derive from the reduced surface roughness and low dislocation density.     

Point defect determination by photoluminescence and capacitance-voltage characterization in a GaN terahertz Gunn diode

Photoluminescence （PL） measurement is used to study the point defect distribution in a GaN terahertz Gunn diode, which is able to the degrade high-field transport characteristic during further device operation. PL, secondary ion mass spectroscopy （SIMS）, transmission electron microscope （TEM）, and capacitance-voltage （C-V） measurements are used to discuss the origin of point defects responsible for the yellow luminescence in structures. The point defect densities of about 1011 cm-2 in structures are extracted by analysis of C-V characterization. After thermal annealing treatment, diminishments of point defect densities in structures are efficiently demonstrated by PL and C-V results.     

Ohmic Contact at Al/TiO_2/n-Ge Interface with TiO_2 Deposited at Extremely Low Temperature

TiO_2 deposited at extremely low temperature of 120°C by atomic layer deposition is inserted between metal and n-Ge to relieve the Fermi level pinning. X-ray photoelectron spectroscopy and cross-sectional transmission electron microscopy indicate that the lower deposition temperature tends to effectively eliminate the formation of GeO_x to reduce the tunneling resistance. Compared with TiO_2 deposited at higher temperature of 250°C,there are more oxygen vacancies in lower-temperature-deposited TiO_2, which will dope TiO_2 contributing to the lower tunneling resistance. Al/TiO_2/n-Ge metal-insulator-semiconductor diodes with 2 nm 120°C deposited TiO_2 achieves 2496 times of current density at-0.1 V compared with the device without the TiO_2 interface layer case, and is 8.85 times larger than that with 250°C deposited TiO_2. Thus inserting extremely low temperature deposited TiO_2 to depin the Fermi level for n-Ge may be a better choice.     

The degradation mechanism of an AIGaN/GaN high electron mobility transistor under step-stress

Step-stress experiments are performed in this paper to investigate the degradation mechanism of an AIGaN/GaN high electron mobility transistor （HEMT）. It is found that the stress current shows a recoverable decrease during each voltage step and there is a critical voltage beyond which the stress current starts to increase sharply in our experiments. We postulate that defects may be randomly induced within the A1GaN barrier by the high electric field during each voltage step. But once the critical voltage is reached, the trap concentration will increase sharply due to the inverse piezoelectric effect. A leakage path may be introduced by excessive defect, and this may result in the permanent degradation of the A1GaN/GaN HEMT.