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Germanium PMOSFETs with Low-Temperature Si2H6 Passivation Featuring High Hole Mobility and Superior Negative Bias Temperature Instability 下载免费PDF全文
We investigate negative bias temperature instability (NBTI) on high performance Ge p-channel metal-oxide- semiconductor field-effect transistors (pMOSFETs) with low-temperature Si2H6 passivation. The Ge pMOSFETs exhibit an effective hole mobility of 311 cm2/V.s at an inversion charge density of 2.5 × 1012 cm^-2. NBTI characterization is performed to investigate the linear transconductance (GM,lin) degradation and threshold voltage shift (△VTH) under NBT stress. Ge pMOSFETs with a lOyr lifetime at an operating voltage of -0.72 V are demonstrated. The impact of the Si2H6 passivation temperature is studied. As the passivation temperature increases from 350℃ to 550℃, the degradation of NBTI characteristics, e.g., GM,lin loss, △VTH and an operating voltage for a lifetime of lOyr, is observed. 相似文献
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We investigate the phonon limited electron mobility in germanium(Ge) fin field-effect transistors(FinFETs)with fin rotating within(001),(110),and(111)-oriented wafers. The coupled Schrodinger-Poisson equations are solved self-consistently to calculate the electronic structures for the two-dimensional electron gas, and Fermi's golden rule is used to calculate the phonon scattering rate. It is concluded that the intra-valley acoustic phonon scattering is the dominant mechanism limiting the electron mobility in Ge FinFETs. The phonon limited electron motilities are influenced by wafer orientation, channel direction, in thickness Wfin, and inversion charge density Ninv. With the fixed Wfin, fin directions of(110),(112) and(110) within(001),(110), and(111)-oriented wafers provide the maximum values of electron mobility. The optimized for mobility is also dependent on wafer orientation and channel direction. As Ninv, increases, phonon limited mobility degrades, which is attributed to electron repopulation from a higher mobility valley to a lower mobility valley as Ninv increases. 相似文献
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Ohmic Contact at Al/TiO_2/n-Ge Interface with TiO_2 Deposited at Extremely Low Temperature 下载免费PDF全文
TiO_2 deposited at extremely low temperature of 120°C by atomic layer deposition is inserted between metal and n-Ge to relieve the Fermi level pinning. X-ray photoelectron spectroscopy and cross-sectional transmission electron microscopy indicate that the lower deposition temperature tends to effectively eliminate the formation of GeO_x to reduce the tunneling resistance. Compared with TiO_2 deposited at higher temperature of 250°C,there are more oxygen vacancies in lower-temperature-deposited TiO_2, which will dope TiO_2 contributing to the lower tunneling resistance. Al/TiO_2/n-Ge metal-insulator-semiconductor diodes with 2 nm 120°C deposited TiO_2 achieves 2496 times of current density at-0.1 V compared with the device without the TiO_2 interface layer case, and is 8.85 times larger than that with 250°C deposited TiO_2. Thus inserting extremely low temperature deposited TiO_2 to depin the Fermi level for n-Ge may be a better choice. 相似文献
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We present different relaxation mechanisms of Ge and SiGe quantum dots under excimer laser annealing. Investigation of the coarsening and relaxation of the dots shows that the strain in Ge dots on Ge films is relaxed by dislocation since there is no interface between the Ge dots and the Ge layer, while the SiGe dots on Si0.77Ge0.23 film relax by lattice distortion to coherent dots, which results from the obvious interface between the SiGe dots and the Si0.77Ge0.23 film. The results are suggested and sustained by Vanderbilt and Wickham's theory, and also demonstrate that no bulk diffusion occurs during the excimer laser annealing. 相似文献
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