基于异质双栅电极结构提高碳纳米管场效应晶体管电子输运效率

为改善碳纳米管场效应晶体管(CNTFET)器件性能, 提高电子输运效率, 提出了一种异质双金属栅(HDMG)电极结构CNTFET器件. 通过对单金属栅(SMG)-CNTFET器件输运模型的适当修改, 实现了对HDMG-CNTFET器件电子输运特性的研究.研究结果表明, 对于所提出的HDMG结构器件, 如果固定源端金属栅S-gate的功函数W_GS使其等于本征CNT 的功函数, 而选取漏端金属栅D-gate的功函数W_Gd, 使其在一定范围内小于W_GS, 可优化器件沟道中的电场分布, 提高器件沟道电子平均输运速率; 同时由于HDMG-CNTFET的D-gate对沟道电势具有调制作用, 使该器件阈值电压降低, 导致在相同的工作电压下, HDMG-CNTFET器件具有更大的通态电流; 而D-gate对漏电压的屏蔽作用又使HDMG-CNTFET与SMG-CNTFET相比具有更好的栅控能力 及减小 漏极感应势垒降低效应、热电子效应和双极导电性等优点. 本研究通过合理选取HDMG-CNTFET双栅电极的功函数, 有效克服了现有研究中存在的改善CNTFET性能需要以减小通态电流为代价的不足, 重要的是提高了器件的电子输运效率, 进而可提高特征频率、减小延迟时间, 有利于将CNTFET器件应用于高速/高频电路. 关键词： CNTFET 异质双栅 电子输运效率 双极导电性     

Al2O3介质层厚度对AlGaN/GaN金属氧化物半导体-高电子迁移率晶体管性能的影响

在蓝宝石衬底上采用原子层淀积法制作了三种不同Al₂O₃介质层厚度的绝缘栅高电子迁移率晶体管.通过对三种器件的栅电容、栅泄漏电流、输出和转移特性的测试表明：随着Al₂O₃介质层厚度的增加,器件的栅控能力逐渐减弱,但是其栅泄漏电流明显降低,击穿电压相应提高.通过分析认为薄的绝缘层能够提供大的栅电容,因此其阈值电压较小,但是绝缘性能较差,并不能很好地抑制栅电流的泄漏;其次随着介质厚度的增加,可以对栅极施加更高的正偏压,因此获 关键词： 2O₃')" href="#">Al₂O₃ 金属氧化物半导体-高电子迁移率晶体管 介质层厚度 钝化     

非对称Halo异质栅应变Si SOI MOSFET的二维解析模型

为了进一步提高深亚微米SOI (Silicon-On-Insulator) MOSFET (Metal-Oxide Semiconductor Field Effect Transistor) 的电流驱动能力, 抑制短沟道效应和漏致势垒降低效应, 提出了非对称Halo异质栅应变Si SOI MOSFET. 在沟道源端一侧引入高掺杂Halo结构, 栅极由不同功函数的两种材料组成. 考虑新器件结构特点和应变的影响, 修正了平带电压和内建电势. 为新结构器件建立了全耗尽条件下的表面势和阈值电压二维解析模型. 模型详细分析了应变对表面势、表面场强、阈值电压的影响, 考虑了金属栅长度及功函数差变化的影响. 研究结果表明,提出的新器件结构能进一步提高电流驱动能力, 抑制短沟道效应和抑制漏致势垒降低效应, 为新器件物理参数设计提供了重要参考. 关键词： 非对称Halo 异质栅 应变Si 短沟道效应     

分层介质中金属栅的平面波散射

求解无损介质中金属栅的平面波散射,对于了解应用在Cassegrain天线系统上的栅抛物面和栅极化扭转反射器的特性有实际价值。 过去多半是求解均匀介质中(如空气中)金属栅的散射问题。实际上,总是把金属栅放在低损耗的介质层中。本文给出了分层介质中金属栅对平面波的散射场;给出了当     

栅控横向PNP双极晶体管辐照感生电荷的定量分离

设计并制作了一种栅控横向PNP双极晶体管测试结构,在常规横向PNP双极晶体管基区表面氧化层上制作了一栅电极,利用栅扫描法,通过扫描栅极所加电压,获得了基极电流随栅极电压的变化特性.理论推导和数学计算获得了氧化物陷阱电荷和界面陷阱电荷的定量变化,分离出栅控横向PNP双极晶体管在辐照及其室温退火过程中感生的缺陷.对设计的晶体管测试结构和采用的测试方法做了具体介绍.     

异质多晶SiGe栅应变Si NMOSFET物理模型研究

结合了“栅极工程”和“应变工程”二者的优点, 异质多晶SiGe栅应变Si MOSFET, 通过沿沟道方向使用不同功函数的多晶SiGe材料, 在应变的基础上进一步提高了MOSFET的性能. 本文结合其结构模型, 以应变Si NMOSFET为例, 建立了强反型时的准二维表面势模型, 并进一步获得了其阈值电压模型以及沟道电流的物理模型. 应用MATLAB对该器件模型进行了分析, 讨论了异质多晶SiGe栅功函数及栅长度、衬底SiGe中Ge组分等参数对器件阈值电压、沟道电流的影响, 获得了最优化的异质栅结构. 模型所得结果与仿真结果及相关文献给出的结论一致, 证明了该模型的正确性. 该研究为异质多晶SiGe栅应变Si MOSFET的设计制造提供了有价值的参考. 关键词： 异质多晶SiGe栅 应变Si NMOSFET 表面势 沟道电流     

中带电压法分离栅控横向pnp双极晶体管辐照感生缺

设计并制作了一种新型双极测试结构,即在常规横向pnp双极晶体管基区表面氧化层上淀积一栅电极,通过扫描栅极所加电压,获得漏极(集电极)电流随栅极电压的变化特性,利用中带电压法分离栅控横向pnp双极晶体管 在辐照过程中感生的氧化物陷阱电荷和界面陷阱电荷.本文对设计的晶体管测试结构和采用 的测试方法做了具体介绍.     

一种基于BSIM4的屏蔽栅沟槽MOSFET紧凑型模型

提出了一种基于BSIM4的屏蔽栅沟槽MOSFET紧凑型模型.在直流模型中使用两端电势建立JFET区等效电阻模型,并引入电子扩散区等效电阻,解决了因忽视JFET区源端电势导致的电流存在误差的问题.在电容模型中,漏源电容模型在BSIM4的基础上添加了屏蔽栅-漏等效电容模型,栅漏电容模型将栅漏偏置电压修改为栅极同栅-漂移区重叠区末端节点的电势差.使用泊松方程求解该节点电势,并引入栅氧厚度因子k1、屏蔽栅氧化层厚度因子k2、等效栅-漂移区重叠长度Lovequ和等效屏蔽栅长LSHequ对栅和屏蔽栅的结构进行等效,以简化泊松方程的计算并确保该节点电势曲线的光滑性.使用Verilog-A编写模型程序,搭建实验平台测试屏蔽栅沟槽MOSFET的直流特性、电容特性和开关特性,模型仿真结果与测试数据有较好的拟合,验证了所建模型的有效性.     

铟镓锌氧薄膜晶体管的悬浮栅效应研究

为了避免光照对铟镓锌氧薄膜晶体管(InGaZnO thin film transistors,IGZO TFTs)电学特性的影响,IGZO TFT要增加遮光金属层.本文研究了遮光金属栅极悬浮时,IGZO TFT的输出特性.采用器件数值计算工具TCAD(technology computer-aided design)分析了IGZO层与栅介质层界面处电势分布,证实了悬浮栅(floating gate,FG)IGZO TFT输出曲线的不饱和现象是由悬浮栅与TFT漏端的电容耦合造成.基于等效电容的电压分配方法,提出了悬浮栅IGZO TFT电流的一阶模型.TCAD数值分析及一阶物理模型结果与测试具有较高程度的符合,较完整地解释了悬浮栅IGZO TFT的电学特性.     

F离子注入新型Al0．25Ga0．75N／GaNHEMT器件耐压分析

为了缓解AlGaN／GaNhighelectronmobilitytransistors（HEMT）器件n型GaN缓冲层高的泄漏电流,本文提出了具有氟离子注入新型Al0．25Ga0．75N／GaNHEMT器件新结构．首先分析得出n型GaN缓冲层没有受主型陷阱时,器件输出特性为欧姆特性,这样就从理论和仿真方面解释了文献生长GaN缓冲层掺杂Fe,Mg等离子的原因．利用器件输出特性分别分析了栅边缘有和没有低掺杂漏极时,氟离子分别注入源区、栅极区域和漏区的情况,得出当氟离子注入源区时,形成的受主型陷阱能有效俘获源极发射的电子而减小GaN缓冲层的泄漏电流,击穿电压达到262v通过减小GaN缓冲层体泄漏电流,提高器件击穿电压,设计具有一定输出功率新型A1GaN／GaNHEMT提供了科学依据．     

C-V characterization of Schottky- and MIS-gate SiGe/Si HEMT structures

Electrical properties of Schottky- and metal-insulator-semiconductor (MIS)-gate SiGe/Si high electron mobility transistors (HEMTs) were investigated with capacitance-voltage (C-V) measurements. The MIS-gate HEMT structure was fabricated using a SiN gate insulator formed by catalytic chemical vapor deposition (Cat-CVD). The Cat-CVD SiN thin film (5 nm) was found to be an effective gate insulator with good gate controllability and dielectric properties. We previously investigated device characteristics of sub-100-nm-gate-length Schottky- and MIS-gate HEMTs, and reported that the MIS-gate device had larger maximum drain current density and transconductance (g_m) than the Schottky-gate device. The radio frequency (RF) measurement of the MIS-gate device, however, showed a relatively lower current gain cutoff frequency f_T compared with that of the Schottky-gate device. In this study, C-V characterization of the MIS-gate HEMT structure demonstrated that two electron transport channels existed, one at the SiGe/Si buried channel and the other at the SiN/Si surface channel.     

Synthesis,characterization and radiation damage studies of high-k dielectric (HfO2) films for MOS device applications

The current trend in miniaturization of metal oxide semiconductor devices needs high-k dielectric materials as gate dielectrics. Among all the high-k dielectric materials, HfO₂ enticed the most attention, and it has already been introduced as a new gate dielectric by the semiconductor industry. High dielectric constant (HfO₂) films (10?nm) were deposited on Si substrates using the e-beam evaporation technique. These samples were characterized by various structural and electrical characterization techniques. Rutherford backscattering spectrometry, X-ray reflectivity, and energy-dispersive X-ray analysis measurements were performed to determine the thickness and stoichiometry of these films. The results obtained from various measurements are found to be consistent with each other. These samples were further characterized by I–V (leakage current) and C–V measurements after depositing suitable metal contacts. A significant decrease in the leakage current and the corresponding increase in device capacitance are observed when these samples were annealed in oxygen atmosphere. Furthermore, we have studied the influence of gamma irradiation on the electrical properties of these films as a function of the irradiation dose. The observed increase in the leakage current accompanied by changes in various other parameters, such as accumulation capacitance, inversion capacitance, flat band voltage, mid-gap voltage, etc., indicates the presence of various types of defects in irradiated samples.     

增强型AlGaN/GaN高电子迁移率晶体管高温退火研究

深入研究了两种增强型AlGaN/GaN高电子迁移率晶体管(HEMT)高温退火前后的直流特性变化.槽栅增强型AlGaN/GaN HEMT在500 ℃ N₂中退火5 min后,阈值电压由0.12 V正向移动到0.57 V,器件Schottky反向栅漏电流减小一个数量级.F注入增强型AlGaN/GaN HEMT在 400 ℃ N₂中退火2 min后,器件阈值电压由0.23 V负向移动到-0.69 V,栅泄漏电流明显增大.槽栅增强型器件退火过程中Schottky有效势垒     

Al2O3绝缘层的AlGaN/GaN MOSHEMT器件研究

在研制AlGaN/GaN HEMT器件的基础上,采用ALD法制备了Al₂O₃ AlGaN/GaN MOSHEMT器件.通过X射线光电子能谱测试表明在AlGaN/GaN异质结材料上成功淀积了Al₂O₃薄膜.根据对HEMT和MOSHEMT器件肖特基电容、器件输出以及转移特性的测试进行分析发现：所制备的Al₂O₃薄膜与AlGaN外延层间界面态密度较小,因而MOSHEMT器件呈现出较 关键词： 2O₃')" href="#">Al₂O₃ ALD GaN MOSHEMT     

Temperature-dependent current conduction mechanism and charge trapping in Ta2O5 RF-sputtered on GaN

A gallium nitride (GaN) based Metal-Oxide-Semiconductor (MOS) capacitor was fabricated using radio frequency (RF)-sputtered tantalum oxide (Ta₂O₅) as the high-k gate dielectric. Electrical characteristics of this capacitor were evaluated via capacitance–voltage (C–V), current–voltage (I–V), and interface trap density (D_it) measurements with emphasis on the substrate temperature dependence ranging from 25 °C to 200 °C. Charge trapping and conduction mechanism in Ta₂O₅ were investigated. The experimental results suggested that higher substrate temperature rendered higher oxide capacitance, reduced gate leakage current, and lowered mid-gap interface trap density at the expenses of high border traps and high fixed oxide charges. The gate leakage current through Ta₂O₅ was found to obey the Ohm's conduction at lower gate bias and the Poole–Frenkel conduction at higher gate bias.     

低栅极电压控制下带有phenyltrimethoxysilane单分子自组装层的有机薄膜晶体管场效应特性研究

制作了底栅极顶接触有机薄膜晶体管器件,60 nm的pentacene被用作有源层,120 nm热生长的SiO₂作为栅极绝缘层.通过采用不同自组装修饰材料对器件的有源层与栅极绝缘层之间的界面进行修饰,如octadecyltrichlorosilane （OTS）,phenyltrimethoxysilane （PhTMS）,来比较界面修饰层对器件性能的影响.同时对带有PhTMS修饰层的OTFTs器件低栅极电压调制下的场效应行为及其载流子的传输机理进行研究.结果得到,当|V 关键词： 有机薄膜晶体管 自组装单分子层 场效应迁移率 低栅极调制电压     

Germanium segregation in CVD grown SiGe layers

A 2D layer of spherical, crystalline Ge nanodots embedded in a SiO₂ layer was formed by low pressure chemical vapour deposition combined with furnace oxidation and rapid thermal annealing. The samples were characterized structurally by using transmission electron microscopy and Rutherford back scattering spectrometry, as well as electrically by measuring C-V and I-V characteristics. It was found that formation of a high density Ge dots took place due to oxidation induced Ge segregation. The dots were situated in the SiO₂ at the average distance 5–6 nm from the substrate. Strong evidence of charge storage effect in the crystalline Ge-nanodot layer was demonstrated by the hysteresis behavior of the high-frequency C-V curves.     

Ionic character of SrF2-B2O3-GeO2-SiO2 glasses for viscous flow and their applications to MOS capacitors

The capacitance and voltage (C-V) characteristics of metal, oxide, and semiconductors (MOS) capacitors passivated by SrF₂-B₂O₃-GeO₂-SiO₂ glasses with various water and fluoride contents were investigated. As the OH^– absorption coefficient of a glass increased, adverse effects on the recovery of shifts of the hysteresisC-V curve have been observed. The water content of ions is closely related to the fluoride content in the SrF₂-B₂O₃-GeO₂-SiO₂ glass. The viscous-flow transition point of glass was lowered with increasing degree of ionic character obtained from Hannay's equation.     

AlGaN/GaN肖特基结参数分析与电流运输机理研究

通过对AlGaN/GaN HEMT器件肖特基栅电流输运机理的研究,在变温下采用I-V法对AlGaN/GaN上的Ni/Au肖特基势垒高度和理想因子进行了计算. 通过对不同电流机理的分立研究,得到了更为准确的势垒高度值_b. 通过分析温度在300—550K之间肖特基反向泄漏电流的特性,得出结论：AlGaN材料的表面漏电不是HEMT器件反向泄漏电流的主要来源. 关键词： AlGaN/GaN异质结 肖特基结 理想因子