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1.
利用深能级瞬态谱(DLTS)和瞬态光电阻率谱(TPRS)研究了利用金属有机物化学汽相沉淀(MOCVD)生长的未有意掺杂的In0.49Ga0.51P中缺陷对载流子的俘获过程和发射过程.利用DLTS测量观测到了一个激活能为0.37eV的缺陷,该缺陷的俘获势垒值介于180meV到240meV之间.该缺陷的俘获势垒值的大的分布被解释为缺陷周围原子重组的微观波动.在研究中发现研究这些缺陷的俘获过程比发射过程更有效,俘获势垒为0.06eV和0.40eV的两个缺陷在俘获过程中被观测到,而在发射过程中并没有观测到  相似文献   

2.
陈开茅  金泗轩  邱素娟 《物理学报》1994,43(8):1352-1359
用深能级瞬态谱(DLTS)技术测量了高温退火的Be和Si共注入的LEC半绝缘GaAs(无掺杂)。在多子脉冲作用下的Al/Be-Si共注LECSIGaAs肖特基势垒中,观测到E01(0.298),E02(0.341),E03(0.555)和E04(0.821)等四个电子陷阱以及两个主要的少子(空穴)陷阱H'03(0.54)和H″03(0.57)。两少子陷阱的DLTS信号具有若干特点,比如它们的DLTS·峰难于通过增宽脉冲达到最大高度;以及峰的高度强烈地依赖于温度等。这些现象可以用少子陷阱的少子俘获和热发射理论进行合理地解释。鉴于用DLTS技术测量这种陷阱的困难,我们用恒温电容瞬态技术测定它们的空穴表观激活能分别为0.54和0.57eV。它们是新观测到的和Be-Si共注SIGaAs有关缺陷。 关键词:  相似文献   

3.
硅直接键合界面附近的深能级研究   总被引:3,自引:0,他引:3       下载免费PDF全文
利用扩展电阻探针(SRP)和深能级瞬态谱(DLTS)技术详细研究了直接键合的n-Si/n+-Si界面附近的深能级。实验结果表明,在直接键合的n-Si/n+-Si界面n-Si一侧附近可观察到一个明显的电子陷阱E1(E-0.39eV)。E1可能是由若干个能级位置相近的陷阱迭加而成的,其浓度在1013-1014cm-3之间。它可能是与制备键合材料的高温(1000-1100℃)处理 关键词:  相似文献   

4.
应用深能级瞬态谱(DLTs)技术详细研究低压-金属有机物汽相外延(LP-MOVPE)生长的Ga0.47In0.53As/Inp量子阱、宽接触和质子轰击条形异质结激光器中的深能级。样品的DLTS表明,在宽接触激光器的i-Ga0.47In0.53As有源层里观察到H1(E+0.09eV)和E1(E-0.35eV)陷阱,它们可能分别与样品生长过程中扩散到i-Ga0.4 关键词:  相似文献   

5.
采用迁移率谱和多电子拟合过程相结合的混合电导分析法,对分子束外延(MBE)生长的Hg1-xCdxTe材料的变磁场实验数据进行了处理.该方法可以将外延层中体电子对电导的贡献与界面电子的贡献区分开,通过对不同温度下变磁场数据的分析,表明该方法是准确和可靠的,可以成为一种半导体材料和器件的常规电学测试和分析手段 关键词:  相似文献   

6.
为研究ZnSe中的本征缺陷和A1在ZnSe中的深能级行为,首先测量了Znse单晶体中的深能级,发现只存在Ee-0.33eV一个电子陷阱.然后,通过热扩散的方法,在300℃~700℃温度范围内把A1掺杂到ZnSe单晶体中,结果发现存在Ee-0.33eV和Ee-0.70eV两个电子陷阱.本文从缺陷化学角度对ZnSe中的本征缺陷和Ee-0.70eV深能级的结构及起源进行了讨论.  相似文献   

7.
通过测量无机光谱烧孔系列材料MyM′1-yFClxBr1-x:Sm2+(M=Mg,Ca,Sr,Ba)中4f5d带的激发光谱随组分x和y的变化,5DJ—7F0(J=2,1,0)跃迁的荧光衰减随组分与温度的变化,对其烧孔的电子跃迁过程及其对烧孔效率的影响进行了研究.得出结论:在此系列材料中,随着Br含量和小半径的碱土离子的增加,Sm2+的4f5d带与5DJ能级更加接近,使7F0—5DJ的电子跃迁几率增大,烧孔效率提高  相似文献   

8.
薄膜电致发光器件中SiO2层加速机制的研究   总被引:1,自引:0,他引:1  
王平  刘勇 《发光学报》1997,18(4):289-291
研究非晶SiO2缺陷能级上电子的隧道效应,移植实验的XPS芯能级谱技术,用DV-Xα计算界面SiO2/ZnS的能带断错,认为该界面处的能带断错是电子加速的主要机制.  相似文献   

9.
彭承  孙恒慧 《物理学报》1987,36(11):1408-1415
本文用电子辐照的方法在n型InP中引入缺陷,并以深能级瞬态谱为基础,结合多种实验方法和理论计算,对缺陷的结构作了较为系统的研究和分析。首先,根据空位的引入和迁移模型,从理论上计算出In和P单空位的引入率和消失温度,经与实验结果比较,鉴别出室温电子辐照后InP中主要的缺陷是以络合结构的形式存在的。文中还推导了连续界面态与DLTS信号的关系式。很据这一关系式,经计算机运算,证实辐照前InPDLTS谱中的某一个宽峰是由界面电子的发射和俘获所引起。从实验还发现,经电子辐照后该峰明显变小,反映了界面态密度的降低,结 关键词:  相似文献   

10.
8-羟基喹啉锂用作有机电致发光器件的电子注入层能够提高阴极功函数,进而提高器件的发光效率。10的Liq薄膜足以降低有机电致发光器件中的开启电压并能有效提高器件效率,该现象可与LiF/Al作阴极的器件性能相比拟。利用不同阴极材料制作器件,讨论了8-羟基喹啉锂的电子注入机制,发现把Liq薄膜引入到Alq3和不同阴极之间后,器件的电流密度与所用阴极材料的种类无关。为了讨论电子在分界面上注入势垒的变化情况,对器件进行饱和光伏测试。测试发现Alq3/Liq/Al的分界面上真空能级的移动降低了电子注入势垒。推测此现象是由于在界面上形成了强偶极子,这也可能是有机电致发光器件中电子注入效率提高的机理之一。  相似文献   

11.
The defects at the Si/SiO2 interface have been studied by the deep-level transient spectroscopy (DLTS) technique in p-type MOS structures with and without gold diffusion. The experimental results show that the interaction of gold and Si/SiO2 interface defect,Hit(0.494), results in the formation of a new interface de-fect, Au-Hit(0.445). Just like the interface defect, Hit(0.494), the new interface defect possesses a few interesting properties, for example, when the gate voltage applied across the MOS structure reduces the energy interval between Fermi-level and Si valence band of the Si surface to values smaller than the hole ionization Gibbs free energy of the defect, a sharp DLTS peak is still observable; and the hole apparent activation energy increases with the decrease of the Si surface potential barrier height. These properties can be successfully explained with the transition energy band model of the Si/SiO2 interface.  相似文献   

12.
Deep level transient spectroscopy (DLTS) and high-frequency capacitance-voltage (HF-CV) measurement are used for the investigation of HfAlO/p-Si interface. The so-called “slow” interface states detected by HF-CV are obtained to be 2.68 × 1011 cm−2. Combined conventional DLTS with insufficient-filling DLTS (IF-DLTS), the true energy level position of interfacial traps is found to be 0.33 eV above the valance band maximum of silicon, and the density of such “fast” interfacial traps is 1.91 × 1012 cm−2 eV−1. The variation of energy level position of such traps with different annealing temperatures indicates the origin of these traps may be the oxide-related traps very close to the HfAlO/Si interface. The interfacial traps’ passivation and depassivation effect of postannealing in forming gas are shown by comparing samples annealed at different temperatures.  相似文献   

13.
The defects at the Si/SiO2 interface have been studied by the deep-level transient spectroscopy (DLTS) technique in p-type MOS structures with and without gold diffusion. The experimental results show that the interaction of gold and Si/SiO2 interface defect,Hit(0.494), results in the formation of a new interface de-fect, Au-Hit(0.445). Just like the interface defect, Hit(0.494), the new interface defect possesses a few interesting properties, for example, when the gate voltage applied across the MOS structure reduces the energy interval between Fermi-level and Si valence band of the Si surface to values smaller than the hole ionization Gibbs free energy of the defect, a sharp DLTS peak is still observable; and the hole apparent activation energy increases with the decrease of the Si surface potential barrier height. These properties can be successfully explained with the transition energy band model of the Si/SiO2 interface.  相似文献   

14.
Low energy (±80 eV) Ar plasma etching has been successfully used to etch several semiconductors, including GaAs, GaP, and InP. We have studied the only prominent defect, E0.31, introduced in n-type Sb-doped Ge during this process by deep level transient spectroscopy (DLTS). The E0.31 defect has an energy level at 0.31 eV below the conduction band and an apparent capture cross-section of 1.4×10−14 cm2. The fact that no V-Sb defects and no interstitial-related defects were observed implies that the etch process did not introduce single vacancies or single interstitials. Instead it appears that higher order vacancy or interstitial clusters are introduced due to the large amount of energy deposited per unit length along the path of the Ar ions in the Ge. The E0.31 defect may therefore be related to one of these defects. DLTS depth profiling revealed the E0.31 concentration had a maximum (6×1013 cm−3) close to the Ge surface and then it decreased more or less exponentially into the Ge. Finally, annealing at 250 °C reduced the E0.31 concentration to below the DLTS detection limit.  相似文献   

15.
p型硅MOS结构Si/SiO2界面及其附近的深能级与界面态   总被引:1,自引:0,他引:1       下载免费PDF全文
陈开茅  武兰青  彭清智  刘鸿飞 《物理学报》1992,41(11):1870-1879
用深能级瞬态谱(DLTS)技术系统研究了Si/SiO2界面附近的深能级和界面态。结果表明,在热氧化形成的Si/SiO2界面及其附近经常存在一个浓度很高的深能级,它具有若干有趣的特殊性质,例如它的DLTS峰高度强烈地依赖于温度,以及当栅偏压使费密能级与界面处硅价带顶的距离明显小于深能级与价带顶的距离时,仍然可以观测到一个很强的DLTS峰。另外,用最新方法测量的Si/SiO2界面连续态的空穴俘获截面与温度有关,而与能量位置无明显关系,DLTS测 关键词:  相似文献   

16.
Abstract

The nature of the irradiation induced defects in germanium single crystal doped with tellurium was studied by DLTS and electrical measurements.

The Ec-0.21 eV level produced by irradiation with 1.5 MeV electrons was studied by DLTS technique. It was found that the defect associated with the Ec-0.21 eV level is divacancy. The E-center like defect (group V impurity-vacancy pair) introduces the Ec-0.20 eV level in samples doped with group V impurity. The level introduced by tellurium (group VI impurity)-vacancy pair is located at deeper than Ec-0.21 eV.

The Ec-0.16 eV level was generated by the annealing at 430 K. A model for the defect associated with the level is proposed to be a tellurium-vacancies complex.  相似文献   

17.
In this paper, we investigate the influence of deep level defects on the electrical properties of Ni/4H-SiC Schottky diodes by analyzing device current-voltage(I-V) characteristics and deep-level transient spectra(DLTS). Two Schottky barrier heights(SBHs) with different temperature dependences are found in Ni/4 H-SiC Schottky diode above room temperature. DLTS measurements further reveal that two kinds of defects Z_(1/2) and Ti(c)~a are located near the interface between Ni and SiC with the energy levels of E_C-0.67 eV and E_C-0.16 eV respectively. The latter one as the ionized titanium acceptor residing at cubic Si lattice site is thought to be responsible for the low SBH in the localized region of the diode, and therefore inducing the high reverse leakage current of the diode. The experimental results indicate that the Ti(c)~a defect has a strong influence on the electrical and thermal properties of the 4 H-SiC Schottky diode.  相似文献   

18.
用Nd-YAG脉冲激光对n型硅掺铟,形成外p+n结。利用二次离子质谱仪(SIMS)、卢瑟福背散射(RBS)等方法,研究了硅内铟的分布,并分析了用20ns脉冲激光硅掺铟的物理过程,发现当激光能量密度足够大时,在硅表面层存在硅-铟混合熔体和液态硅两部分。当激光能量密度较小时,硅表面层仅有液态硅层、用I-V,C-V和深能级瞬态谱(DLTS)等方法研究了p+n结的电学性质,发现在p+n结的n区存在两个缺陷。一个能通过快速热退火,在600℃,60s条件下消失,研究表明可能为空位与杂质的复合体。另一个通过快速热退火不能消失,可能与位错有关。 关键词:  相似文献   

19.
《Current Applied Physics》2014,14(3):223-226
Negative photoconductivity (NPC) was observed in n-ZnO/p-Si heterojunction diode grown by ultra-high vacuum sputtering method under nitrogen ambient. Under the illumination of ultra-violet light, positive photoconductivity was observed at low bias voltages, whereas NPC was observed at high bias voltages. The defect states in the ZnO layers grown on Si were analyzed by photoluminescence and deep level transient spectroscopy measurements. Two deep levels were measured at Ec-0.51 eV and Ec-0.54 eV, which might be originated from oxygen vacancy and nitrogen atom related defects, respectively. Based on the simulation of band diagram, the defect states were located below Fermi level at zero bias voltage. However, as increasing the bias voltages, NPC was observed due to the increase of empty defect states. This analysis allowed us to consider the possibility that the NPC phenomenon in n-ZnO/p-Si heterojunction diode is originated dominantly from the defect states as a carrier recombination center in ZnO layer.  相似文献   

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