Diamond cubic Sn-rich nanocrystals: synthesis, microstructure and optical properties

Diamond cubic Sn-rich nanocrystals were fabricated with radii less than 20 nm by post-growth annealing at T=750 °C of Sn_xGe_1-x alloys grown on Ge(001) by molecular beam epitaxy. The crystal phase of the Sn-rich nanocrystals was determined to be diamond cubic from Fourier transform analysis of high-resolution transmission electron microscopy images. Optical transmittance of these Sn_xGe_1-x/Ge (001) films demonstrated changes in optical absorption that can be attributed to absorption from the nanocrystals. The energy bandgap was measured to be 0.45 eV for nanocrystals arrays in Ge with a mean diameter of 32 nm. PACS 68.37.Lp; 78.67.Hc; 81.07.Ta; 81.16.Dn; 68.65.Hb     

Size dependent charge storage characteristics of MBE grown Ge nanocrystals on surface oxidized Si

We have demonstrated the growth of size controlled Ge nanocrystals by molecular beam epitaxy on oxidized Si for the fabrication of floating gate memory structure. The size and density of the nanocrystals have been controlled by varying the growth temperature. The role of interface states and nanocrystals on the memory characteristics has been studied using frequency dependent conductance-voltage measurements. Superior retention characteristics and an enhanced memory window width have been achieved by replacing SiO₂ with high-k Al₂O₃ as a blocking oxide with a higher barrier height.     

Violet luminescence in Ge nanocrystals/Ge oxide structures formed by dry oxidation of polycrystalline SiGe

Nanocrystals of Ge surrounded by a germanium oxide matrix have been formed by dry thermal oxidation of polycrystalline SiGe layers. Violet (3.16 eV) luminescence emission is observed when Ge nanocrystals, formed by the oxidation of the Ge segregated during the oxidation of the SiGe layer, are present, and vanishes when all the Ge has been oxidized forming GeO₂. Based on the evolution of the luminescence intensity and the structure of the oxidized layer with the oxidation time, the recombination of excitons inside the nanocrystals and the presence of defects in the bulk oxide matrix are ruled out as sources of the luminescence. The luminescence is attributed to recombination in defects at the Ge sub-oxide interface between the Ge nanocrystals and the surrounding oxide matrix, which is GeO₂.     

Formation of Ge nanocrystals and evolution of the oxide matrix in as-deposited and annealed LPCVD SiGeO films

SiGeO films were deposited by LPCVD using Si₂H₆, GeH₄ and O₂ as reactive gases and furnace annealed to segregate the possible excess of Si and Ge in the form of nanocrystals embedded in an oxide matrix. For low GeH₄:Si₂H₆ flow ratios and deposition temperatures of 450 ^°C or lower, the deposited film consists of a SiO₂ matrix incorporating Ge. No Ge oxides and no nanocrystals are detected. After annealing of the samples with SiO₂ matrices at temperatures of 600 ^°C or higher, quasi-spherical isolated Ge nanocrystals with diameters ranging from 4.5 to 9 nm and homogeneously distributed throughout the whole film thickness are formed. In the samples deposited with low GeH₄:Si₂H₆ flow ratios, the original SiO₂ matrix holds its composition.     

Synthesis of Ge nanocrystals by atom beam sputtering and subsequent rapid thermal annealing

Ge nanocrystals embedded in an SiO₂ matrix were prepared by the atom beam co-sputtering (ABS) method from a composite target of Ge and SiO₂. The as-deposited films were rapid thermally annealed at the temperatures 700 and 800 °C in nitrogen ambience. The structure of the films was evaluated by using X-ray diffraction (XRD) and Raman spectroscopy. XRD results reveal that as-deposited films are amorphous in nature whereas annealed samples show crystalline nature. Raman scattering spectra showed a peak of Ge–Ge vibrational mode shifted downwards to 297 cm^?1, presumably caused by quantum confinement of phonons in the Ge nanocrystals. Rutherford backscattering spectrometry has been used to measure the thickness and Ge composition of the composite films. Size variation of Ge nanocrystals with annealing temperature has been discussed. The advantages of ABS over other methods are highlighted.     

Influence of the thickness of the tunnel layer on the charging characteristics of Si nanocrystals embedded in an ultra-thin SiO2 layer

In this paper, we have studied the effect of the thickness of the initial SiO₂ layer (5–7 nm) on the charge and discharge properties of a 2D array of Si nanoparticles embedded in these SiO₂ layers fabricated by ultra-low-energy ion implantation (ULE-II) and annealing. The structural characteristics of these nanocrystal-based memories (position of the nanocrystals with respect to the electrodes, size and surface density of the particles in the plane) were studied by transmission electron microscopy (TEM) and energy filtered TEM (EF-TEM). Electrical characterizations were performed at room temperature using a nano-MOS capacitor to be able to address only a few nanoparticles (nps). EFTEM gives the measurements of oxide thickness, injection, control and nps distances, size and density. I–V and I–t measurements exhibit current peaks and random telegraph signal fluctuations that can be interpreted as due to quantized charging of the nps and to some electrostatic interactions between the trapped charges and the tunnelling current. We have shown that these characteristics strongly vary with the initial oxide thickness, exhibiting several charging/discharging events for the 7-nm-thick layer while charging events prevail in the case of 5-nm-thick layer. These results indicate that the probability of discharging phenomena is reduced when the tunnel layer thickness decreases.     

Cobalt metal nanoparticles embedded in SiO2 dielectric layer for the application of nonvolatile memory

Metal–oxide–semiconductor structures (MOS) with the embedded Co nanoparticles (NPs) were efficiently fabricated by utilizing an external laser irradiation technique for the application of nonvolatile memory. Images of high resolution transmission electron microscopy measurements exhibited that the Co NPs of 5 nm in diameter were clearly embedded in SiO₂ gate oxide. Capacitance–voltage measurements certainly exhibited flat-band voltage shift of 2.2 V from 2 V to −8 V in sweeping range. The retention characteristics of MOS capacitors with the embedded Co NPs were also studied as a function of tunnel oxide thickness to confirm the suitability of nonvolatile memory devices with metal NPs. The experimental results reveal that our unique laser process will give possible promise for experimental efficient formation or insertion of metal NPs inside the gate oxide.     

Wet thermal annealing effect on TaN/HfO2/Ge metal-oxide-semiconductor capacitors with and without a GeO2 passivation layer

Wet thermal annealing effects on the properties of TaN/HfO2/Ge metal-oxide-semiconductor(MOS) structures with and without a GeO2 passivation layer are investigated.The physical and the electrical properties are characterized by X-ray photoemission spectroscopy,high-resolution transmission electron microscopy,capacitance-voltage(C-V) and current-voltage characteristics.It is demonstrated that wet thermal annealing at relatively higher temperature such as 550℃ can lead to Ge incorporation in HfO2 and the partial crystallization of HfO2,which should be responsible for the serious degradation of the electrical characteristics of the TaN/HfO2/Ge MOS capacitors.However,wet thermal annealing at 400℃ can decrease the GeO x interlayer thickness at the HfO2/Ge interface,resulting in a significant reduction of the interface states and a smaller effective oxide thickness,along with the introduction of a positive charge in the dielectrics due to the hydrolyzable property of GeO x in the wet ambient.The pre-growth of a thin GeO2 passivation layer can effectively suppress the interface states and improve the C-V characteristics for the as-prepared HfO2 gated Ge MOS capacitors,but it also dissembles the benefits of wet thermal annealing to a certain extent.     

Energetics of Ge nucleation on SiO2 and implications for selective epitaxial growth

We have measured the time evolution of Ge nucleation density on SiO₂ over a temperature range of 673–973 K and deposition rates from 5.1 × 10¹³ atoms/cm² s (5 ML/min) to 6.9 × 10¹⁴ atoms/cm² s (65 ML/min) during molecular beam epitaxy. The governing equations from mean-field theory that describe surface energetics and saturation nucleation density are used to determine the size and binding energy of the critical Ge nucleus and the activation energy for Ge surface diffusion on SiO₂. The critical nucleus size is found to be a single Ge atom over substrate temperatures from 673 to 773 K, whereas a three-atom nucleus is found to be the critical size over substrate temperatures from 773 to 973 K. We have previously reported 0.44 ± 0.03 eV for the Ge desorption activation energy from SiO₂. This value, in conjunction with the saturation nucleation density as a function of substrate temperature, is used to determine that the activation energy for surface diffusion is 0.24 ± 0.05 eV, and the binding energy of the three-atom nucleus is 3.7 ± 0.1 eV. The values of the activation energy for desorption and surface diffusion are in good agreement with previous experiments of metals and semiconductors on insulating substrates. The small desorption and surface diffusion activation barriers predict that selective growth occurring on window-patterned samples is by direct impingement of Ge onto Si and ready desorption of Ge from SiO₂. This prediction is confirmed by the small integral condensation coefficient for Ge on SiO₂ and two key observations of nucleation behavior on the window-patterned samples. The first observation is the lack of nucleation exclusion zones around the windows, and second is the independence of the random Ge nucleation density on patterned versus unpatterned oxide surfaces. We also present the Ge nucleation density as a function of substrate temperature and deposition rate to demarcate selective growth conditions for Ge on Si with a window-patterned SiO₂ mask.     

Growth and properties of SiGe structures obtained by selective epitaxy on finite areas

Selective epitaxy growth (SEG) was used to build SiGe optoelectronic devices and nanoscale structures for the future nanotechnology. The growth of strained SiGe on small areas offers some advantages for improvement of device performances. In particular, with relative large area light emitting diodes (LED), the emission efficiency of SiGe diodes can be increased up to 0.1% internal value at room temperature. Further improvements are expected for nanoscale devices. By SEG on mesas, Ge islands can be obtained ordered in lines along the mesas edges. Precise localization of Ge dots can be obtained by SEG in very small oxide windows and even only one island/window is formed. It was shown that nanostructures of size down to 5 nm can be grown by this method. PACS 81.15Kk; 81.07.-b; 78.60.Fi     

高迁移率Ge沟道器件研究进展

高迁移率Ge沟道器件由于其较高而且更对称的载流子迁移率, 成为未来互补型金属-氧化物-半导体(CMOS) 器件极有潜力的候选材料. 然而, 对于Ge基MOS器件, 其栅、源漏方面面临的挑战严重影响了Ge基MOS 器件性能的提升, 尤其是Ge NMOS器件. 本文重点分析了Ge基器件在栅、源漏方面面临的问题, 综述了国内外研究者们提出的不同解决方案, 在此基础上提出了新的技术方案. 研究结果为Ge基MOS 器件性能的进一步提升奠定了基础.     

Submicrometer-MOS capacitor with ultra high capacitance biased by Au nanoelectrodes

The ultimate limits of size of the current metal-oxide-semiconductor capacitors can be overcome by preparation of three-dimensional devices that can vertically be biased using one-dimensional metal nanostructures. Here, we present a general and efficient approach to the assembly and integration of Au nanocrystals into functional nanoelectrodes of three-dimensional submicrometer-MOS (0.35 μm²) capacitors, presenting an ultra high capacitance (24±1 pF). The Au nanocrystals were directly produced into a nanoporous template of anodized aluminum oxide that was evaluated, and the electrical characterization of this device corroborates the formation of the MOS capacitor. Flat band voltage is independent of sweep voltage range, and negligible hysteresis of capacitance-voltage curves is observed when sweep voltage ranges from positive to negative and turned again to positive bias. In addition, experimental results match theoretical analysis and indicate the presence of free surface charges stored in the Au nanostructures. The demonstrated ability to control the assembling of the nanocrystals and the results of electrical characterization indicate that the embedded Au nanoelectrodes have a high potential for memory applications based on three-dimensional devices.     

Fabrication of Ge nanocrystals doped silica-on-silicon waveguides and observation of their strong quantum confinement effect

Germanium (Ge) nanocrystals embedded in silica matrix is an interesting material for new optoelectronic devices. In this paper, standard silica-on-silicon waveguides with a core doped by Ge nanocrystals were fabricated using plasma enhanced chemical vapour deposition and reactive ion etching. The cross-sectional waveguide structures were investigated by scanning electron microscopy. Transmission of the waveguide was measured using a broadband light source covering the wavelength range from 500 nm to 1700 nm, and the results were compared against transmission through a standard waveguide. Strong absorption peaks at 1056.8 nm, 1263.2 nm and 1406 nm were observed. These are assigned to the quantum confinement effect in Ge nanocrystals in the core. Putting Ge nanocrystals in a waveguide enables easy material characterisation and potential application in an integrated lightwave circuit device.     

Process and device characteristics of self-assembled metal nano-crystal EEPROM

Metal nanocrystals self-assembled on gate tunneling oxide can be used to replace the conventional Si/Ge nanocrystals as the floating gate in EEPROM cells. We have demonstrated the successful use of Au and W with their respective process dependence and self-assembly characteristics. The new material options can potentially enhance the applicability and functionality of the nanocrystal EEPROM device. Implications on process integration, in particular the control oxide growth and overall thermal budget, are examined by microscopy, gate current injection and channel mobility monitoring. Charging by hot-carrier injection and control gate tunneling have both been observed by shifts in I–V characteristics. The electrostatic behavior of metal nanocrystals is similar to that of Si nanocrystals in terms of the asymmetrical threshold voltage on source–drain reversal after hot-carrier injection and the Coulomb blockade effects. The electrodynamic behavior is expected to be quite different due to the density of states, but further study is required for quantitative analysis.     

Growth and use of metal nanocrystal assemblies on high-density silicon nanowires formed by chemical vapor deposition

In this paper, we describe the growth and potential application of metal nanocrystal assemblies on metal-catalyzed, CVD-grown silicon nanowires (SiNWs). The nanowires are decorated by chemical assembly of closely spaced (1–5 nm) Ag (30–100 nm diameter) and Au (5–25 nm diameter) nanocrystals formed from solutions of AgNO₃ and NaAuCl₄·2H₂O, respectively. The formation and growth of metal nanocrystals is believed to involve the galvanic reduction of metal ions from solution and the subsequent oxidation of available Si-hydride sites on the surfaces of the nanowires. A native oxide layer suppresses formation of metal nanocrystals; adding HF to the ionic solutions significantly increases the density of nanocrystals on the surfaces of the nanowires. The nanocrystals coating the nanowires were characterized by X-ray photoelectron spectroscopy, scanning electron microscopy, and X-ray diffraction. Ag nanocrystals on the nanowires afford sensitive detection of Rhodamine 6G (R6G) molecules in the 100 picomolar–micromolar range by surface enhanced Raman spectroscopy. In addition, Au nanocrystals formed on selected surfaces of a substrate of arbitrary shape can serve as effective nuclei for localized nanowire growth. PACS 81.07.b; 81.15.Gh     

基于Al2O3/Pt纳米晶/HfO2叠层的MOS电容存储效应研究

采用电子束蒸发Pt和后快速热退火的方法,研究了退火条件对Pt纳米晶的生长特性的影响,结果显示Pt纳米晶的密度随退火温度的升高和退火时间的延长均表现出先增大后减小的趋势.在800℃下退火20 s能得到分布均匀的、密度为30×10¹¹ cm^-2的Pt纳米晶.进一步研究了基于Al₂O₃/Pt纳米晶/HfO₂叠层的MOS电容结构的存储效应,表明其在-3—+8 V扫描电压范围下C-V< 关键词： Pt纳米晶 快速热退火 原子层淀积 存储效应     

Radiation defects introduced by MeV electrons in argon implanted MOS structures

The influence of MeV electron irradiation on the interface states of argon implanted thin oxide MOS samples has been studied by the thermally stimulated current (TSC) method. The oxide thickness of the structures is 18 nm. Two groups of n-type MOS structures non-implanted and implanted with 20 keV Ar⁺ ions and a dose of 5×10¹² cm⁻² are examined. Both groups are simultaneously irradiated by 23 MeV electrons with doses of 1.2×10¹⁶, 2.4×10¹⁶ or 6.0×10¹⁶ el/cm². The energy position and density of the interface states (generated by electron irradiation, ion implantation or both treatments of the samples) are determined. It is shown that MeV electron irradiation decreases the concentration of interface states (like an oxygen-vacancy and di-vacancy) slightly and creates additional interface states (like an impurity-vacancy) at the Si–SiO₂ interface of argon implanted MOS structures.     

Time Dependence of the Capacitance of a MOS Silicon Tunnel Diode under the Influence of Hydrogen

The results of theoretical and experimental investigations into the time dependence of the capacitance of MOS silicon diodes with a thin tunnel dielectric and a palladium field electrode under the influence of a gas hydrogen-containing mixture are presented. Analytical expressions are derived that describe the time dependence of the capacitance of the space charge region (SCR) of the MOS tunnel diode operating in depletion and enrichment regimes. It is demonstrated that the time dependence of the SCR capacitance of the MOS diode placed in the gas mixture is caused by diffusion of hydrogen atoms from the field electrode to the SiO _x –n-Si interface. The relaxation time of hydrogen atom accumulation at the interface is 47 s for the diode with a SiO _x layer thickness of 3.7 nm placed in the gas mixture with 0.3 vol.% of H₂. It has been established that the flat band voltage and the SCR capacitance of the MOS diode change under the influence of the gas mixture due to the decreased density of surface acceptor states at the SiO _x –n-Si interface, the increased positive charge density in the dielectric, and the decreased contact potential difference.     

中子嬗变掺杂前后Ge纳米晶的结构和性质

采用第一性原理计算模拟Ge纳米晶在中子嬗变掺杂(NTD)后受空位、O和As杂质的影响.结果表明,退火方法引入的O并不能消除纳米晶中的辐照致空位缺陷的影响,而NTD 产生的As掺杂能补偿这些空位缺陷并消除禁带中产生的杂质能级,从而改善半导体掺杂性能.计算还发现,由于较高的电负性,纳米晶中O对Ge原子较强的吸附作用阻止了空位的形成,导致与缺陷相关的非辐射发光中心的浓度减小,发光效率提高,因此中子辐照掺杂前的高温退火处理是非常有必要的.计算较好地解释了已报道的实验结果. 关键词： Ge纳米晶 中子嬗变掺杂 第一性原理 空位缺陷     

Metal-oxide-semiconductor field effect transistor using ‘oxidizedμc-Si/ultrathin oxide’ gate structure

The metal-oxide-semiconductor (MOS) field effect transistor (FET) using ‘oxidized μ c-Si/ultrathin oxide’ gate structure was studied. It was found that this structure shows negative differential resistance behavior, which can be explained by the Coulomb blockade effect of trapped carriers and immediate tunneling into and tunneling out with gate bias variation. The requirements for the device with this structure showing negative differential resistance behavior are based on very weak resistive coupling between floating gate and channel. They are the thinness of the tunnel oxide film, the thickness ratio of the upper oxidized film and the tunnel oxide, and the channel threshold voltage. MOSFET with this gate structure is proposed as a new negative differential resistance device.