Ni全硅化金属栅功函数调节技术研究

通过制备栅内不同掺杂条件的Ni全硅化金属栅电容并分析其C-V和V_fb-EOT特性发现,Ga和Yb较常规的杂质而言具有更好的栅功函数调节能力,能够分别将Ni全硅化金属栅电极功函数调节到价带顶和导带底附近,满足高性能体硅平面互补金属氧化物半导体(CMOS)器件对栅电极功函数的要求. 同时根据电偶极子(Dipole)理论分析了Ga和Yb具有较强栅功函数调节能力的原因. 另外,研究发现栅内掺入Ga或Yb杂质后的Ni全硅化金属栅电容的电容值变大、栅极泄漏电流反而变小,通过对C-V和栅极泄漏电流特性进行分析,对这一现象进行了解释. 关键词： 金属栅电极 功函数 硅化物     

Room-temperature flexible thin film transistor with high mobility

We report a room-temperature and high-mobility InGaZnO thin-film transistor on flexible substrate. To gain both high gate capacitance and low leakage current, we adopt stacked dielectric of Y₂O₃/TiO₂/Y₂O₃. This flexible IGZO TFT shows a low threshold voltage of 0.45 V, a small sub-threshold swing of 0.16 V/decade and very high field-effect mobility of 40 cm²/V. Such good performance is mainly contributed by improved gate stack structure and thickness modulation of IGZO channel that reduce the interface trap density without apparent mobility degradation.     

低栅极电压控制下带有phenyltrimethoxysilane单分子自组装层的有机薄膜晶体管场效应特性研究

制作了底栅极顶接触有机薄膜晶体管器件,60 nm的pentacene被用作有源层,120 nm热生长的SiO₂作为栅极绝缘层.通过采用不同自组装修饰材料对器件的有源层与栅极绝缘层之间的界面进行修饰,如octadecyltrichlorosilane （OTS）,phenyltrimethoxysilane （PhTMS）,来比较界面修饰层对器件性能的影响.同时对带有PhTMS修饰层的OTFTs器件低栅极电压调制下的场效应行为及其载流子的传输机理进行研究.结果得到,当|V 关键词： 有机薄膜晶体管 自组装单分子层 场效应迁移率 低栅极调制电压     

MoTe2 on ferroelectric single-crystal substrate in the dual-gate field-effect transistor operation

An exfoliated MoTe₂ flake in contact with a ferroelectric single-crystal substrate was studied to examine its charge carrier modulation by neighboring ferroelectric polarization. A MoTe₂ field-effect transistor was fabricated, having a hexagonal-BN (hBN) flake and a ferroelectric substrate employed as top and bottom gate dielectrics. In the dual-gate operation, the charge conduction exhibited an ambipolar behavior with large hysteresis during the gate voltage sweep. It mainly originates from the ferroelectric nature in combination with the charge trap phenomena at the interfaces. Interestingly, we found out that holes are more easily trapped than electrons, and charge carriers in MoTe₂ are easily modulated through the top hBN gate when the electron conduction is predominantly set by the bottom ferroelectric field. However, the controllability becomes much weaker under opposing ferroelectric polarizations. This unbalanced controllability reveals the interfacial hole-trap effect resulting from ferroelectric polarization.     

AlGaN/GaN HEMT based hydrogen sensor with platinum nanonetwork gate electrode

AlGaN/GaN high electron mobility transistor (HEMT) based hydrogen sensors incorporating platinum nanonetworks in the gate region were demonstrated. Pt nanonetworks with 2–3 nm diameter were synthesized by a simple and low-cost solution phase method, and applied to the gate electrode of transistor sensor. The HEMT with physically and electrically connected Pt nanonetwork gate showed good pinch-off and modulation of drain current characteristics. Compared to conventional Pt thin film AlGaN/GaN HEMT sensor, the Pt nanonetwork sensor has dramatically improved current response to hydrogen. Relative current change of Pt nanonetwork gated sensor in 500 ppm H₂ balanced with Air ambient was 3.3 × 10⁶% at V_GS of ?3.3 V, while 2.5 × 10²% at V_GS of ?2.9 V for Pt film. This results from large increase in channel conductance induced by huge catalytic surface area of nanostructured Pt networks.     

A high voltage silicon-on-insulator lateral insulated gate bipolar transistor with a reduced cell-pitch

A high voltage( 600 V) integrable silicon-on-insulator(SOI) trench-type lateral insulated gate bipolar transistor(LIGBT) with a reduced cell-pitch is proposed.The LIGBT features multiple trenches(MTs):two oxide trenches in the drift region and a trench gate extended to the buried oxide(BOX).Firstly,the oxide trenches enhance electric field strength because of the lower permittivity of oxide than that of Si.Secondly,oxide trenches bring in multi-directional depletion,leading to a reshaped electric field distribution and an enhanced reduced-surface electric-field(RESURF) effect.Both increase the breakdown voltage(BV).Thirdly,oxide trenches fold the drift region around the oxide trenches,leading to a reduced cell-pitch.Finally,the oxide trenches enhance the conductivity modulation,resulting in a high electron/hole concentration in the drift region as well as a low forward voltage drop(Von).The oxide trenches cause a low anode-cathode capacitance,which increases the switching speed and reduces the turn-off energy loss(Eoff).The MT SOI LIGBT exhibits a BV of 603 V at a small cell-pitch of 24 μm,a Von of 1.03 V at 100 A/cm-2,a turn-off time of 250 ns and Eoff of 4.1×10?3 mJ.The trench gate extended to BOX synchronously acts as dielectric isolation between high voltage LIGBT and low voltage circuits,simplifying the fabrication processes.     

Polymer thin-film transistors with high dielectric constant gate insulators

Field-effect transistors consisting of poly(3-hexylthiophene) have been fabricated with high dielectric constant SrBi₂Ta₂O₉ films working as the gate insulator. Significantly enhanced gate effects were observed in these devices compared to similar transistors with conventional SiO₂ gate dielectric. Our devices exhibited operating voltages around 10 V, as compared to about 100 V for devices employing SiO₂ as the gate dielectric. Moreover, inverters based on such polymer transistors were demonstrated with nice input–output characteristics. PACS 82.35.Cd     

窄禁带稀磁半导体二维电子气的拍频振荡

通过对调制掺杂的n型Hg_0.82Cd_0.16Mn_0.02Te/Hg_0.3Cd_0.7Te第一类量子阱中磁性二维电子气磁阻拍频振荡的研究，发现温度、栅压的变化都会引起磁阻拍频节点位置的变化.从对拍频的分析中，可以将依赖于栅压的Rashba自旋-轨道分裂和依赖于温度的巨大塞曼分裂区分开来. 关键词： 磁性二维电子气 自旋分裂 sp-d交换相互作用 拍频     

Optical control of the mobility of a MODFET with a layer of self-assembled quantum dots

We report an experimental study of GaAs/Al_0.33Ga_0.67As modulation doped field effect (MODFET) transistors, in which an InAs layer of self-assembled quantum dots is placed in one of the Al_0.33Ga_0.67As barrier layers close to the two-dimensional electron gas (2DEG). We find the source–drain resistance is bistable with the two states controlled by illumination and applied gate bias. Brief illumination induces a large, persistent drop in the resistance, which can be recovered by applying a positive gate bias. Magneto-transport measurements show that while illumination causes only a relatively small change in the 2DEG density, it can greatly enhance its mobility. We suggest this is because the 2DEG mobility is limited by percolation of the electrons through the rough electrostatic potential induced by the charged dots. Illumination reduces the negative charge trapped in the dots, thus smoothing the conduction band potential, which produces a large increase in the mobility.     

Temperature-dependent current conduction mechanism and charge trapping in Ta2O5 RF-sputtered on GaN

A gallium nitride (GaN) based Metal-Oxide-Semiconductor (MOS) capacitor was fabricated using radio frequency (RF)-sputtered tantalum oxide (Ta₂O₅) as the high-k gate dielectric. Electrical characteristics of this capacitor were evaluated via capacitance–voltage (C–V), current–voltage (I–V), and interface trap density (D_it) measurements with emphasis on the substrate temperature dependence ranging from 25 °C to 200 °C. Charge trapping and conduction mechanism in Ta₂O₅ were investigated. The experimental results suggested that higher substrate temperature rendered higher oxide capacitance, reduced gate leakage current, and lowered mid-gap interface trap density at the expenses of high border traps and high fixed oxide charges. The gate leakage current through Ta₂O₅ was found to obey the Ohm's conduction at lower gate bias and the Poole–Frenkel conduction at higher gate bias.     

Optically induced gate voltage spectroscopy in a GaAs/AlGaAs heterostructure

We report on measurements of optically induced gate voltage spectroscopy in a GaAs/AlGaAs heterostructure with a high mobility 2-dimensional electron gas (2DEG) in a thin (55 nm) GaAs layer. The optically induced gate voltage between the front gate and the 2DEG is sensitive to excess electron concentrations below 10⁷ cm⁻². In the gate voltage spectrum we observe a peak below the bandgap energy of GaAs, which is not observed in the photocurrent, luminescence or excitation spectra. Due to the extremely high sensitivity of this technique we attribute this below bandgap signal to very weak absorption lines below the GaAs bandgap energy by impurity bands or defect absorption. The fall-off of the below bandgap signal varies as exp (hω/E₀), where E₀ is an indicative for the quality of the heterostructure.     

Electron transport in a double quantum ring: Evidence of an AND gate

We explore AND gate response in a double quantum ring where each ring is threaded by a magnetic flux ?. The double quantum ring is attached symmetrically to two semi-infinite one-dimensional metallic electrodes and two gate voltages, namely, Va and Vb, are applied, respectively, in the lower arms of the two rings which are treated as two inputs of the AND gate. The system is described in the tight-binding framework and the calculations are done using the Green's function formalism. Here we numerically compute the conductance-energy and current-voltage characteristics as functions of the ring-to-electrode coupling strengths, magnetic flux and gate voltages. Our study suggests that, for a typical value of the magnetic flux ?=?₀/2 (?₀=ch/e, the elementary flux-quantum) a high output current (1) (in the logical sense) appears only if both the two inputs to the gate are high (1), while if neither or only one input to the gate is high (1), a low output current (0) results. It clearly demonstrates the AND gate behavior and this aspect may be utilized in designing an electronic logic gate.     

High‐performance In–Zn–O thin‐film transistors with a soluble processed ZrO2 gate insulator

Spin‐coated zirconium oxide films were used as a gate dielectric for low‐voltage, high performance indium zinc oxide (IZO) thin‐film transistors (TFTs). The ZrO₂ films annealed at 400 °C showed a low gate leakage current density of 2 × 10^–8 A/cm² at an electric field of 2 MV/cm. This was attributed to the low impurity content and high crystalline quality. Therefore, the IZO TFTs with a soluble ZrO₂ gate insulator exhibited a high field effect mobility of 23.4 cm²/V s, excellent subthreshold gate swing of 70 mV/decade and a reasonable I_on/off ratio of ～10⁶. These TFTs operated at low voltages (～3.0 V) and showed high drain current drive capability, enabling oxide TFTs with a soluble processed high‐k dielectric for use in backplane electronics for low‐power mobile display applications. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

XOR gate response in a mesoscopic ring with embedded quantum dots

We address XOR gate response in a mesoscopic ring threaded by a magnetic flux . The ring, composed of identical quantum dots, is symmetrically attached to two semi-infinite one-dimensional metallic electrodes and two gate voltages, viz, V_a and V_b, are applied, respectively, in each arm of the ring which are treated as the two inputs of the XOR gate. The calculations are based on the tight-binding model and the Green’s function method, which numerically compute the conductance–energy and current–voltage characteristics as functions of the ring-electrodes coupling strengths, magnetic flux and gate voltages. Quite interestingly it is observed that, for =₀/2 (₀=ch/e, the elementary flux-quantum) a high output current (1) (in the logical sense) appears if one, and only one, of the inputs to the gate is high (1), while if both inputs are low (0) or both are high (1), a low output current (0) appears. It clearly demonstrates the XOR behavior and this aspect may be utilized in designing the electronic logic gate.     

High temperature characteristics of ZnO-based MOS-FETs with a photochemical vapor deposition SiO2 gate dielectric

The authors report the fabrication of ZnO-based metal-oxide-semiconductor field effect transistors (MOSFETs) with a high quality SiO₂ gate dielectric by photochemical vapor deposition (photo-CVD) on a sapphire substrate. Compared with ZnO-based metal-semiconductor FETs (MESFETs), it was found that the gate leakage current was decreased to more than two orders of magnitude by inserting the photo-CVD SiO₂ gate dielectric between ZnO and gate metal. Besides, it was also found that the fabricated ZnO MOSFETs can achieve normal operation of FET, even operated at 150 °C. This could be attributed to the high quality of photo-CVD SiO₂ layer. With a 2 μm gate length, the saturated I_ds and maximum transconductance (G_m) were 61.1 mA/mm and 10.2 mS/mm for ZnO-based MOSFETs measured at room temperature, while 45.7 mA/mm and 7.67 mS/mm for that measured at 150 °C, respectively.     

Impact of post-nitridation annealing on ultra-thin gate oxide performance

Decoupled-Plasma Nitridation (DPN) process with high level of nitrogen incorporation is widely used in the state-of-the-art technology, in order to reduce gate leakage current and boron penetration. However, due to the low temperature DPN process, the post-nitridation annealing treatment is required to improve the ultra-thin gate oxide integrity. In this paper, the effect of post-nitridation annealing on DPN ultra-thin gate oxide was investigated. The device performance and reliability were evaluated in three different post-nitridation annealing ambient (N₂/O₂, He, and NO).     

A study on Al2O3 passivation in GaN MOS-HEMT by pulsed stress

This paper studies systematically the drain current collapse in AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors （MOS-HEMTs） by applying pulsed stress to the device. Low-temperature layer of Al2O3 ultrathin film used as both gate dielectric and surface passivation layer was deposited by atomic layer deposition （ALD）. For HEMT, gate turn-on pulses induced large current collapse. However, for MOS-HEMT, no significant current collapse was found in the gate turn-on pulsing mode with different pulse widths, indicating the good passivation effect of ALD Al2O3. A small increase in Id in the drain pulsing mode is due to the relieving of self-heating effect. The comparison of synchronously dynamic pulsed Id - Vds characteristics of HEMT and MOS-HEMT further demonstrated the good passivation effect of ALD Al2O3.     

Ge metal oxide semiconductor field effect transistors with optimized Si cap and HfSiO2 high-k metal gate stacks

High mobility metal-oxide-semiconductor-field-effect-transistors (MOSFETs) are demonstrated on high quality epitaxial Si_0.75Ge_0.25 films selectively grown on Si (100) substrates. With a Si cap processed on Si_0.75Ge_0.25 channels, HfSiO₂ high-k gate dielectrics exhibited low C–V hysteresis (<10 mV), interface trap density (7.5 × 10¹⁰), and gate leakage current (∼10⁻²A/cm² at an EOT of 13.4 Å), which are comparable to gate stack on Si channels. The mobility enhancement afforded intrinsically by the Si_0.75Ge_0.25 channel (60%) is further increased by a Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. The Si cap process also mitigates the low potential barrier issues of Si_0.75Ge_0.25 channels, which are major causes of the high off-state current of small band gap energy Si_0.75Ge_0.25 pMOSFETs, by improving gate control over the channel.     

Investigation of 4H—SiC metal—insulation—semiconductor structure with Al2O3/SiO2 stacked dielectric

Atomic layer deposited (ALD) Al₂O₃/dry-oxidized ultrathin SiO₂ films as high-k gate dielectric grown on the 8° off-axis 4H-SiC (0001) epitaxial wafers are investigated in this paper. The metal-insulation-semiconductor (MIS) capacitors, respectively with different gate dielectric stacks (Al₂O₃/SiO₂, Al₂O₃, and SiO₂) are fabricated and compared with each other. The I-V measurements show that the Al₂O₃/SiO₂ stack has a high breakdown field ( ≥ 12 MV/cm) comparable to SiO₂, and a relatively low gate leakage current of 1× 10^-7 A/cm² at electric field of 4 MV/cm comparable to Al₂O₃. The 1-MHz high frequency C-V measurements exhibit that the Al₂O₃/SiO₂ stack has a smaller positive flat-band voltage shift and hysteresis voltage, indicating less effective charge and slow-trap density near the interface.     

The electrical characteristics of a 4H-silicon carbide metal-insulator-semiconductor structure with Al2O3 as the gate dielectric

A 4H-silicon carbide metal-insulator-semiconductor structure with ultra-thin Al₂O₃ as the gate dielectric, deposited by atomic layer deposition on the epitaxial layer of a 4H-SiC (0001) 8⁰N-/N+ substrate, has been fabricated. The experimental results indicate that the prepared ultra-thin Al₂O₃ gate dielectric exhibits good physical and electrical characteristics, including a high breakdown electrical field of 25 MV/cm, excellent interface properties (1×10¹⁴ cm^-2) and low gate-leakage current (I_G = 1 × 10^-3 A/cm^-2@E_ox = 8 MV/cm). Analysis of the current conduction mechanism on the deposited Al₂O₃ gate dielectric was also systematically performed. The confirmed conduction mechanisms consisted of Fowler-Nordheim (FN) tunneling, the Frenkel-Poole mechanism, direct tunneling and Schottky emission, and the dominant current conduction mechanism depends on the applied electrical field. When the gate leakage current mechanism is dominated by FN tunneling, the barrier height of SiC/Al₂O₃ is 1.4 eV, which can meet the requirements of silicon carbide metal-insulator-semiconductor transistor devices.