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1.
等离子体干法刻蚀是聚合物光波导制备过程中一项关键工艺.利用感应耦合等离子体各向异性刻蚀工艺制备了聚合物脊形结构波导,研究了不同工艺参量(源功率、偏置功率、刻蚀腔室压强以及气体组分)对脊形波导刻蚀速率的影响.利用扫描电子显微镜对刻蚀后波导高度、侧壁垂直度及表面粗糙度进行分析,得到了高刻蚀速率和低粗糙度的优化工艺条件.实验...  相似文献   

2.
李卫  徐岭  孙萍  赵伟明  黄信凡  徐骏  陈坤基 《物理学报》2007,56(7):4242-4246
以自组装单层胶体小球阵列为掩模,采用直接胶体晶体刻蚀技术在硅表面制备二维有序尺寸可控的纳米结构.在样品制备过程中,首先通过自组装法在硅表面制备了直径200nm的单层聚苯乙烯(PS)胶体小球的二维有序阵列;然后对样品直接进行反应离子刻蚀(RIE),以氧气为气源,利用氧等离子体对聚苯乙烯小球和对硅的选择性刻蚀作用,通过改变刻蚀时间,制备出不同尺寸的PS胶体小球的有序单层阵列;接着以此二维PS胶体单层膜为掩模,以四氟化碳为气源对样品进行刻蚀;最后去除胶体球后得到二维有序的硅柱阵列.SEM和AFM的测量结果表明:改变氧等离子体对胶体球的刻蚀时间和四氟化碳对硅的刻蚀时间,可以控制硅柱的尺寸以及形貌,而硅柱阵列的周期取决于原始胶体球的直径. 关键词: 胶体晶体刻蚀 纳米硅柱阵列  相似文献   

3.
研究了基于BCl_(3)/Cl_(2)电感耦合等离子体(ICP)刻蚀对氮化镓基分布式反馈激光器中光栅的刻蚀,详细研究了刻蚀气体BCl_(3)/Cl_(2)流量比和压强对刻蚀台面侧壁的粗糙度、陡直度以及刻蚀速率的影响,发现以SiO_(2)作为硬掩膜,刻蚀速率、台面侧壁粗糙度以及陡直度随着刻蚀气体BCl_(3)/Cl_(2)流量比以及压强变化有着显著变化。保持ICP功率和射频功率分别为300 W和100 W,当刻蚀气体BCl_(3)/Cl_(2)流量比为1、压强为1.33 Pa(10 mTorr),最终得到200.6 nm/min的可控刻蚀速率、倾角85.3°且光滑的台面侧壁,实现了在保证光栅侧壁光滑的同时提升侧壁倾角。陡直且光滑的光栅对于提升氮化镓基分布式反馈激光器的器件性能及其稳定性非常重要。  相似文献   

4.
戴隆贵  禤铭东  丁芃  贾海强  周均铭  陈弘 《物理学报》2013,62(15):156104-156104
本文介绍了一种简单高效的制备硅纳米孔阵结构的方法. 利用激光干涉光刻技术, 结合干法和湿法刻蚀工艺, 直接将光刻胶点阵刻蚀为硅纳米孔阵结构, 省去了图形反转工艺中的金属蒸镀和光刻胶剥离等必要步骤, 在2英寸的硅 (001) 衬底上制备了高度有序的二维纳米孔阵结构. 利用干法刻蚀产生的氟碳有机聚合物作为湿法刻蚀的掩膜, 以及在干法刻蚀时对样品进行轻微的过刻蚀, 使SiO2点阵图形下形成一层很薄的硅台面, 是本方法的两个关键工艺步骤. 扫描电子显微镜图片结果表明制备的孔阵图形大小均匀, 尺寸可控, 孔阵周期为450 nm, 方孔大小为200–280 nm. 关键词: 激光干涉光刻 纳米阵列 刻蚀 氟碳有机聚合物  相似文献   

5.
《发光学报》2021,42(6)
研究了基于BCl_3/Cl_2电感耦合等离子体(ICP)刻蚀对氮化镓基分布式反馈激光器中光栅的刻蚀,详细研究了刻蚀气体BCl_3/Cl_2流量比和压强对刻蚀台面侧壁的粗糙度、陡直度以及刻蚀速率的影响,发现以SiO_2作为硬掩膜,刻蚀速率、台面侧壁粗糙度以及陡直度随着刻蚀气体BCl_3/Cl_2流量比以及压强变化有着显著变化。保持ICP功率和射频功率分别为300 W和100 W,当刻蚀气体BCl_3/Cl_2流量比为1、压强为1.33 Pa(10 mTorr),最终得到200.6 nm/min的可控刻蚀速率、倾角85.3°且光滑的台面侧壁,实现了在保证光栅侧壁光滑的同时提升侧壁倾角。陡直且光滑的光栅对于提升氮化镓基分布式反馈激光器的器件性能及其稳定性非常重要。  相似文献   

6.
利用胶体小球掩蔽刻蚀技术,制备了单晶硅纳米阵列,利用原子力显微镜观察了硅阵列的表面形貌,实验结果表明,硅柱阵列具有高密度和较好的均匀性。同时研究了单晶硅纳米阵列的场电子发射特性。为了提高样品的场发射性能,在所制备的单晶硅有序纳米阵列上生长了一层非晶碳薄膜。与单晶纳米硅柱阵列相比,覆盖有非晶碳膜的样品的场电子发射特性有了明显的改善,表现在场发射的开启电场下降,同时场发射增强因子得到增加。结果表明非晶碳膜确实能够降低电子发射的表面有效势垒,从而增强了场电子发射特性。  相似文献   

7.
GaN纳米柱发光特性   总被引:2,自引:2,他引:0  
用自组装的Ni纳米岛做掩模通过ICP刻蚀得到GaN纳米柱,采用扫描电子显微镜(SEM)观测其形貌,室温下光致发光(PL)谱测量研究样品发光特性。结果表明,室温下GaN 纳米柱的发光强度是体材料的2.6倍。为了修复刻蚀损伤,用KOH对样品进行湿法处理,发现经KOH处理的纳米柱与处理前相比变得更直,且其发光较处理之前进一步增强。为了研究其原因,分别对KOH处理前后的样品进行变温PL谱的测量,发现湿法处理后发光增强是由于内量子效率的提高引起的。  相似文献   

8.
铝掺杂氧化锌(AZO)作为掺杂的半导体金属氧化物可以作为表面增强拉曼基底。由于不同的形貌可以对SERS信号产生不同的作用,于是我们采用酸法刻蚀将AZO纳米薄膜进行不同时间的刻蚀,得到了不同的岛状结构。将4-巯基吡啶(4-MPY)探针分子吸附在岛状的AZO纳米薄膜上,并与Ag纳米粒子形成三明治结构,可以观察到刻蚀之后该三明治结构的SERS信号明显增强。  相似文献   

9.
感应耦合等离子体刻蚀在聚合物光波导制作中的应用   总被引:1,自引:0,他引:1  
提出了利用感应耦合等离子体(ICP)刻蚀技术提高聚合物光波导器件性能的方法,介绍了ICP刻蚀技术的原理和优点。选取聚甲基丙烯酸甲酯-甲基丙烯酸环氧丙酯(P(MMA-GMA))作为波导材料,采用氧气作为刻蚀气体,研究了ICP参数变化对刻蚀效果的影响。介绍了倒脊形光波导的制备过程,采用改变单一工艺参数的方法,分析了刻蚀效果随时间、功率、压强、气体流量等参数的变化,对参数优化后刻蚀得到的凹槽和平板结构进行了表征。实验结果表明:在天线射频功率为300 W,偏置射频功率为30 W,气体压强为0.5 Pa,氧气流速为50 cm3/min的条件下,可获得侧壁陡直、底面平整的P(MMA-GMA)凹槽结构。  相似文献   

10.
U型槽的干法刻蚀工艺是GaN垂直沟槽型金属-氧化物-半导体场效应晶体管(MOSFET)器件关键的工艺步骤,干法刻蚀后GaN的侧壁状况直接影响GaN MOS结构中的界面态特性和器件的沟道电子输运.本文通过改变感应耦合等离子体干法刻蚀工艺中的射频功率和刻蚀掩模,研究了GaN垂直沟槽型MOSFET电学特性的工艺依赖性.研究结果表明,适当降低射频功率,在保证侧壁陡直的前提下可以改善沟道电子迁移率,从35.7 cm^2/(V·s)提高到48.1 cm^2/(V·s),并提高器件的工作电流.沟道处的界面态密度可以通过亚阈值摆幅提取,射频功率在50 W时界面态密度降低到1.90×10^12 cm^-2·eV^-1,比135 W条件下降低了一半.采用SiO2硬刻蚀掩模代替光刻胶掩模可以提高沟槽底部的刻蚀均匀性.较薄的SiO2掩模具有更小的侧壁面积,高能离子的反射作用更弱,过刻蚀现象明显改善,制备出的GaN垂直沟槽型MOSFET沟道场效应迁移率更高,界面态密度更低.  相似文献   

11.
This report presents the results of the novel fabrication of 4H-SiC pillars with nanopores using ICP-RIE dry etching. Cl2/Ar gas plasma with various mass flow rates was used in this etching process to produce SiC nanopillars without using patterned etch mask. Cylindrical pillars of 300 nm diameter and 500 nm height with smooth side walls were etched on SiC wafer. The etching condition for the optimized fabrication of SiC nanopillars is presented in this report. Each nanopillar has been produced with a nanosize pore at the center along its length and up to the middle of the cylindrical nanopillar; it is a unique feature has not ever been reported in case of SiC. Inclusion of oxygen was found influence the formation of nanopillars by the effect of SiO2 micro masking. The formation of self assembled SiO2 layer and its micro masking effect in the fabrication of this unique nanostructure has been investigated using TEM, STEM and EDAX measurements.  相似文献   

12.
We fabricate silicon nanopillar arrays with pillar diameters smaller than 200 nm by using the conventional reactive ion etching (RIE) technique and nickel masks. We use the ratio between the lateral and vertical etching rates as an estimate of the etching anisotropy. The dependence of this ratio on the rf power, the chamber pressure, and the gas mixture is investigated systematically to achieve the largest etching anisotropy. Using the optimized etching parameters in the RIE process, we demonstrate silicon pillars with smooth surface, vertical sidewalls, and aspect ratios higher than 20. In addition, we employ dilute aqua regia to treat the pillars and shrink the diameters to 70 nm. The pillar height remains ∼2500 nm after the treatment. PACS 52.77.Bn; 81.65.Cf; 85.40.Hp  相似文献   

13.
Y.L. Li  C.Z. Gu 《Applied Surface Science》2008,254(15):4840-4844
Highly (0 0 2)-oriented AlN film was deposited on n-type (1 0 0)-oriented silicon substrates by the radio frequency magnetron sputtering method. An individual AlN cone with high aspect ratio was fabricated by the focused ion-beam (FIB) etching process in the surface of an as-formed AlN film. This etching method can easily control the tip radius and height to obtain AlN cones with different aspect ratios. The field-emission property of the individual AlN cone was measured in a scanning electron microscopy system equipped with a movable probe as the anode above the AlN tip. The results indicated that the as-formed single AlN cone with high aspect ratio possessed good field-emission ability although it only had a tiny emission area. Compared with a single Si tip fabricated by the same method, a single AlN cone exhibits better field-emission ability, and hence, has great potential as a promising candidate of point electron source for application in vacuum electronic devices.  相似文献   

14.
We develop a novel method to fabricate multiform structures of Si nanopillars (diameters > 40 nm, aspect ratio > 10, coverage ratio > 35%) by dry etch with self-assembled cesium chloride (CsCl) nanoislands as mask. The pillars can cover structures of lateral size 1 μm and unpolished Si wafer, enabling uneven surface to be textured by nanopillars without complex process or expensive polishing. Planar micro-patterns and tridimensional localization of nanopillars have been easily realized, useful for integrating nanopillars to devices. By figuring out substrate influences, fast formation of CsCl islands within 1 min has been achieved for the first time, making CsCl process flow to be possibly controlled within 30 min. Based on the deliquescence of salt, CsCl self-assembly is simple, widely tunable and compatible, which endows the approaches great practical potential.  相似文献   

15.
We experimentally investigate the antireflective properties of various silicon (Si) subwavelength grating (SWG) structures using closely-packed silica nanospheres monolayers with different sizes as etch masks and a subsequent inductively coupled plasma (ICP) etching, together with theoretical calculations based on a rigorous coupled wave analysis method. The geometric structure of Si SWGs is optimized by changing the size of nanospheres and ICP etching parameters. The antireflective properties depend strongly on the period, height, and shape of the hexagonally ordered SWG structures, especially correlated with ICP etching parameters. For an optimized Si SWG structure with a rounded cone shape, the reflectance is significantly reduced, indicating a low reflectance of <4.4% over a wide wavelength region of 300–1100 nm. From theoretical analysis, the reflectance of rounded cone-shaped Si SWG structures is minimized with a period of ∼300–350 nm and heights of >750 nm, which is reasonably consistent with the experimental results. The angle-dependent antireflection characteristics are also discussed.  相似文献   

16.
The Au nanoparticle monolayer is formed by self-assembly technology on the Si substrates terminated with different functional groups. Silicon nanotips were fabricated by a self-assembled gold colloidal particle monolayer as an etch mask. The silicon nanotips with high density and uniformity in height and shape were obtained using reactive ion etching (RIE). The Si nanotips on the surface of the 3-aminopropyltrimethoxysilane (APTMS)-treated Si substrate are less-ordered array and uniformity than 3-mercaptopropyltrimethoxysilane (MPTMS)-treated Si substrate at the same etching conditions. The ordered array and uniformity of Si nanotips on the APTMS-modified Si substrate was improved through heat-treatment. This result is implied the different functional groups on the Si surfaces could affect the formation of the Si nanostructures during RIE process. The uniformly nanotip pattern with height of >20 nm is obtained on the etched nanoparticle-coated Si substrate. This method can be applied to patterning a wide variety of thin film materials into tip arrays.  相似文献   

17.
InGaN/GaN-multiple-quantum-well-based light emitting diode (LED) nanopillar arrays with a diameter of approximately 200nm and a height of 700nm are fabricated by inductively coupled plasma etching using Ni self-assembled nanodots as etching mask. In comparison to the as-grown LED sample an enhancement by a factor of four of photoluminescence (PL) intensity is achieved after the fabrication of nanopillars, and a blue shift and a decrease of full width at half maximum of the PL peak are observed. The method of additional wet etching with different chemical solutions is used to remove the etch-induced damage. The result shows that the dilute HCl (HCl:H2O=1:1) treatment is the most effective. The PL intensity of nanopillar LEDs after such a treatment is about 3.5 times stronger than that before treatment.  相似文献   

18.
Dry etching using a novel large-area electron beam has been obtained on polysilicon over SiO2/Si samples in the pressure range 0.1–0.4 Torr. The dependence of etching rate upon electron-beam power density, total pressure of the CF4/He mixture, and the ratio of CF4/He pressure has been determined. An etching rate of 150 nm/min without any addition of O2 has been achieved with a low-energy density electron beam for poly-Si dry etching.  相似文献   

19.
In this paper, a systematic study has been performed for the etching of negative photoresist SU-8 2005 using inductively coupled plasma. The etching rate, vertical profile, surface and sidewall roughness of the waveguide were investigated as a function of the chamber pressure, the bias power, the antenna power, the ratio of flow rate of Ar to O2, and the etching time. The etching parameters were studied in detail and optimized to minimize the surface roughness in etched areas. Ridge MZI waveguides with SU-8 2005 were fabricated under the optimized etching conditions, resulting in smooth and almost vertical patterns. The waveguides showed single-mode propagation at 1550 nm wavelength and low propagation loss of less than 1.565 dB/cm, which was similar to the waveguides fabricated by the wet-etching technique.  相似文献   

20.
Previously, plasma‐enhanced dry etching has been used to generate three‐dimensional GaAs semiconductor structures, however, dry etching induces surface damages that degrade optical properties. Here, we demonstrate the fabrication method forming various types of GaAs microstructures through the combination etching process using the wet‐chemical solution. In this method, a gold (Au)‐pattern is employed as an etching mask to facilitate not only the typical wet etching but also the metal‐assisted chemical etching (MacEtch). High‐aspect‐ratio, tapered GaAs micropillars are produced by using [HF]:[H2O2]:[EtOH] as an etching solution, and their taper angle can be tuned by changing the molar ratio of the etching solution. In addition, GaAs microholes are formed when UV light is illuminated during the etching process. Since the wet etching process is free of the surface damage compared to the dry etching process, the GaAs microstructures demonstrated to be well formed here are promising for the applications of III–V optoelectronic devices such as solar cells, laser diodes, and photonic crystal devices. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)  相似文献   

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