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Because of the discrete charge storage mechanism, charge trapping memory(CTM) technique is a good candidate for aerospace and military missions. The total ionization dose(TID) effects on CTM cells with Al_2O_3/HfO_2/Al_2O_3(AHA) high-k gate stack structure under in-situ 10 keV x-rays are studied. The C-V characteristics at different radiation doses demonstrate that charge stored in the device continues to be leaked away during the irradiation,thereby inducing the shift of flat band voltage(V_(fb)). The dc memory window shows insignificant changes, suggesting the existence of good P/E ability. Furthermore, the physical mechanisms of TID induced radiation damages in AHA-based CTM are analyzed.  相似文献   
2.
A gate-last process for fabricating HfSiON/TaN n-channel metal-oxide-semiconductor-field-effect transistors(NMOSFETs)is presented.In the process,a HfSiON gate dielectric with an equivalent oxide thickness of 10 A was prepared by a simple physical vapor deposition method.Poly-Si was deposited on the HfSiON gate dielectric as a dummy gate.After the source/drain formation,the poly-Si dummy gate was removed by tetramethylammonium hydroxide(TMAH)wet-etching and replaced by a TaN metal gate.Because the metal gate was formed after the ion-implant doping activation process,the effects of the high temperature process on the metal gate were avoided.The fabricated device exhibits good electrical characteristics,including good driving ability and excellent sub-threshold characteristics.The device’s gate length is 73 nm,the driving current is 117μA/μm under power supply voltages of VGS=VDS=1.5 V and the off-state current is only 4.4 nA/μm.The lower effective work function of TaN on HfSiON gives the device a suitable threshold voltage(~0.24 V)for high performance NMOSFETs.The device’s excellent performance indicates that this novel gate-last process is practical for fabricating high performance MOSFETs.  相似文献   
3.
This paper presents a method using simple physical vapour deposition to form high-quality hafnium silicon oxynitride (HfSiON) on ultrathin SiO2 buffer layer. The gate dielectric with 10? (1?= 0.1 nm) equivalent oxide thickness is obtained. The experimental results indicate that the prepared HfSiON gate dielectric exhibits good physical and electrical characteristics, including very good thermal stability up to 1000℃, excellent interface properties, high dielectric constant (k=14) and low gate-leakage current (Ig=1.9×10-3A/cm2 @Vg=Vfb-1V for EOT of 10?). TaN metal gate electrode is integrated with the HfSiON gate dielectric.The effective work function of TaN on HfSiON is 4.3eV, meeting the requirements of NMOS for the metal gate. And, the impacts of sputtering ambient and annealing temperature on the electrical properties of HfSiON gate dielectric are investigated.  相似文献   
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