8-3线优先编码器74LS148的级联分析及研究

74LS148是一种带扩展功能的8-3线优先编码器,将多片74LS148集成8-3线优先编码器级联构成不同的编码器,能够灵活、有效地扩大编码器的使用范围。不同的74LS148进行级联时,任何时候只对其中优先级别最高的输入信号进行编码,编码器的工作状态由使能输入端决定。     

民族地区高师院校计数器基础实验教学研究

根据民族地区地方高师院校的办学状况,提出了在计数器实验教学中"加强实验基础理论——理论与实践相结合,做好计数器基础实验"的教学模式,并对74LS192和74LS161进行的六进制计数器从设计方法和电路的异同进行了深入的分析研究。     

基于电力电子低温应用的超导电力集成研究

本文探讨了基于电力电子低温应用的超导电力集成的基本概念，分析了集成设计的基本原理．提出了超导集成低温功率系统应用的三种基础单元：超导集成低温DC／DC单元、超导集成低温AC／DC单元以及超导集成低温整流桥单元．它们将电力电子低温应用与超导电力应用有机的集成了起来，实现了无引线磁体功率系统、电压补偿型超导限流器以及无需偏压源的超导限流器等新的超导电力应用．最后讨论了实现超导集成低温功率系统的关键技术．     

两种间接测量TTL与非门参量的方法

对两种非对称式TTL与非门多谐振范器进行了分析，提出了两种间接测量TTL与非门参量的方法。并对它们的可尾性进行了实验验证。     

LED微集成矩阵组件研制

采用发光二极管混合集成技术、研制成功了用于信息记录和显示的６×２１ＬＥＤ微集成２矩阵组件，本语文介绍了组件的设计结构、制备方法和主要技术参数。     

基于成熟度评估的武器装备体系集成性能试验方法研究

单装试验到体系试验需要架设集成试验这座桥梁,论文借鉴技术集成成熟度评估方法提出了集成成熟度试验的思路,并建立了基于集成成熟度试验评估的装备体系集成性能试验方法,实现了体系集成性能的试验与评价,并通过示例对所提出的方法进行了演示验证,证明了方法的可行性。     

硅基光子集成研究进展

报道了国际上关于硅基光子集成的最新研究进展和本课题组在该领域的研究成果,包括对一些光收发模块、III-V族/硅基激光器等集成器件的结构改进和工艺的探索,展示了兼容互补金属氧化物半导体工艺的硅基光子集成在信息技术领域中的巨大前景.可以预见,硅基光子集成已成为硅光子学的主要研究内容,硅光子学及硅基光子集成的发展目标是趋向更高速率、更低功耗及更大集成密度.     

混合型集成光学加速度计集成光学芯片

本文描述了应用于地震勘探的混合型集成光学加速度计集成光学芯片的工作原理及结构特点。完成了各单元波导器件的设计计算，实现了7个波导器件的单片集成，并与输入、输出光纤等器件的混合集成。具有体积小，稳定可靠的独特优点。     

光外差电信号接收机

光外差电信号接收机李晴棉李也凡何大伟许承杰（中国科学院激发态物理开放研究实验室，长春１３００２１）（中国科学院长春物理研究所，长春１３００２１）关键词光外差，电信号，接收我们利用光学外差的原理和声光集成的技术手段，成功地研制出我国第一台集成光学外差电...     

氢(氘、氚)的非对称同位素替代分子与低能氦原子(E=0 .1 eV) 碰撞分波截面研究和计算

当入射氦原子能量E=0.1 eV时,用密耦方程(Close Coupling Equat ion)研究和计算了氢的非对称同位素替代分子HD、TD、DT-He碰撞.首先考虑了非对称同位素替代时质心偏移量对势能函数的影响,得到在新质心坐标系中势能函数表达式,并计算了 E=0.1 eV时弹性碰撞00-00分波及非弹性碰撞激发00-01、00-02、00-03、00-04分波截面.     

电磁脉冲对CMOS与非门的干扰和损伤效应与机理

利用Sentaurus-TCAD建立了CMOS与非门电路的二维电热模型,仿真研究了在电磁脉冲注入下,CMOS与非门电路产生的扰乱和损伤效应及其机理。结果表明,在EMP注入下,电路输出电压、内部的峰值温度呈周期性的“下降-上升”,当注入功率较大时,EMP撤销后输出电压停留在异常值,PMOS源极电流增加,温度不断上升,最终烧毁在PMOS源极,这是因为器件内部产生了闩锁效应。随着脉宽的增加, 损伤功率阈值减小而损伤能量阈值增大,通过数据拟合得到脉宽与损伤功率阈值和损伤能量阈值的关系。该结果可对EMP损伤效应进行评估并对器件级EMP抗毁伤加固设计具有指导作用。     

Silicon photonic crystal all-optical logic gates

All-optical logic gates, including OR, XOR, NOT, XNOR, and NAND gates, are realized theoretically in a two-dimensional silicon photonic crystal using the light beam interference effect. The ingenious photonic crystal waveguide component design, the precisely controlled optical path difference, and the elaborate device configuration ensure the simultaneous realization of five types of logic gate with low-power and a contrast ratio between the logic states of “1” and “0” as high as 20 dB. High power is not necessary for operation of these logic gate devices. This offers a simple and effective approach for the realization of integrated all-optical logic devices.     

Investigation of gate oxide traps effect on NAND flash memory by TCAD simulation

The effects of gate oxide traps on gate leakage current and device performance of metal–oxide–nitride–oxide–silicon(MONOS)-structured NAND flash memory are investigated through Sentaurus TCAD. The trap-assisted tunneling(TAT)model is implemented to simulate the leakage current of MONOS-structured memory cell. In this study, trap position, trap density, and trap energy are systematically analyzed for ascertaining their influences on gate leakage current, program/erase speed, and data retention properties. The results show that the traps in blocking layer significantly enhance the gate leakage current and also facilitates the cell program/erase. Trap density ~10¹⁸ cm^-3 and trap energy ~ 1 eV in blocking layer can considerably improve cell program/erase speed without deteriorating data retention. The result conduces to understanding the role of gate oxide traps in cell degradation of MONOS-structured NAND flash memory.     

NOR and NAND gates using two photon absorption in silicon wire waveguide

Ultrafast all-optical NOR gate based on two photon absorption (2PA) process in SOI waveguide is already established. We have designed NAND gate also based on this process with a novel waveguide coupler structure. Power attenuation due to 2PA process and the working of these gates is developed with FDTD simulation. Dominant 2PA process is incorporated in FDTD update equations and it is shown that the influence of high intensity pump pulses on a different frequency continuous probe beam can be utilized to form NOR as well as NAND gates.     

On the feasibility of ultrafast all-optical NAND gate using single quantum-dot semiconductor optical amplifier-based Mach–Zehnder interferometer

The feasibility of implementing an all-optical NAND gate for 160 Gb/s return-to-zero data pulses using a single quantum-dot semiconductor optical amplifier (QD-SOA)-based Mach–Zehnder interferometer is theoretically investigated and demonstrated. The proposed scheme exploits a modified Fredkin gate simultaneously driven by the pair of data streams between which the Boolean NAND function is to be executed, a sequence of continuous pulses and the complement of the first data input. The impact of the peak data power as well as of the QD-SOAs current density, small signal gain and electron relaxation time from the excited state to the ground state on the amplitude modulation of the switching outcome is explored and assessed by means of numerical simulation. The interpretation of the obtained results allows to specify the conditions under which the QD-SOAs must be biased to operate so that the defined performance metric becomes acceptable. By following the extracted guidelines whose satisfaction is technologically feasible and making a suitable choice for the critical parameters the NAND gate can be realized both with logical correctness and high quality at the target ultrafast data rate while being cascadable and scaleable for constructing more complex all-optical circuits.     

All optical logic NAND gate based on two-photon absorption in semiconductor optical amplifiers

We propose a new scheme to realize all optical logic NAND operating at high speeds up to 250 Gb/s utilizing the ultrafast phase response during two-photon absorption (TPA) process in semiconductor optical amplifiers (SOA). NAND gate is important because other Boolean logic elements and circuits can be realized using NAND gates as basic building blocks. Rate equations for semiconductor optical amplifiers (for input data signals with high intensity) configured in the form of a Mach-Zehnder interferometer have been solved. The input intensities are high enough so that the two-photon induced phase change is larger than the regular gain induced phase change. The performance of this scheme is analyzed by calculating the quality factor of the resulting data streams. The results show that both AND and NAND operations at 250 Gb/s with good signal to noise ratio are feasible.     

All-optical Serial Data Transfer between Registers using optical non-linear materials

The inherent parallelism of optical signal is an advantageous feature for high-speed computations and other digital logic operations. Different techniques have been proposed for performing arithmetic, algebraic and logic operations using light as the information-carrier. Here we propose a new method for Serial Data Transfer between Registers using optical non-linear material. This system is all-optical in nature. Optical NAND gate and NOT gate are the basic building blocks of this system.     

Bio-inspired computation using synthetic genetic network

Potential of synthetic genetic network, Repressilator, to work as logical computing unit is observed. It is shown that two variables of gene network yield simultaneously, the basic AND or OR gate with their complementary NAND or NOR gate, with the variation of the internal parameter of the system. This allows the gene network to work as a strong candidate for parallel computing. Stability or robustness of gates is also checked in noisy background.     

Simulation of two photon absorption in silicon wire waveguide for implementation of all optical logic gates

All optical switching action of silicon wire waveguide for the design of the proposed logic gates is simulated. This is one possible building block of the future all optical computer or photonic devices. All optical logic gates NOT, NAND and AND gates using two photon absorption in silicon wire waveguide are presented. Use of ultra short pulse has negligible free carrier absorption effect; hence the operating speed of the gates is very high and has potential application in photonic processing. NAND gate is universal one and thus one can perform any logical operation using this. The device (Si wire WG) requires low energy pulse and is ultrafast one.