模拟分析少子复合速率及吸收层对HIT太阳电池性能的影响

采用AMPS-1D程序模拟分析了前后接触少子复合速率以及吸收层的厚度和少子迁移率对非晶硅/单晶硅异质结太阳电池光伏性能的影响.模拟发现,与太阳电池的前接触少子复合速率相比,背接触少子复合速率对太阳电池光伏性能的影响更为显著.吸收层单晶硅的厚度对太阳电池光伏性能的影响要受到单晶硅隙间缺陷态密度以及背接触少子复合速率的制约.当背接触复合占主要地位时,吸收层越厚电池的转换效率越高;当吸收层隙间缺陷复合占主要地位时,电池的转换效率在某一厚度处达到峰值.吸收层的少子迁移率对太阳电池性能的影响,也要受到背接触少子复合速率的制约.当背接触复合速率较低时,少子迁移率越大,电池的转换效率越高;当背接触复合速率较高时,少子迁移率越小,电池的转换效率越高.     

模拟分析少子复合速率及吸收层对HIT太阳电池性能的影响

采用AMPS-1D程序模拟分析了前后接触少子复合速率以及吸收层的厚度和少子迁移率对非晶硅/单晶硅异质结太阳电池光伏性能的影响.模拟发现,与太阳电池的前接触少子复合速率相比,背接触少子复合速率对太阳电池光伏性能的影响更为显著.吸收层单晶硅的厚度对太阳电池光伏性能的影响要受到单晶硅隙间缺陷态密度以及背接触少子复合速率的制约.当背接触复合占主要地位时,吸收层越厚电池的转换效率越高;当吸收层隙间缺陷复合占主要地位时,电池的转换效率在某一厚度处达到峰值.吸收层的少子迁移率对太阳电池性能的影响,也要受到背接触少子复合速率的制约.当背接触复合速率较低时,少子迁移率越大,电池的转换效率越高;当背接触复合速率较高时,少子迁移率越小,电池的转换效率越高.     

n-ZnO:Al/i-ZnO/n-CdS/p-Cu2ZnSnS4太阳能电池光伏特性的分析

具有高光吸收系数的半导体Cu₂ZnSnS₄ (CZTS)薄膜是一种新型太阳能电池材料. 本文对n-ZnO:Al/i-ZnO/n-CdS/p-CZTS结构的CZTS薄膜太阳能电池进行分析, 讨论CZTS薄膜的掺杂浓度、厚度、缺陷态和CdS薄膜的掺杂浓度、 厚度对太阳能电池转换效率的影响以及太阳能电池的温度特性. 分析表明, CZTS薄膜作为太阳能电池的主要光吸收层, CZTS薄膜的掺杂浓度和厚度的取值对太阳能电池的转换效率有显著影响, CZTS薄膜结构缺陷态的存在会导致太阳能电池性能的下降. CdS缓冲层的掺杂浓度、厚度对太阳能电池光伏特性的影响较小. 经结构参数优化得到的n-ZnO:Al/i-ZnO/n-CdS/p-CZTS薄膜太阳能电池的最佳光 伏特性为开路电压1.127 V、短路电流密度27.39 mA/cm²、填充因子87.5%、 转换效率27.02%,转换效率温度系数为-0.14%/K.     

碲化镉薄膜太阳电池中的关键科学问题研究

文章对CdTe薄膜太阳电池中的4个关键科学问题进行了讨论,并对电池器件的性能进行了研究,其中包括高质量硫化镉薄膜、背接触层、CdS/CdTe界面和CdCl2热处理性能的研究.文章作者研究了背电极接触层中Cu掺杂含量对电池性能的影响,通过改变背接触层中Cu的含量,可以改变Cu与Te反应产生的物相成分,从而发现以Cu1.4Te为主导的背接触缓冲层能有效地减少电池I—V曲线中的“翻转”(roll-over)现象,同时能有效地降低背接触势垒.此外,还研究了CdS/CdTe界面的CdCl2热处理反应,发现当热处理温度高于350℃时,CdS与CdTe之间的互扩散开始发生,此温度对应于CdS由立方相转变为六方相;而在550℃热处理后,S和Te互扩散形成的CdSxTe1-x化合物,其x值高达11％.通过优化电池制备工艺,获得了在AMl.5标准光源下高达14.6％的CdTe电池转换效率.     

硒化锑薄膜太阳电池的模拟与结构优化研究

采用wx-AMPS模拟软件对硒化锑(Sb_2Se_3)薄膜太阳电池进行建模仿真,将CdS, ZnO和Sn02的模型应用到Sb_2Se_3太阳电池的电子传输层中.结果显示,应用CdS和ZnO都能实现较高的器件性能,并发现电子传输层电子亲和势(Xe-ETL)的变化能够调节Sb_2Se_3太阳电池内部的电场分布,是影响器件性能的关键参数之一.过高或者过低的Xe-ETL都会使电池的填充因子降低,导致电池性能劣化.当Xe-ETL为4.2eV时,厚度为0.6μm的Sb_2Se_3太阳电池取得了最优的7.87%的转换效率.应用优化好的器件模型,在不考虑Sb_2Se_3层缺陷态的理想情况下,厚度为3μm的Sb_2Se_3太阳电池的转换效率可以达到16.55%(短路电流密度J_(SC)=34.88 mA/cm~2、开路电压V_(OC)=0.59 V、填充因子FF=80.40%).以上模拟结果表明,Sb_2Se_3薄膜太阳电池在简单的器件结构下就能够获得优异的光电性能,具有较高的应用潜力.     

纳米硅(nc-Si:H )/晶体硅(c-Si)异质结太阳电池的数值模拟分析

运用美国宾州大学发展的AMPS程序模拟分析了n-型纳米硅（n+-nc-Si:H）/p-型晶体硅(p-c-Si)异质结太阳电池的光伏特性.分析表明，界面缺陷态是决定电池性能的关键因素，显著影响电池的开路电压（VOC）和填充因子（FF），而电池的光谱响应或短路电流密度（JSC）对缓冲层的厚度较为敏感.对不同能带补偿（bandgap offset）的情况所进行的模拟分析表明，随着ΔEc的增大，由于界面态所带来的开路电压和填充因子的减小逐渐被消除，当ΔEc达到05eV左右时界面态的影响几乎完全被掩盖.界面层的其他能带结构特征对器件性能的影响还有待进一步研究.最后计算得到了这种电池理想情况下（无界面态、有背面场、正背面反射率分别为0和1）的理论极限效率ηmax=3117% (AM15，100mW/cm2，040—110μm波段).     

具有高阻抗本征SnO2过渡层的CdS/CdTe多晶薄膜太阳电池

采用超声喷雾热解法制备了具有高阻抗的本征SnO₂透明导电膜，将其运用在CdS层减薄了的CdS/CdTe多晶薄膜太阳电池中，对减薄后的CdS薄膜进行了XRD,AFM图谱分析，并对电池进行了光、暗I-V，光谱响应和C-V测试.结果表明，在高阻膜上沉积的减薄CdS薄膜(111)取向更明显，但易形成微孔.引入高阻层后，能消除CdS微孔形成的微小漏电通道，有效保护p-n结，改善了电池的并联电阻、填充因子和短波响应，使载流子浓度增加，暗饱和电流密度减小，从而电池性能得到改善，电池转换效率增加了14.4%. 关键词： CdTe电池 过渡层 效率     

具有高阻抗本征SnO2过渡层的CdS/CdTe多晶薄膜太阳电池

采用超声喷雾热解法制备了具有高阻抗的本征SnO2透明导电膜,将其运用在CdS层减薄了的CdS/CdTe多晶薄膜太阳电池中,对减薄后的CdS薄膜进行了XRD,AFM图谱分析,并对电池进行了光、暗I-V,光谱响应和C-V测试.结果表明,在高阻膜上沉积的减薄CdS薄膜(111)取向更明显,但易形成微孔.引入高阻层后,能消除CdS微孔形成的微小漏电通道,有效保护p-n结,改善了电池的并联电阻、填充因子和短波响应,使载流子浓度增加,暗饱和电流密度减小,从而电池性能得到改善,电池转换效率增加了14.4%.     

非晶硅界面缓冲层对非晶硅锗电池性能的影响

针对非晶硅锗电池本征层高锗含量时界面带隙失配以及高界面缺陷密度造成电池开路电压和填充因子下降的问题,通过在PI界面插入具有合适带隙的非晶硅缓冲层,不仅有效缓和了带隙失配,降低界面复合,同时也通过降低界面缺陷密度改善内建电场分布,从而提高了电池的收集效率. 进一步引入IN界面缓冲层以及对非晶硅锗本征层进行能带梯度设计,在仅采用Al背电极时,单结非晶硅锗电池转换效率达8.72%. 关键词： 非晶硅缓冲层 非晶硅锗薄膜太阳电池 带隙 界面     

纳米TiO2颗粒/亚微米球多层结构薄膜内电荷传输性能研究

本文主要利用TiO₂亚微米球较强的光散射特性设计了纳米TiO₂颗粒/亚微米球多层结构光阳极, 并借助强度调制光电流谱(intensity-modulated photocurrent spectroscopy)、电化学阻抗谱(electrochemical impedance spectroscopy)和入射单色光光电转化效率(incident photon-to-current conversion efficiency), 研究亚微米球的引入对多层结构薄膜内缺陷态、电子传输时间、电子收集效率和界面电荷转移性能的影响. 强度调制光电流谱反映出亚微米球表面缺陷态少, 但其颗粒间接触不紧密, 导致在接触部位形成了势垒, 阻碍了电子的传输, 导致电子传输时间增长. 电化学阻抗谱结果表明不同多层结构电池界面复合无明显差别, 同时底层采用纳米TiO₂ 透明薄膜结构的电池, 其光利用率要明显高于底层采用亚微米球薄膜结构的电池, TiO₂费米能级电子填充水平也相对增大, 使得电池的光电转换效率得到提升. 多层结构复合薄膜电荷传输和光伏特性的研究, 为高效染料敏化太阳电池光阳极设计提供了实验基础.     

Graphene/Ag2ZnSnSe4诱导p-n结薄膜太阳电池数值模拟

银锌锡硒(Ag2ZnSnSe4)是一种禁带宽度为1.4 eV的n型半导体材料.本文提出一种由n型Ag2ZnSnSe4与石墨烯(Graphene)组成的Graphene/Ag2ZnSnSe4诱导p-n结薄膜太阳电池,并借助wxAMPS软件对电池的物理机理和性能影响因素进行模拟研究.模拟结果表明,高功函数的石墨烯与n型Ag2ZnSnSe4半导体接触时,Ag2ZnSnSe4吸收层的前端能带向上弯曲,在n型Ag2ZnSnSe4吸收层表面诱导形成p型Ag2ZnSnSe4反型层,p型Ag2ZnSnSe4和n型Ag2ZnSnSe4组成p-n同质结.模拟发现石墨烯和背接触的功函数会影响载流子的分离、输运和收集,严重影响器件性能,石墨烯功函数达到5.5 eV,背接触功函数不高于4.4 eV,都有利于提高器件性能.Ag2ZnSnSe4吸收层的掺杂浓度主要影响器件的短路电流,而Ag2ZnSnSe4吸收层的体内缺陷对器件整体性能产生影响.在石墨烯和背接触功函数分别为5.5和3.8 eV,Ag2ZnSnSe4吸收层的掺杂浓度和缺陷密度分别为1016和1014 cm–3时,Graphene/Ag2ZnSnSe4诱导p-n结薄膜太阳电池能够取得高达23.42%的效率.这些模拟结果为设计新型高效低成本太阳电池提供了思路和物理阐释.     

Passivation of defect states in Si-based and GaAs structures

Formation of defect states on semiconductor surfaces, at its interfaces with thin films and in semiconductor volumes is usually predetermined by such parameters as semiconductor growth process, surface treatment procedures, passivation, thin film growth kinetics, etc. This paper presents relation between processes leading to formation of defect states and their passivation in Si and GaAs related semiconductors and structures. Special focus is on oxidation kinetics of yttrium stabilized zirconium/SiO₂/Si and Sm/GaAs structures. Plasma anodic oxidation of yttrium stabilized zirconium based structures reduced size of polycrystalline silicon blocks localised at thin film/Si interface. Samarium deposited before oxidation on GaAs surface led to elimination of EL2 and/or ELO defects in MOS structures. Consequently, results of successful passivation of deep traps of interface region by CN⁻ atomic group using HCN solutions on oxynitride/Si and double oxide layer/Si structures are presented and discussed. By our knowledge, we are presenting for the first time the utilization of X-ray reflectivity method for determination of both density of SiO₂ based multilayer structure and corresponding roughnesses (interfaces and surfaces), respectively.     

Effect of CdS deposition temperature for thermally grown Cu(In,Ga)Se2 and two-step chalcogenized Cu(In,Ga)(S,Se)2 absorbers on solar cell performances

CdS buffer layer of varying thickness ranging from 23 to 58 nm deposited at different substrate temperature were prepared as n-type junction partner for thermally grown Cu(In,Ga)Se₂ and two-step chalcogenized Cu(In,Ga)(S,Se)₂ photovoltaic absorber films and the effect of deposition temperature and time on the CdS growth behavior and solar cell performance were evaluated. High deposition temperature resulted in a thicker CdS layer and more importantly lower density and shallower depth of open voids, which attributed to the improved open-circuit voltage and fill factor due to reduced interface recombination. The solar cell efficiency of thermally grown absorber saturated at about 30 nm thickness of CdS, while that of chalcogenized absorber gradually increased with CdS thickness up to 60 nm without significant loss of short-circuit current density.     

Improvement in IBC-silicon solar cell performance by insertion of highly doped crystalline layer at heterojunction interfaces

By inserting a thin highly doped crystalline silicon layer between the base region and amorphous silicon layer in an interdigitated back-contact(IBC) silicon solar cell, a new passivation layer is investigated. The passivation layer performance is characterized by numerical simulations. Moreover, the dependence of the output parameters of the solar cell on the additional layer parameters(doping concentration and thickness) is studied. By optimizing the additional passivation layer in terms of doping concentration and thickness, the power conversion efficiency could be improved by a factor of2.5%, open circuit voltage is increased by 30 mV and the fill factor of the solar cell by 7.4%. The performance enhancement is achieved due to the decrease of recombination rate, a decrease in solar cell resistivity and improvement of field effect passivation at heterojunction interface. The above-mentioned results are compared with reported results of the same conventional interdigitated back-contact silicon solar cell structure. Furthermore, the effect of a-Si:H/c-Si interface defect density on IBC silicon solar cell parameters with a new passivation layer is studied. The additional passivation layer also reduces the sensitivity of output parameter of solar cell to interface defect density.     

Surface passivation technology for III-V semiconductor nanoelectronics

The present status and key issues of surface passivation technology for III-V surfaces are discussed in view of applications to emerging novel III-V nanoelectronics. First, necessities of passivation and currently available surface passivation technologies for GaAs, InGaAs and AlGaAs are reviewed. Then, the principle of the Si interface control layer (ICL)-based passivation scheme by the authors’ group is introduced and its basic characterization is presented. Ths Si ICL is a molecular beam epitaxy (MBE)-grown ultrathin Si layer inserted between III-V semiconductor and passivation dielectric. Finally, applications of the Si ICL method to passivation of GaAs nanowires and GaAs nanowire transistors and to realization of pinning-free high-k dielectric/GaAs MOS gate stacks are presented.     

引入n型InGaN/GaN超晶格层提高量子阱特性研究

利用金属有机物化学气相淀积技术在蓝宝石衬底上生长了InGaN/GaN量子阱结构. 研究了引入n型InGaN薄层或InGaN/GaN超晶格层的量子阱特性,结果表明通过引入n型InGaN薄层或InGaN/GaN超晶格层缓解了量子阱有源区中的应力,改善了多量子阱表面形貌,减少了V型缺陷密度,而且提高了多量子阱的光致发光强度,从而也改进了LED的发光效率. 关键词： InGaN/GaN多量子阱 原子力显微镜 X射线双晶衍射 光致发光     

Preparation and characterization of ZnS/CdS bi-layer for CdTe solar cell application

In this work, bilayer ZnS/CdS film was prepared as an improved window layer of CdTe solar cell. TEM was used to observe the cross section of the bilayer structure. The total thickness of ZnS/CdS film was about 60 nm, which could allow more photons to pass through it and contribute to the photocurrent. Optical properties of the bilayers were investigated using UV–vis spectroscopy. Compared with poor transmission of standard CdS film in the short wavelength range of 350–550 nm, the transmission of ZnS/CdS was improved and reached above 50%. The ZnS/CdS was annealed with CdCl₂. X-ray photoelectron spectroscopy (XPS) was used to investigate its chemical properties. A possible diffusion between CdS and ZnS was observed after annealing. The efficiency of standard CdS/CdTe solar cell was 9.53%. The device based on ZnS/CdS window layer had a poor 6% efficiency. With annealing treatment on ZnS/CdS layer, the performance was improved and reached 10.3%. In addition, the homogeneity of solar cell performance was improved using ZnS/CdS window layer. A thin ZnS layer was quite effective to reduce the possible shunt paths and short parts of window layer and consequently contributed to fabrication of a homogeneous CdTe solar cell.     

Low‐Temperature‐Processed CdS as the Electron Selective Layer in an Organometal Halide Perovskite Photovoltaic Device

Organic–inorganic halide perovskites have recently been crowned as the leading next‐generation photovoltaic material due to their high efficiency and simple fabrication process. Herein, a low‐temperature‐processed CdS thin film (commonly used as a buffer layer in commercial CdTe or CIGSe solar cells) is reported as an electron selective layer in perovskite devices based on the following reasons: First, the photoelectric property of CdS thin film is investigated, illustrating the possibility of CdS as the electron selective layer in the application of methylammonium lead (II) iodide perovskite devices. More specifically, CdS semiconductor film presents a higher mobility compared with traditional TiO₂ thin film, which benefits the electron extraction and transmission; second, it is found that the perovskite thin film spun‐coating on the CdS substrates grows with an obvious tendency along the direction toward the thickness of thin film, which reduces the chance of recombination of electrons and hole, beneficial to their separation. It is also revealed that the perovskite‐device‐based CdS electron selective layer has a higher stability compared with that of TiO₂ due to the difference of substrates wetting.     

Synthesis and characterization of electro-crystallized Cd-Sn-Se semiconductor films for application in non-aqueous photoelectrochemical solar cells

In the present investigation, thin films of CdSnSe have been developed on transparent conducting oxide (TCO) coated glasses by electrolytic deposition. The controlled incorporation of Sn in the semiconducting layer have been achieved by varying the concentration of Sn²⁺ from 5 to 22 g/l of SnCl₂ in the deposition bath. The semiconductor film grown on the glass substrate consisted of n-type CdSnSe semiconductor compounds (alloyed and/or mixed type) in the form of highly dispersed, spherically shaped polycrystallites as detected from X-ray diffraction (XRD) studies, atomic force microscopy (AFM) and scanning electron microscopy (SEM). Their optoelectronic properties were determined by spectroscopic analysis and electrochemical measurements. The performance characteristics of a photoelectrochemical (PEC) cell fabricated with the prepared photo-electrode and ferrocene-ferricenium redox couple in dimethyl formamide were observed under dark and illuminated conditions. The prepared semiconductor films were electrochemically characterized through capacitance-voltage measurements. The film that was obtained from 10 g/l of Sn²⁺ in the bath, showed an optimum spectral sensitivity and corresponded to a film thickness of 0.65 μm and stoichiometry of Cd:Sn:Se as 1:1:1. The pronounced PEC activity of this film compared to the others was attributed to the combined effect of space charge properties, electron-hole recombination processes and transfer of charges through the Helmholtz layer at the semiconductor-solution interface.