Characterization of magnesium oxide gate insulators grown using RF sputtering for ZnO thin-film transistors

A ZnO thin-film transistor (TFT) with an MgO insulator was fabricated on a silicon (100) substrate using a radiofrequency magnetron sputtering system. The MgO insulator was deposited using the same deposition system; the total pressure during the deposition process was maintained at 5 mTorr, and the oxygen percentage of O₂/(Ar + O₂) was set at 30%, 50%, or 70%. The process temperature was maintained at below 300 °C. The dielectric constant of the MgO thin layer was approximately 11.35 with an oxygen percentage of 70%. This ZnO TFT displayed enhanced transistor properties, with a field-effect mobility of 0.0235 cm² V⁻¹ s⁻¹, an I_ON/I_OFF ratio of ∼10⁵, and an SS value of 1.18 V decade⁻¹; these properties were superior to those measured for the MgO insulators synthesized using oxygen percentages of 30% and 50%.     

Low-voltage-drive and high output current ZnO thin-film transistors with sputtering SiO2 as gate insulator

Low-voltage-drive ZnO thin-film transistors (TFTs) with room-temperature radio frequency magnetron sputtering SiO₂ as the gate insulator were fabricated successfully on the glass substrate. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 4.2 V, a field effect mobility of 11.2 cm²/V s, an on/off ratio of 3.1 × 10⁶ and a subthreshold swing of 0.61 V/dec. The drain current can reach to 1 mA while the gate voltage is only of 12 V and drain voltage of 8 V. The C–V characteristics of a MOS capacitor with the structure of ITO/SiO₂/ZnO/Al was investigated. The carrier concentration N_D in the ZnO active layer was determined, the calculated N_D is 1.81 × 10¹⁶ cm⁻³, which is the typical value of undoped ZnO film used as the channel layer for ZnO-TFT devices. The experiment results show that SiO₂ film is a promising insulator for the low voltage and high drive capability oxide TFTs.     

Utilization of surface plasmon resonance of Au/Pt nanoparticles for highly photosensitive ZnO nanorods network based plasmon field effect transistor

Hydrothermally processed highly photosensitive ZnO nanorods based plasmon field effect transistors (PFETs) have been demonstrated utilizing the surface plasmon resonance coupling of Au and Pt nanoparticles at Au/Pt and ZnO interface. A significantly enhanced photocurrent was observed due to the plasmonic effect of the metal nanoparticles (NPs). The Pt coated PFETs showed I_on/I_off ratio more than 3 × 10⁴ under the dark condition, with field-effect mobility of 26 cm² V⁻¹ s⁻¹ and threshold voltage of −2.7 V. Moreover, under the illumination of UV light (λ = 350 nm) the PFET revealed photocurrent gain of 10⁵ under off-state (−5 V) of operation. Additionally, the electrical performance of PFETs was investigated in detail on the basis of charge transfer at metal/ZnO interface. The ZnO nanorods growth temperature was preserved at 110 °C which allowed a low temperature, economical and simple method to develop highly photosensitive ZnO nanorods network based PFETs for large scale production.     

Double‐layer channel structure based ZnO thin‐film transistor grown by atomic layer deposition

A double channel structure has been used by depositing a thin amorphous‐AlZnO (a‐AZO) layer grown by atomic layer deposition between a ZnO channel and a gate dielectric to enhance the electrical stability. The effect of the a‐AZO layer on the electrical stability of a‐AZO/ZnO thin‐film transistors (TFTs) has been investigated under positive gate bias and temperature stress test. The use of the a‐AZO layer with 5 nm thickness resulted in enhanced subthreshold swing and decreased V_th shift under positive gate bias/temperature stress. In addition, the falling rate of the oxide TFT using a‐AZO/ ZnO double channel had a larger value (0.35 eV/V) than that of pure ZnO TFT (0.24 eV/V). These results suggest that the interface trap density between dielectric and channel was reduced by inserting a‐AZO layer at the interface between the channel and the gate insulator, compared with pure ZnO channel. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Investigation of the electrical properties and stability of HfInZnO thin-film transistors

In this study, amorphous HfInZnO (a-HIZO) thin films and related thin-film transistors (TFTs) were fabricated using the RF-sputtering method. The effects of the sputtering power (50–200 W) on the structural, surface, electrical, and optical properties of the a-HIZO films and the performance and NBIS stability of the a-HIZO TFTs were investigated. The films’ N_e increased and resistivity decreased as the sputtering power increased. The 100 W deposited a-HIZO film exhibited good optical and electrical properties compared with other sputtering powers. Optimization of the 100 W deposited a-HIZO TFT demonstrated good device performance, including a desirable μ_FE of 19.5 cm²/Vs, low SS of 0.32 V/decade, low V_th of 0.8 V, and high I_on/I_off of 10⁷, respectively. The 100 W deposited a-HIZO TFT with Al₂O₃ PVL also exhibited the best stability, with small V_th shifts of -2.2 V during NBIS testing. These high-performance a-HIZO thin films and TFTs with Al₂O₃ PVL have practical applications in thin-film electronics.     

Control of electrical properties and gate bias stress stability in solution-processed a-IZO TFTs by Zr doping

Zr-doped indium zinc oxide (IZO) thin film transistors (TFTs) are fabricated via a solution process with different Zr doping ratios. The addition of Zr suppressed the carrier concentration in the IZO films, which was confirmed by Hall Effect measurements. As the amount of Zr was increased in the oxide active layer of TFTs, the subthreshold swing (S.S) reduced, the ON/OFF ratio improved, and the threshold voltage (V_th) shifted positively. Moreover, the starting points of the ON state for TFTs near the point zero gate voltage could be controlled by the addition of Zr. The 0.3% Zr-doped IZO TFT exhibited a high saturation mobility of 7.0 cm² V⁻¹ s⁻¹, ON/OFF ratio of 2.6 × 10⁶ and S.S of 0.57 V/decade compared the IZO TFT with 10.1 cm² V⁻¹ s⁻¹, 1.7 × 10⁶ and 0.75 V/decade. The Zr effect of the gate bias stability was examined. Zr-doped IZO TFTs were relatively unstable under a positive bias stress (PBS), whereas they showed good stability at a negative bias stress (NBS). The gate bias stability of the oxide TFTs were compared with the extracted parameters through a stretched-exponential equation. The characteristic trapping time under NBS of 0.3% Zr-doped IZO TFTs was improved from 8.3 × 10⁴ s for the IZO TFT to 3.1 × 10⁵ s.     

Extraction of density-of-states in amorphous InGaZnO thin-film transistors from temperature stress studies

The instability of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) with different active layer thicknesses under temperature stress has been investigated through using the density-of-states (DOS). Interestingly, the a-IGZO TFT with 22 nm active layer thickness showed a better stability than the others, which was observed from the decrease of interfacial and semiconductor bulk trap densities. The DOS was calculated based on the experimentally-obtained activation energy (E_A), which can explain the experimental observations. We developed the high-performance Al₂O₃ TFT with 22 nm IGZO channel layer (a high mobility of 7.4 cm²/V, a small threshold voltage of 2.8 V, a high I_on/I_off 1.8 × 10⁷, and a small SS of 0.16 V/dec), which can be used as driving devices in the next-generation flat panel displays.     

Effect of MgO buffer layer thickness on the electrical properties of MgZnO thin film transistors fabricated by plasma assisted molecular beam epitaxy

We report the fabrication and electrical characteristics of thin film transistors based on MgZnO thin films with different thicknesses of MgO buffer layer. The MgZnO thin films with MgO buffer layers were grown on SiO₂/p-Si substrates by plasma assisted molecular beam epitaxy. The effects of the buffer layer thickness on the structural properties of MgZnO films are investigated by X-ray diffraction, and the results show that the crystal quality of the MgZnO film is enhanced with 4 nm MgO buffer layer. The MgZnO TFT with 4 nm MgO buffer layer exhibits an n-type enhancement mode characteristics with a field effect mobility of 1.85 cm²/V s, a threshold voltage of 27.6 V and an on/off ratio of above 10⁶.     

Effect of polarization roughness scattering (PRS) on two-dimensional electron transport of MgZnO/ZnO heterostructures

Quantum transport properties of two-dimensional electron gas (2DEG) in undoped MgZnO/ZnO heterostructures with polarization charge effect have been investigated theoretically. Polarization roughness scattering (PRS) combining polarization charge and interface roughness scattering was proposed as a new scattering mechanism. It was found that the carriers confined in the heterostructures (HSs) would be scattered from polarization charges when they were moving along the in-plane and PRS played a very important role for the low-temperature electron mobility when the electron density N_s exceeded 1.0e11 cm⁻², especially in a higher electron density region. With PRS, the experimental data on the density dependence of 2DEG mobility in the MgZnO/ZnO HSs under study can be well reproduced. The study indicates that the improved processing techniques providing a smooth interface and a good separation between the 2DEG electrons and the polarization charges should be significant for the quantum device’s performance.     

Enhancement of the electrical characteristics of indium–zinc tin-oxide thin-film transistors utilizing dual-channel layers

Thin film transistors (TFTs) with indium–zinc tin-oxide (IZTO) dual-channel layers were fabricated on heavily-doped p-type Si substrates by using a tilted dual-target radio-frequency magnetron sputtering system. The number of oxygen vacancies in the IZTO channel layer decreased with increasing oxygen partial pressure, resulting in a decrease in the conductivity. The threshold voltage (V_th) shifted toward positive gate-source voltage with increasing oxygen partial pressure for the growth of the IZTO layer because of a decrease in the carrier concentration. The V_th, the mobility, the on/off-current ratio, and the subthreshold swing of the dual-channel IZTO TFTs were 3.5 V, 7.1 cm²/V s, 1.3 V/decade, and 8.2 × 10⁶, respectively, which was enhanced by utilizing dual-channel layers consisting of a top channel deposited at a high oxygen partial pressure and a bottom channel deposited at a low oxygen partial pressure.     

Pulsed laser deposition of ZnO grown on glass substrates for realizing high-performance thin-film transistors

We report characterization of ZnO thin-film transistors (TFTs) on glass substrates fabricated by pulsed laser deposition (PLD). ZnO films were characterized by X-ray diffraction (XRD), atomic force microscopy and Hall effect measurements. The XRD results showed high c-axis-oriented ZnO(0002) diffraction corresponding to the wurtzite phase. Moreover, the crystallization and the electrical properties of ZnO thin films grown at room temperature are controllable by PLD growth conditions such as oxygen gas pressure. The ZnO films are very smooth, with a root-mean-square roughness of 1 nm. From the Hall effect measurements, we have succeeded in fabricating ZnO films on glass substrates with an electron mobility of 21.7 cm²/V s. By using the ZnO thin film grown by two-step PLD and a HfO₂ high-k gate insulator, a transconductance of 24.1 mS/mm, a drain current on/off ratio of 4.4×10⁶ and a subthreshold gate swing of 0.26 V/decade were obtained for the ZnO TFT.     

The effect of post-metal annealing on the electrical performance and stability of two-step-annealed solution-processed In2O3 thin film transistors

In this work, solution-processed indium oxide (In₂O₃) thin film transistors (TFTs) were fabricated by a two-step annealing method. The influence of post-metal annealing (PMA) temperatures on the electrical performance and stability is studied. With the increase of PMA temperatures, the on-state current and off-state current (I_on/I_off) ratio is improved and the sub-threshold swing (SS) decreased. Moreover, the stability of In₂O₃ TFTs is also improved. In all, In₂O₃ TFT with post-metal annealing temperature of 350°С exhibits the best performance (a threshold voltage of 4.75 V, a mobility of 13.8 cm²/V, an I_on/I_off ratio of 1.8 × 10⁶, and a SS of 0.76 V/decade). Meanwhile, the stability under temperature stress (TBS) and positive bias stress (PBS) also show a good improvement. It shows that the PMA treatment can effectively suppress the interface trap and bulk trap and result in an obviously improvement of the In₂O₃ TFTs performance.     

Structural, optical and electronic properties of P doped p-type ZnO thin film

P doped ZnO films were grown on quartz by radio frequency-magnetron sputtering method using a ZnO target mixed with 1.5 at% P₂O₅ in the atmosphere of Ar and O₂ mixing gas. The as-grown P doped ZnO film showed n-type conductivity, which was converted to p-type after 800 °C annealing in Ar gas. The P doped ZnO has a resistivity of 20.5 Ω cm (p∼2.0×10¹⁷ cm⁻³) and a Hall mobility of 2.1 cm² V⁻¹ s⁻¹. XRD measurement indicated that both the as-grown and the annealed P doped ZnO films had a preferred (0 0 2) orientation. XPS study agreed with the model that the P_Zn-2V_Zn acceptor complex was responsible for the p-type conductivity as found in the annealed P-doped ZnO. Temperature-dependent photoluminescence (PL) spectrum showed that the dominant band is located at 3.312 eV, which was attributed to the free electronic radiative transition to neutral acceptor level (FA) in ZnO. The P_Zn-2V_Zn acceptor complex level was estimated to be at E_V=122 meV.     

薄膜热处理对ZnO薄膜晶体管性能的提高

制备了两种以SiO2为绝缘层的底栅ZnO薄膜晶体管,分别以未退火和退火处理的ZnO薄膜作为有源层.与未退火处理的ZnO薄膜晶体管相比,退火处理的ZnO薄膜晶体管的饱和迁移率由2.3 cm2/(V·s)增大至3.12 cm2/(V·s),阈值电压由20.8V减小至9.9V,亚阈值摆幅由2.6 V/dec减小至1.9 V/...     

The effect of annealing in forming gas on the a-IGZO thin film transistor performance and valence band cut-off of IGZO on SiNx

In this investigation, the carrier concentration gradient between channel and contact region is achieved to improve the Thin film Transistors (TFT) performance by employing annealing at 350 °C in forming gas (N₂ + 5% H₂). The contact region is covered with Mo metal and the channel region is only exposed to forming gas to facilitate the diffusion controlled reaction. The TFT using a-IGZO active layer is fabricated in ambient of Ar:O₂ in ratio 60:40 and the conductivity of the order of 10⁻³ S/cm is measured for as-deposited sample. The electrical conductivity of an annealed sample is of the order of 10² S/cm. The device performance is determined by measuring merit factors of TFT. The saturation mobility of magnitude 18.5 cm²V⁻¹ s⁻¹ has been determined for W/L (20/10) device at 15 V drain bias. The extrapolated field effect mobility for a device with channel width (W) 10 μm is 19.3 cm²V⁻¹ s⁻¹. The on/off current ratio is 10⁹ and threshold voltage is in the range between 2 and 3 V. The role of annealing on the electronic property of a-IGZO is carried out using X-ray photoelectron spectroscopy (XPS). The valance band cut-off has been approximately shifted to higher binding energy by 1 eV relative to as-deposited sample.     

An influence of deposition temperature on structural,optical and electrical properties of sprayed ZnO thin films of identical thickness

Nanocrystalline ZnO thin films were deposited at different temperatures (T_s = 325 °C–500 °C) by intermittent spray pyrolysis technique. The thickness (300 ± 10 nm) independent effect of T_s on physical properties was explored. X-Ray diffraction analysis revealed the growth of wurtzite type polycrystalline ZnO films with dominant c-axis orientation along [002] direction. The crystallite size increased (31 nm–60 nm) and optical band-gap energy decreased (3.272 eV–3.242 eV) due to rise in T_s. Scanning electron microscopic analysis of films deposited at 450 °C confirmed uniform growth of vertically aligned ZnO nanorods. The films deposited at higher T_s demonstrated increased hydrophobic behavior. These films exhibited high transmittance (>91%), low dark resistivity (～10^?2 Ω-cm), superior figure of merit (～10^?3 Ω^?1) and low sheet resistance (～10² Ω/□). The charge carrier concentration (η -/cm³) and mobility (μ – cm²V^?1s^?1) are primarily governed by crystallinity, grain boundary passivation and oxygen desorption effects.     

Effects of Ti addition on sol-gel derived InO and InZnO thin film transistors

In this study, we have newly developed titanium-indium oxide (TiInO) and titanium-indium zinc oxide (TiInZnO) thin films as the active channel layer in thin film transistors (TFTs) by the sol-gel process. The effects of adding Ti on TiInO and TiInZnO TFTs were investigated. The addition of Ti elements can suppress formation of oxygen vacancies because of the stronger oxidation tendency of Ti relative to that of Zn or In. TiInO and TiInZnO TFTs showed lower off currents and higher on/off current ratios than pure InO and InZnO TFTs. A TiInO TFT doped with 10.31 mol% Ti showed good performance with an on/off current ratio greater than 10⁷, and a field-effect mobility of 1.91 cm² V^?1 S^?1. A TiInZnO TFT doped with 2.92 mol % Ti showed an on/off current ratio greater than 10⁶, and a field-effect mobility of 0.45 cm² V^?1 S^?1.     

Spray pyrolised Al/ZnO: Al heterojunction: Effect of Al on junction properties

Al/ZnO: Al heterojunction was fabricated by depositing ZnO: Al film on Al substrate by spray pyrolysis technique at 220 °C substrate temperature. XRD, SEM and EDAX techniques were used to study the properties of thin films. Heterojunction properties were studied by I–V and C–V measurements. The fabricated Al/ZnO: Al junctions were rectifying in character. The room temperature ideality factors of Al/ZnO: Al junctions are found to vary from 2.56 to 5.45. The reverse saturation currents are 5.21 × 10⁻⁹, 1.35 × 10⁻⁶, 1.99 × 10⁻⁶, 9.99 × 10⁻⁷ and 1.02 × 10⁻⁷ A for Al/ZnO: Al junctions. Junction forward current depends on doping concentrations and temperature, whereas reverse saturation current remains independent for Al concentration. The built-in-potential calculated from capacitance for Al/ZnO: Al junctions are 2.74, 2.60, 2.0, 2.50 and 2.43 V corresponding to 1, 2, 3, 4 and 5 mol% of Al. X-ray diffraction study confirmed that the films are polycrystalline, orientated in (0 0 2) plane. Scanning electron microscopy study confirmed circular ring patterns with inside ribbon type structure for Al doped ZnO films.     

Effect of Ge doping on the electrical properties of amorphous Zn–Sn–O thin films

We report the effect of germanium doping on the active layer of amorphous Zinc–Tin-Oxide (a-ZTO) thin film transistor (TFT). Amorphous thin film samples were prepared by RF magnetron sputtering using single targets composed of Zn₂Ge_0.05Sn_0.95O₄ and Zn₂SnO₄ with variable oxygen contents in the sputtering gases. In comparison with undoped, Ge-doped a-ZTO films exhibited five order of magnitude lower carrier density with a significantly higher Hall-mobility, which might be due to suppressed oxygen vacancies in the a-ZTO lattice since the Ge substituent for the Sn site has relatively higher oxygen affinity. Thus, the bulk and interface trap densities of Ge-doped a-ZTO film were decreased one order of magnitude to 7.047 × 10¹⁸ eV⁻¹cm⁻³ and 3.52 × 10¹¹ eV⁻¹cm⁻², respectively. A bottom-gate TFT with the Ge-doped a-ZTO active layer showed considerably improved performance with a reduced SS, positively shifted V_th, and two orders of magnitude increased I_on/I_off ratio, attributable to the doped Ge ions.     

Top-gate amorphous IGZO thin-film transistors with a SiO buffer layer inserted between active channel layer and gate insulator

In this paper, top-gate thin-film transistors (TFTs) using amorphous In-Ga-Zn-O as the n-channel active layer and SiO₂ as gate insulator were fabricated by radio frequency magnetron sputtering at room temperature. In this device, a SiO layer was used to be a buffer layer between active layer and gate insulator for preventing the damage of the InGaZnO surface by the process of sputtering SiO₂ with relatively high sputtering power. The thickness of buffer layers was studied and optimized for enhancing the TFTs performances. Contrasting to the TFTs without buffer layer, the optimized thickness of 10 nm SiO buffer layer improved the top-gate TFTs performances greatly: mobility increases 30%, reached 1.29 cm²/V s, the I_on/I_off ratio increases 3 orders, and the trap density at the interface of channel/insulator decreases about 1 order, indicated that the improvement of semiconductor/dielectric interface by buffering the sputtering power.