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1.
采用数学模拟方法分析了不同背接触势垒高度(φb) 对于CdS/CdTe薄膜电池的J-V(电流密度-电压)方程的影响, 得出了势垒高度与roll-over的变化对应关系. 采用相应Cu/Mo背电极的CdS/CdTe薄膜电池在220-300 K的变温J-V曲线的数值分析与理论分析相对照, 分析了背势垒对于J-V曲线拟合参数的影响. 修正了φb 与反向饱和电流(Jb0)关系式, 理论与实验符合得非常好. 关键词: CdS/CdTe薄膜 伏安特性 肖特基势垒 roll-over  相似文献   

2.
CdTe太阳电池的不同背电极和背接触层的特性研究   总被引:1,自引:0,他引:1       下载免费PDF全文
用Ni替代Au来作为CdTe太阳电池的背电极,比较了Ni,Ni/Au,Au/Ni及Au背电极对电池性能的影响.发现Ni作为背电极和ZnTe/ZnTe:Cu复合层接触,电池的开路电压Voc略有降低,填充因子FF有增有减,变化幅度不大,但因短路电流Isc有较大的提高,转换效率η平均增长4%.测试了不同背电极的CdTe太阳电池的暗I-V和C-V特性,对背电极剥离后的样品进行了XPS测试分析.结果表明,Ni扩散到ZnTe/ZnTe:Cu复合层的深度比Au多,且大多呈离子态,与ZnTe/ZnTe:Cu复合层中的富Te离子形成NixTe,提高了掺杂浓度,使电池性能获得改善. 关键词: 金属背电极 复合背接触层 转换效率 CdTe太阳电池  相似文献   

3.
InAlN材料表面态性质研究   总被引:1,自引:0,他引:1       下载免费PDF全文
杨彦楠  王新强  卢励吾  黄呈橙  许福军  沈波 《物理学报》2013,62(17):177302-177302
运用电流-电压(I-V), 变频电容-电压(C-V)和原子力显微镜 (AFM) 技术研究In组分分别为15%, 17%和21%的Ni/Au/-InAlN肖特基二极管InAlN 样品表面态性质 (表面态密度、时间常数和相对于InAlN 导带底的能级位置). I-V和变频 C-V方法测量得到的实验结果表明, 随着In组分增加, 肖特基势垒高度逐渐降低, 表面态密度依次增加. 变频 C-V特性还表明,随着测试频率降低, C-V曲线有序地朝正电压方向移动, 该趋势随着In组分的增加而变得更加明显, 这可能归结于InAlN表面态的空穴发射. AFM表面形貌研究揭示InAlN 表面粗糙度增加可能是表面态密度增加的主要原因. 关键词: 不同In组分的InAlN材料 表面态 电流-电压特性 变频电容-电压特性  相似文献   

4.
碲化镉薄膜太阳能电池电学特性参数分析   总被引:1,自引:1,他引:0       下载免费PDF全文
用inline方式全部近空间升华方法制备n-CdS/p-CdTe取得了~11%的转换效率(AM1.5). 把其中n-CdS层采用磁控溅射方法取得了~10%的转换效率(AM1.5). 基于其电流密度-电压(J-V)曲线和外量子效率曲线, 分析了其拟合关键参数对于电池性能的影响程度, 并从理论分析上把目前器件性能参数与当今前沿性能参数以及其理论值进行比较, 指出了如何提高电池转换效率(η)的方法: 提高开路电压(Voc)、短路电流(Jsc)和填充因子(FF). 关键词: 碲化镉电池 电流密度-电压曲线 外量子效率曲线 电学特性  相似文献   

5.
李彤  李驰平  张铭  王波  严辉 《物理学报》2007,56(7):4132-4136
采用磁控溅射法制备的La1-xSrxMnO3 (LSMO)/TiO2异质pn结表现出很好的整流特性.室温电流电压特性曲线显示随着Sr掺杂的增加,扩散电压增大,这可能由于Sr掺杂的增加导致载流子浓度增大所致.电流电压变温特性曲线显示随着测量温度的降低,扩散电压增大,这可能由于随着测量温度的变化导致界面电子结构的变化所致.值得提出的,异质pn结电阻随温度变化曲线表现出单层LSMO的金属绝缘相变特性,并且在低测量温度时表现出随着测量温度的降低结电阻增大,这可能是由于宽带隙的TiO2的引入导致. 关键词: 异质结 整流特性 庞磁阻  相似文献   

6.
p型深受主能级对OLED器件电荷输运的影响   总被引:1,自引:1,他引:0       下载免费PDF全文
对OLED器件施加扫描电压时,器件的瞬态电压-电流特性表现出滞后现象。并且随着扫描电压的方向、扫描速度的不同,器件瞬态电压-电流曲线也不相同。使用具有ITO/CuPc/NPD/Alq3/LiF/Al结构的OLED器件做电压扫描测试,并尝试用p型深受主型陷阱能级的存在,以及深能级较长的充放电时间特性对OLED器件中载流子输运过程的影响来定性解释上述滞后现象,获得了比较满意的结果,为器件性能的进一步优化找到了方向。  相似文献   

7.
采用磁控溅射法制备了ZnS/CdS复合窗口层,并将其应用于CdTe太阳能电池。对所制备薄膜的形貌和结构等进行了研究。测试了具有不同窗口层的CdTe太阳电池的量子效率和光Ⅰ-Ⅴ特性,分析了ZnS薄膜制备条件对CdTe电池器件性能影响;研究了CdS薄膜厚度和ZnS/CdS复合窗口层对短波区透过率以及CdTe太阳电池的光谱响应的影响。着重研究了具有ZnS/CdS复合窗口层的CdTe太阳电池的短波光谱响应。结果表明,CdS窗口层厚度从100 nm减至50 nm后,其对短波区光子透过率平均提高了18.3%,CdTe太阳电池短波区光谱响应平均提高了27.6%。衬底温度250 ℃条件下制备的ZnS晶粒尺寸小于室温下制备的ZnS。具有ZnS/CdS复合窗口层的CdTe电池中,采用衬底温度250 ℃沉积ZnS薄膜来制备窗口层的电池器件,其性能要优于室温下沉积ZnS制备窗口层的电池器件。这说明晶粒尺寸的大小对电子输运有一定影响。在相同厚度CdS的前提下,具有ZnS/CdS复合窗口层的CdTe电池比具有CdS窗口层在短波的光谱响应提高了约2%。这说明ZnS/CdS复合窗口层能够做到减少对短波光子的吸收,从而使更多的光子被CdTe电池的吸收层吸收。  相似文献   

8.
在蓝宝石衬底上采用原子层淀积法制作了三种不同Al2O3介质层厚度的绝缘栅高电子迁移率晶体管.通过对三种器件的栅电容、栅泄漏电流、输出和转移特性的测试表明:随着Al2O3介质层厚度的增加,器件的栅控能力逐渐减弱,但是其栅泄漏电流明显降低,击穿电压相应提高.通过分析认为薄的绝缘层能够提供大的栅电容,因此其阈值电压较小,但是绝缘性能较差,并不能很好地抑制栅电流的泄漏;其次随着介质厚度的增加,可以对栅极施加更高的正偏压,因此获 关键词: 2O3')" href="#">Al2O3 金属氧化物半导体-高电子迁移率晶体管 介质层厚度 钝化  相似文献   

9.
倍增层对雪崩光电探测器内部载流子的碰撞电离至关重要,因此,采用三元化合物In0.83Al0.17As作为倍增层材料,借助器件仿真工具Silvaco-TCAD,详细探究了In0.83Ga0.17As/GaAs雪崩光电探测器的倍增层厚度及掺杂浓度对其内部电场强度、电流特性和电容特性的影响规律。研究表明,随着倍增层厚度的增加,器件的电场强度和电容呈减小趋势。同时,倍增层掺杂浓度的增大会引起电容和倍增层内的电场强度峰值增加。进一步研究发现,随着倍增层厚度的增加,器件的穿通电压线性增大,击穿电压先减小后增大,但倍增层掺杂浓度的增加会引起器件击穿电压的减小。此外,用电场分布和倍增因子的结合解释了器件穿通电压与击穿电压的变化。  相似文献   

10.
利用空间环境模拟设备,用固定能量为100keV、注量为1×109—3×1012cm-2的质子,对空间实用GaAs/Ge太阳电池进行了辐照试验.利用伏安(I-V)特性、光谱响应和光致发光(PL)光谱测试,研究分析了电池的光电效应.试验表明,电池的各种电性能参数如短路电流(Isc)、开路电压(Voc)、最大输出功率(Pm< 关键词: GaAs/Ge太阳电池 质子辐照 光电效应  相似文献   

11.
采用化学水浴法制备了大面积CdS多晶薄膜,研究了薄膜的形貌、结构和光学性质,结果表明,大面积CdS多晶薄膜具有良好的均匀性,通过优化CdS多晶薄膜,制成了不同CdS窗口层厚度的CdTe小面积太阳电池,减薄CdS薄膜可有效提高器件的短路电流,改善器件性能.随后,在面积30cm×40cm的衬底上制备了全面积为993.6cm2的CdTe太阳电池组件,其27个集成单元的电学性质较为均匀,太阳电池组件的光电转换效率8.13%. 关键词: 化学水浴法(CBD) CdS薄膜 CdTe太阳电池 CdTe太阳电池组件  相似文献   

12.
CdCl2 treatment is crucial in the fabrication of highly efficient CdS/CdTe thin-film solar cells. This study reports a comprehensive analysis of thermal evaporated CdS/CdTe thin-film solar cells when the CdTe absorber layer is CdCl2 annealed at temperatures from 340 to 440 °C. Samples were characterized for structural, optical, morphological and electrical properties. The films annealed at 400 °C showed better crystallinity with a cubic zinc blende structure having large grains. Higher refractive index, optical conductivity, and absorption coefficient were recorded for the CdTe films annealed at 400 °C with CdCl2. Optimum photoactive properties for CdS/CdTe thin-film solar cells were also obtained when samples were annealed at 400 °C for 20 min with CdCl2, and the best device exhibited VOC of 668.4 mV, JSC of 13.6 mA cm−2, FF of 53.9% and an efficiency of 4.9%.  相似文献   

13.
CdS/CdTe solar cells were built by depositing a 200 nm layer of SnO2:F on glass substrates by the spray pyrolysis (SP) technique, a 500 nm CdS:In layer by the same technique and a 1–1.5 μm CdTe layer by vacuum evaporation. The cells were CdCl2 heat-treated in nitrogen atmosphere for 30 min at 350 °C. The photoluminescence (PL) spectra were measured at the CdS/CdTe interface for two cells with different values of the CdTe layer's thickness at the temperature T=60 K. A deconvolution peak fit was performed from which it is found that the peaks are characteristic of the solid solution CdSxTe1?x. The parabolic relation that relates the bandgap energy with the composition was used to estimate x, where x is [S]/([Te]+[S]) and [Te], [S] are the concentrations of Te and S atoms, respectively. The results show that the interface is smooth and the change of the bandgap occurs gradually. The solar cell of the thicker CdTe layer showed more interdiffusion at the CdS/CdTe interface and better photovoltaic characteristics.  相似文献   

14.
Thin film CdS/CdTe solar cells have been prepared by conventional vacuum deposition technique. Deep level transient spectroscopy (DLTS), temperature and frequency dependent capacitance-voltage (C-V) measurements were utilised to investigate the performance limiting defect states in the CdTe layer subjected to the post deposition treatments such as CdCl2-dipping and/or annealing in air. Five hole traps, all of which have been previously reported in the literature, were identified in as-grown CdTe at 0.19, 0.20, 0.22, 0.30 and 0.40 eV above the valence band. A single hole trap level has been evidenced at 0.45 eV after both post deposition heat and CdCl2 treatments.  相似文献   

15.
在不同温度下用近空间升华法(CSS)制备了CdTe多晶薄膜,结合I-V,C-V特性及深能级瞬态谱研究了不同温度制备的CdTe薄膜对CdS/CdTe太阳电池性能的影响.结果表明,制备温度对电池组件的开路电压影响不大,对短路电流和填充因子有影响,CdTe薄膜的深中心对温度和频率的响应基本一致.580℃制备的样品暗饱和电流密度最小,载流子浓度较高,光电特性较好,而且空穴陷阱浓度较低,深中心复合作用较小.在此研究基础上制备出了面积为300 mm×400 mm 关键词: 制备温度 CdTe薄膜 深能级瞬态谱(DLTS) CdS/CdTe太阳电池  相似文献   

16.
Wet chemical etching process on as-deposited CdTe surface using nitric-phosphoric (NP) acid improved the efficiency of CdS/CdTe solar cells from 10.1% to 13.8%. Nitric-phosphoric (NP) acid solution etched native oxide (TeO2) layer and resolved excess cadmium on CdTe surface. After the heat treatment process activated the CdCl2, CdO layer which was believed to be a diffusion barrier of chlorine did not grow on the etched CdTe surface and new (VCd2?–2ClTe1+)0 complexes was located at EV + 0.045 eV. New (VCd2?–2ClTe1+)0 complexes acted as a shallow acceptors and induced to improve Voc and Jsc. The surface of CdTe thin film has been studied using Scanning Electron Microscope (SEM), X-ray Diffraction (XRD), X-ray photoelectron spectroscopy (XPS) and low temperature Photoluminescence (PL).  相似文献   

17.
It is well known that preparing temperatures and defects are highly related to deep-level impurities. In our studies, the CdTe polycrystalline films have been prepared at various temperatures by close spaced sublimation (CSS). The different preparing temperature effects on CdS/CdTe solar cells and deep-level impurities have been investigated by I--V and C--V measurements and deep level transient spectroscopy (DLTS). By comparison, less dark saturated current density, higher carrier concentration, and better photovoltaic performance are demonstrated in a 580oC sample. Also there is less deep-level impurity recombination, because the lower hole trap concentration is present in this sample. In addition, three deep levels, Ev+0.341 eV(H4), Ev+0.226 eV(H5) and EC-0.147 eV(E3), are found in the 580oC sample, and the possible source of deep levels is analysed and discussed.  相似文献   

18.
Ruthenium was evaporated on n-GaAs to form Schottky contacts. Initial electrical measurements revealed a near ideal Schottky behaviour with low leakage currents. The Schottky diodes exhibit good stability upon thermal aging at elevated temperatures up to 300° C. However, the diode parameters rapidly deteriorate after aging at temperatures in excess of 400° C. The room temperature (300 K) median life of the diodes, based on a failure criterion of a tenfold increase in the diode saturation current, J riv s , from reverse bias current-voltage (I–V) data, was of the order of 104 h.  相似文献   

19.
The capacitance-voltage and current-voltage characteristics of the n-CdS/p-CdTe heterosystem are investigated. Analysis of these characteristics demonstrates that the CdTe1?x S x solid solution formed at the n-CdS/p-CdTe heterointerface is inhomogeneous in both the conductivity and composition. The thickness of solid solutions is estimated from the capacitance-voltage characteristics. It is shown that, for the n-CdS/p-CdTe heterosystem, the current-voltage characteristic in the current density range 10?8-10?5 A cm?2 is governed by the thermal electron emission, whereas the current in the heterostructure at current densities in the range 10?4-10?2 A cm?2 is limited by recombination of charge carriers in the electroneutral region of the CdTe1?x S x solid solution. The lifetime and the diffusion length of minority charge carriers in the CdTe1?x S x solid solution and the surface recombination rate at the interface between the CdS layer and the CdTe1?x S x solid solution are determined. It is demonstrated that the n-CdS/p-CdTe heterostructure operates as a p-i-n structure in which CdTe is a p layer, CdTe1?x S x is an i layer, and CdS is an n layer.  相似文献   

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