Comparison of total dose effects on SiGe heterojunction bipolar transistors induced by different swift heavy ion irradiation

The degradations in NPN silicon-germanium （SiGe） heterojunction bipolar transistors （HBTs） were fully studied in this work, by means of 25-MeV Si, 10-MeV C1, 20-MeV Br, and 10-MeV Br ion irradiation, respectively. Electrical parameters such as the base current （IB）, current gain （β）, neutral base recombination （NBR）, and Early voltage （VA） were investigated and used to evaluate the tolerance to heavy ion irradiation. Experimental results demonstrate that device degradations are indeed radiation-source-dependent, and the larger the ion nuclear energy loss is, the more the displacement damages are, and thereby the more serious the performance degradation is. The maximum degradation was observed in the transistors irradiated by 10-MeV Br. For 20-MeV and 10-MeV Br ion irradiation, an unexpected degradation in Ic was observed and Early voltage decreased with increasing ion fluence, and NBR appeared to slow down at high ion fluence. The degradations in SiGe HBTs were mainly attributed to the displacement damages created by heavy ion irradiation in the transistors. The underlying physical mechanisms are analyzed and investigated in detail.     

不同剂量率下锗硅异质结双极晶体管电离损伤效应研究

对于相同制作工艺的NPN锗硅异质结双极晶体管(SiGe HBT), 在不同辐照剂量率下进行⁶⁰Co γ射线的辐照效应与退火特性的研究. 测量结果表明, 两种辐照剂量率下, 随着辐照总剂量增加, 晶体管基极电流增大, 共发射极电流放大倍数降低, 且器件的辐照损伤、性能退化与辐照剂量率相关, 低剂量率下辐照损伤较高剂量率严重. 在经过与低剂量率辐照等时的退火后, 高剂量率下的辐照损伤仍较低剂量率下的损伤低, 即待测SiGeHBT具有明显的低剂量率损伤增强效应(ELDRS). 本文对相关的物理机理进行了探讨分析. 关键词： 锗硅异质结双极晶体管 低剂量率辐照损伤增强 辐照效应     

A single-event transient induced by a pulsed laser in a silicon-germanium heterojunction bipolar transistor

A study on the single event transient (SET) induced by a pulsed laser in a silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) is presented in this work. The impacts of laser energy and collector load resistance on the SET are investigated in detail. The waveform, amplitude, and width of the SET pulse as well as collected charge are used to characterize the SET response. The experimental results are discussed in detail and it is demonstrated that the laser energy and load resistance significantly affect the SET in the SiGe HBT. Furthermore, the underlying physical mechanisms are analyzed and investigated, and a near-ideal exponential model is proposed for the first time to describe the discharge of laser-induced electrons via collector resistance to collector supply when both base-collector and collector-substrate junctions are reverse biased or weakly forward biased. Besides, it is found that an additional multi-path discharge would play an important role in the SET once the base-collector and collector-substrate junctions get strongly forward biased due to a strong transient step charge by the laser pulse.     

Improved high-frequency equivalent circuit model based on distributed effects for SiGe HBTs with CBE layout

In this paper, we present an improved high-frequency equivalent circuit for SiGe heterojunction bipolar transistors(HBTs) with a CBE layout, where we consider the distributed effects along the base region. The actual device structure is divided into three parts: a link base region under a spacer oxide, an intrinsic transistor region under the emitter window,and an extrinsic base region. Each region is considered as a two-port network, and is composed of a distributed resistance and capacitance. We solve the admittance parameters by solving the transmission-line equation. Then, we obtain the smallsignal equivalent circuit depending on the reasonable approximations. Unlike previous compact models, in our proposed model, we introduce an additional internal base node, and the intrinsic base resistance is shifted into this internal base node,which can theoretically explain the anomalous change in the intrinsic bias-dependent collector resistance in the conventional compact model.     

Analytical capacitance model for 14 nm Fin FET considering dual-k spacer

The conformal mapping of an electric field has been employed to develop an accurate parasitic capacitance model for nanoscale fin field-effect transistor(Fin FET) device. Firstly, the structure of the dual-layer spacers and the gate parasitic capacitors are thoroughly analyzed. Then, the Cartesian coordinate is transferred into the elliptic coordinate and the equivalent fringe capacitance model can be built-up by some arithmetical operations. In order to validate our proposed model, the comparison of statistical analysis between the proposed calculation and the 3D-TCAD simulation has been carried out, and several different material combinations of the dual-k structure have been considered. The results show that the proposed analytical model can accurately calculate the fringe capacitance of the Fin FET device with dual-k spacers.     

Detailed study of NBTI characterization in 40-nm CMOS process using comprehensive models

The impact of negative bias temperature instability(NBTI) can be ascribed to three mutually uncorrelated factors, including hole trapping by pre-existing traps(?V_(HT)) in gate insulator, generated traps(?V_(OT)) in bulk insulator, and interface trap generation(?V_(IT)). In this paper, we have experimentally investigated the NBTI characteristic for a 40-nm complementary metal–oxide semiconductor(CMOS) process. The power-law time dependence, temperature activation, and field acceleration have also been explored based on the physical reaction–diffusion model. Moreover, the end-of-life of stressed device dependent on the variation of stress field and temperature have been evaluated. With the consideration of locking effect, the recovery characteristics have been modelled and discussed.     

Extraction of temperature dependences of small-signal model parameters in SiGe HBT HICUM model

In this work, temperature dependences of small-signal model parameters in the SiGe HBT HICUM model are presented. Electrical elements in the small-signal equivalent circuit are first extracted at each temperature, then the temperature dependences are determined by the series of extracted temperature coefficients, based on the established temperature formulas for corresponding model parameters. The proposed method is validated by a 1 × 0.2 × 16 μm~2 SiGe HBT over a wide temperature range(from 218 K to 473 K), and good matching is obtained between the extracted and modeled results. Therefore, we believe that the proposed extraction flow of model parameter temperature dependence is reliable for characterizing the transistor performance and guiding the circuit design over a wide temperature range.