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The speed performance and static power dissipation of the
ultra-thin-body (UTB) MOSFETs have been comprehensively investigated,
with both DC and AC behaviours considered. Source/drain extension
width ($L_{\rm sp})$ and silicon film thickness $(t_{\rm si})$ are
two independent parameters that influence the speed and static power
dissipation of UTB silicon-on-insulator (SOI) MOSFETs respectively,
which can result in
great design flexibility. Based on the different effects
of physical and geometric parameters on device characteristics, a method to
alleviate the contradiction between power dissipated and speed of UTB SOI MOSFETs is
proposed. The optimal design regions of $t_{\rm si}$ and
$L_{\rm sp}$ for
low operating power and high performance logic applications are
given, which may shed light on the design of UTB SOI MOSFETs. 相似文献
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In this paper, a method to fabricate Silicon-on-Nothing (SON) MOSFETs using
H$^{ + }$ and He$^{ + }$ co-implantation is presented. The technique is
compatible with conventional CMOS technology and its feasibility has been
experimentally demonstrated. SON MOSFETs with 50nm gate length have been
fabricated. Compared with the corresponding bulk MOSFETs, the SON MOSFETs
show higher on current, reduced leakage current and lower subthreshold
slope. 相似文献
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