Fabrication and electrical characterization of nanocrystalline ZnO/Si heterojunctions

Nanocrystalline zinc oxide (nc-ZnO) films were prepared by a sol-gel process on p-type single-crystalline Si substrates to fabricate nc-ZnO/p-Si heterojunctions. The structure and morphology of ZnO films on Si substrates, which were analyzed by X-ray diffraction (XRD) spectroscopy and atomic force microscopy (AFM), showed that ZnO films consisted of 50-100 nm polycrystalline nanograins with hexagonal wurtzite structure. The electrical transport properties of the nc-ZnO/p-Si heterojunctions were investigated by temperature-dependent current-voltage (I-V) measurements and room temperature capacitance-voltage measurements. The temperature-dependent I-V characteristics revealed that the forward conduction was determined by multi-step tunneling current, and the activation energy of saturation current was about 0.26 eV. The 1/C²-V plots indicated the junction was abrupt and the junction built-in potential was 1.49 V at room temperature.     

Comparison of electrical parameters of Zn/p-Si and Sn/p-Si Schottky barrier diodes

In this study, current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-semiconductor (MS) Zn/p-Si and Sn/p-Si Schottky diodes, with high resistivity silicon structures, are investigated. The parameters of series resistance (R_S), the ideality factor (n) and the barrier height (Φ_b) are determined by performing different plots from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Thus, the barrier heights (Φ_b) for the Si Schottky diodes obtained between 0.725 and 1.051 eV, the ideality factor (n) between 1.043 and 1.309, and the series resistance (R_S) between 12.594 and 12.950 kΩ. The energy distribution of interface states density was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. It was concluded that the density of interface states in the considered energy range are in close agreement with each other values obtained for Zn/p-Si and Sn/p-Si Schottky diodes.     

Laterally inhomogeneous barrier analysis of the methyl violet/p-Si organic/inorganic hybrid Schottky structures

In this work, we have investigated the electrical characteristics, such as current-voltage (I-V) and capacitance-voltage (C-V) measurements, of identically prepared crystal violet/p-Si Organic/Inorganic (OI) Schottky structures formed by evaporation of organic compound solution to directly p-Si semiconductor substrate. It has been seen that the crystal violet organic dye thin film on the p-Si substrate has exhibited a good rectifying behavior. The barrier heights (BHs) and ideality factors of all devices have been calculated from the electrical characteristics. Although the diodes were all identically prepared, there was a diode-to-diode variation: the effective barrier heights ranged from 0.6 ± 0.1 to 0.8 ± 0.1 eV, and the ideality factor from 1.6 ± 0.4 to 3.5 ± 0.4. The barrier height versus ideality factor plot has been plotted for the OI devices. Lateral homogeneous BH was calculated as a value of 0.7 eV from the observed linear correlation between BH and ideality factor, which can be explained by laterally inhomogeneities of BHs. The values of barrier height and acceptor doping concentration yielded from the reverse bias C-V measurements ranged from 0.7 ± 0.1 to 1.3 ± 0.1 eV and from (4.7 ± 0.8) × 10¹⁴ to (8.1 ± 0.8) × 10¹⁴ cm⁻³, respectively. The mean barrier height and mean acceptor doping concentration from C-V characteristics has been calculated 1.0 eV and 5.9 × 10¹⁴ cm⁻³, respectively. It has been seen that the mean BH value of 0.7 eV obtained for the Al/methyl violet/p-Si contact is significantly larger than BH values of the conventional Al/p-Si Schottky diodes. Thus, modification of the interfacial potential barrier for metal/Si diodes has been achieved using a thin interlayer of the methyl violet organic semiconductor; this has been ascribed to the fact that the methyl violet interlayer increases the effective barrier height by influencing the space charge region of Si.     

Molecular control over Ag/p-Si diode by organic layer

Electrical transport properties of Ag metal-fluorescein sodium salt (FSS) organic layer-silicon junction have been investigated. The current-voltage (I-V) characteristics of the diode show rectifying behavior consistent with a potential barrier formed at the interface. The diode indicates a non-ideal I-V behavior with an ideality factor higher than unity. The ideality factor of the Ag/FSS/p-Si diode decreases with increasing temperature and the barrier height increases with increasing temperature. The barrier height (φ_b=0.98 eV) obtained from the capacitance-voltage (C-V) curve is higher than barrier height (φ_b=0.72 eV) derived from the I-V measurements. The barrier height of the Ag/FSS/p-Si Schottky diode at the room temperature is significantly larger than that of the Ag/p-Si Schottky diode. It is evaluated that the FSS organic layer controls electrical charge transport properties of Ag/p-Si diode by excluding effects of the SiO₂ residual oxides on the hybrid diode.     

Electronic and interface state density distribution properties of Ag/p-Si Schottky diode

Electronic and interface state distribution properties of Ag/p-Si Schottky diode have been investigated. The diode indicates non-ideal current-voltage behavior with an ideality factor greater than unity. The capacitance-voltage (C-V) characteristic is linear in reverse bias indicating rectification behavior and charge density within depletion layer is uniform. From I-V and C-V characteristics, junction parameters such as diode ideality factor and barrier height were found as 1.66 and ?_B(I-V) = 0.84 eV (?_B(C-V) = 0.90 eV), respectively. The interface state density N_ss and relaxation time τ of the Schottky diode were determined by means of Schottky capacitance spectroscopy method. The results show the presence of thin interfacial layer between the metal and semiconductor.     

The effect of interface states, excess capacitance and series resistance in the Al/SiO2/p-Si Schottky diodes

The current-voltage (I-V) characteristics of Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance-voltage (C-V) and conductance-voltage (G-V) measurements are studied at frequency range of 10 kHz-1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO₂ interface. The density of interface states (N_ss) distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) at room temperature for the Schottky diode on the order of ≅4 × 10¹³ eV⁻¹ cm⁻²_. These high values of N_ss were responsible for the non-ideal behaviour of I-V and C-V characteristics. Frequency dispersion in C-V and G-V can be interpreted only in terms of interface states. The N_ss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I-V, C-V and G-V characteristics of SD are affected not only in N_ss but also in series resistance (R_s), and the location of N_ss and R_s has a significant on electrical characteristics of Schottky diodes.     

Correlation between barrier heights and ideality factors of Cd/n-Si and Cd/p-Si Schottky barrier diodes

Our goal is to experimentally investigate whether or not the effective Schottky barrier heights (SBHs) and ideality factors obtained from the current-voltage (I-V) and capacitance-voltage (C-V) characteristics differ from diode to diode even if the samples were identically prepared. For this purpose, we prepared Cd/n-Si (33 dots) and Cd/p-Si (15 dots) diodes. The SBH for the Cd/n-Si diodes ranged from 0.701 to 0.605 eV, and ideality factor n from 1.913 to 1.213. Φ_b value for the Cd/p-Si diodes ranged from 0.688 to 0.730 eV, and ideality factor n value from 1.473 to 1.040. The experimental SBH distributions obtained from the C⁻²-V and I-V characteristics were fitted by a Gaussian function and their mean SBH values were calculated. Furthermore, the laterally homogeneous barrier heights were also computed from the extrapolation of the linear plot of experimental barrier heights versus ideality factors.     

Structure and transport mechanisms of Si/porous Si n-p junctions prepared by liquid phase epitaxy

Heterojunction devices of n-Si/p-PSi were fabricated by growing n-Si films onto p-type porous Si substrates by liquid phase epitaxy. The structure of the grown films was checked using scanning electron microscopy and X-ray diffraction spectroscopy. X-ray diffraction measurements showed that the grown films have monocrystalline structure oriented along (1 1 1) direction with mainly cubic phase. Current-voltage (I-V) and capacitance-voltage (C-V) characteristics were measured over the temperature range from 298 to 398 K. The analysis of the dark I-V characteristics of n-Si/p-PSi at several temperatures is done to elucidate the conduction mechanisms and the evaluation of the heterojunction parameters is presented. Two carrier transport mechanisms are believed to be at the origin of the forward current. At low bias voltage (V ≤ 0.4 V) the forward current is dominated by the recombination at the porous silicon side of the space charge region. In the 0.5 V ≤ V ≤ 1.4 V region, the current transport is due to the space charge—limited current mechanism dominated by a single trapping level of energy 0.41 eV. The reverse current is considered to be mainly generated in the depletion region of the porous silicon. The capacitance-voltage results confirm an abrupt junction with a homogenous distribution of the impurities inside the space charge region. Information on the depletion region, built-in voltage and net carrier concentration were obtained from the dark C-V characteristics.     

Current transport mechanism in Al/Si3N4/p-Si (MIS) Schottky barrier diodes at low temperatures

The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-insulator-semiconductor (Al/Si₃N₄/p-Si) Schottky barrier diodes (SBDs) were measured in the temperature range of 80-300 K. By using the thermionic emission (TE) theory, the zero-bias barrier height Φ_B0 calculated from I-V characteristics was found to increase with increasing temperature. Such temperature dependence is an obvious disagreement with the negative temperature coefficient of the barrier height calculated from C-V characteristics. Also, the ideality factor decreases with increasing temperature, and especially the activation energy plot is nonlinear at low temperatures. Such behaviour is attributed to Schottky barrier inhomogeneties by assuming a Gaussian distribution of barrier heights (BHs) at interface. We attempted to draw a Φ_B0 versus q/2kT plot to obtain evidence of a Gaussian distribution of the BHs, and the values of Φ_Bo = 0.826 eV and α_o = 0.091 V for the mean barrier height and standard deviation at zero-bias, respectively, have been obtained from this plot. Thus, a modified ln(I_o/T²) − q²σ_o²/2(kT)² versus q/kT plot gives Φ_B0 and Richardson constant A^* as 0.820 eV and 30.273 A/cm² K², respectively, without using the temperature coefficient of the barrier height. This value of the Richardson constant 30.273 A/cm² K² is very close to the theoretical value of 32 A/cm² K² for p-type Si. Hence, it has been concluded that the temperature dependence of the forward I-V characteristics of the Al/Si₃N₄/p-Si Schottky barrier diodes can be successfully explained on the basis of TE mechanism with a Gaussian distribution of the barrier heights. In addition, the temperature dependence of energy distribution of interface state density (N_SS) profiles was determined from the forward I-V measurements by taking into account the bias dependence of the effective barrier height and ideality factor.     

The effect of series resistance on capacitance-voltage characteristics of Schottky barrier diodes

The capacitance-voltage (C-V) and current-voltage (I-V) characteristics of the Ti/p-Si Schottky barrier diodes (SBDs) have been investigated taking into account the effect of the interface states and series resistance of the device. The forward C-V measurements have been carried out in the range frequency of 0.3-2 MHz (at six different frequencies). It is seen that the forward C-V plots exhibit anomalous peaks in the presence of a series resistance. It has been experimentally determined that the peak positions in the C-V plot shift towards lower voltages and the peak value of the capacitance decreases with increasing frequency. In addition to, the effect of series resistance on the capacitance is found appreciable at higher frequencies due to the capacitance decreases with increasing frequency.     

The importance of the series resistance in calculating the characteristic parameters of the Schottky contacts

Cd/p-Si Schottky barrier diodes (SBDs) with and without the native oxide layer have been fabricated to determine the importance of the fact that the series resistance value is considered in calculating the interface state density distribution (ISDD) from the forward bias current-voltage (I-V) characteristics of the Cd/p-Si SBDs. The statistical analysis yielded mean values of 0.71 ± 0.02 eV and 1.24 ± 0.12 for the BH and ideality factor of the Cd/p-Si SBDs (15 dots) without the native oxide layer (MS), respectively, and mean values of 0.79 ± 0.02 eV and 1.36 ± 0.06 eV for the Cd/p-Si SBDs (28 dots) with the native oxide layer (metal-insulating layer-semiconductor (MIS)). The interface state density (Nss) distributions of the devices were calculated taking into account their series resistance values. At the same energy position near the top of the valence band, the interface state density values without taking into account the series resistance value of the devices are almost one order of magnitude larger than Nss obtained taking into account series resistance value.     

Temperature dependence of the current-voltage characteristics of the Al/Rhodamine-101/p-Si(1 0 0) contacts

The current-voltage (I-V) characteristics of Al/Rhodamine-101/p-Si/Al contacts have been measured at temperatures ranging from 280 to 400 K at 20 K intervals. A barrier height (BH) value of 0.817 eV for the Al/Rh101/p-Si/Al contact was obtained at the room temperature that is significantly larger than the value of 0.58 eV of the conventional Al/p-Si Schottky diode. While the barrier height Φ_b0 decreases the ideality factors (n) become larger with lowering temperature. The high values of n depending on the sample temperature may be ascribed to decrease of the exponentially increase rate in current due to space-charge injection into Rh101 thin film at higher voltage. Therefore, at all temperatures, it has been seen that the I-V characteristics show three different regions, the ohmic behavior at low voltages, and the space charge limited current with an exponential distribution of traps at high voltages.     

A note on TiN/Si (1 0 0) contacts

The contact properties of TiN on p- and n-type Si (1 0 0) obtained by magnetron reactive sputtering were investigated. Schottky diode characteristics were observed on p-type Si (1 0 0) as determined by forward current-voltage (I-V) measurements, but on n-type Si (1 0 0) the reverse I-V relation has shown a nonsymmetrical character. The zero-bias barrier heights evaluated by I-V on both type diodes were in the range of ∼0.60-0.64 V within the range of a few mVs, not more than ∼±(10-30) mV from each other. Incorporation of the effect of the series resistance in the I-V analysis resulted in a significant reduction in the magnitude of the ideality factor of the TiN/p-type specimen. Almost no change has occurred in the barrier height values. The contradictory reports on the TiN/n-type Si (1 0 0) diode characteristics in earlier works have been explained in terms of surface passivation of Si by the HF cleaning solution. It was stated in these reports that following annealing at 673 K the diodes have shown rectifying behavior. It has been speculated, that the nonsymmetrical nature of the TiN/n-Si (1 0 0) showing an intermediate behavior between Ohmic and rectifying behavior is a result of the specimen being exposed to a temperature lower than 673 K during sputtering where no complete depassivation took place. In order to obtain a rectifying behavior of TiN on both n-type and p-type Si surface passivation has to be eliminated.     

Current conduction mechanism in Al/p-Si Schottky barrier diodes with native insulator layer at low temperatures

The forward bias current-voltage (I-V) characteristics of Al/p-Si (MS) Schottky diodes with native insulator layer were measured in the temperature range of 80-300 K. The obtained zero bias barrier height Φ_B0(I-V), ideality factor (n) and series resistance (R_s) determined by using thermionic emission (TE) mechanism show strong temperature dependence. There is a linear correlation between the Φ_B0(I-V) and n because of the inhomogeneties in the barrier heights (BHs). Calculated values from temperature dependent I-V data reveal an unusual behaviour such that the Φ_B0 decreases, as the n and R_s values are increasing with decreasing absolute temperature, and these changes are more pronounced especially at low temperatures. Such temperature dependence of BH is contradictory with the reported negative temperature coefficient of the barrier height. In order to explain this behaviour we have reported a modification in the expression reverse saturation current I_o including the n and the tunnelling factor (αΧ^1/2δ) estimated to be 15.5. Therefore, corrected effective barrier height Φ_bef.(I-V) versus temperature has a negative temperature coefficients (α = −2.66 × 10⁻⁴ eV/K) and it is in good agreement with negative temperature coefficients (α = −4.73 × 10⁻⁴ eV/K) of Si band gap. In addition, the temperature dependent energy distribution of interface states density N_ss profiles was obtained from the forward bias I-V measurements by taking into account the bias dependence of the Φ_e and n. The forward bias I-V characteristics confirm that the distribution of N_ss, R_s and interfacial insulator layer are important parameters that the current conduction mechanism of MS Schottky diodes.     

On the energy distribution profile of interface states obtained by taking into account of series resistance in Al/TiO2/p-Si (MIS) structures

The energy distribution profile of the interface states (N_ss) of Al/TiO₂/p-Si (MIS) structures prepared using the sol-gel method was obtained from the forward bias current-voltage (I-V) characteristics by taking into account both the bias dependence of the effective barrier height (?_e) and series resistance (R_s) at room temperature. The main electrical parameters of the MIS structure such as ideality factor (n), zero-bias barrier height (?_b0) and average series resistance values were found to be 1.69, 0.519 eV and 659 Ω, respectively. This high value of n was attributed to the presence of an interfacial insulator layer at the Al/p-Si interface and the density of interface states (N_ss) localized at the Si/TiO₂ interface. The values of N_ss localized at the Si/TiO₂ interface were found with and without the R_s at 0.25-E_v in the range between 8.4×10¹³ and 4.9×10¹³ eV⁻¹ cm⁻². In addition, the frequency dependence of capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the structures have been investigated by taking into account the effect of N_ss and R_s at room temperature. It can be found out that the measured C and G/ω are strongly dependent on bias voltage and frequency.     

Electric characterization of GaAs deposited on porous silicon by electrodeposition technique

GaAs thin films were synthesized on porous Si substrate by the electrodeposition technique. The X-ray diffraction studies showed that the as-grown films were crystallised in mixed phase nature orthorhombic and cubic of GaAs. The GaAs film was then electrically characterized using current-voltage (I-V) and capacitance-voltage (C-V) techniques by the way of Al/GaAs Shottky junctions. The electric analysis allowed us to determine the n factor and the barrier height Ф_b0 parameters of Al/GaAs Schottky junctions. The (C-V) characteristics were recorded at frequency signal 1 MHz in order to identify the effect of the surface states on the behaviour of the capacitance of the device.     

Inhomogeneities in 130 MeV Au ion irradiated Au/n-Si (1 0 0) Schottky structure

The electrical characteristics of Au/n-Si (1 0 0) Schottky rectifier have been studied in a wide irradiation fluence range using conventional current-voltage (I-V) and capacitance-voltage (C-V) measurements. The I-V characteristics showed an abnormal increase in forward current at low voltage. The device shows a bend in forward I-V and reverses bias C-V characteristics due to extra current, suggesting that there are two independent contributions to thermionic current, corresponding to two levels of the Schottky barrier. It is shown that the excess current at low voltage can be explained by taking into account the role of heavy ion irradiation induced defects at the metal semiconductor interface.     

Theoretical prediction of the structural,elastic, electronic and thermodynamic properties of V3M (M = Si,Ge and Sn) compounds

Density functional theory (DFT), is used in our calculations to study the V₃M (M = Si, Ge and Sn) compounds, we are found that V₃Sn compound is mechanically unstable because of a negative C₄₄ = −19.41 GPa. For each of these compounds considered, the lowest energy structure is found to have the lowest N(E_f) value. Also there is a strong interaction between V and V, the interaction between M (M = Si, Ge, Sn) and V (M and M) is negative, not including Si [Sn]. In phonon density of states PDOS, the element contributions varies from lighter (high frequency) to heaviest (low frequency).     

Trap-controlled behavior in ultrathin Lu2O3 high-k gate dielectrics

Amorphous Lu₂O₃ high-k gate dielectrics were grown directly on n-type (100) Si substrates by the pulsed laser deposition (PLD) technique. High-resolution transmission electron microscope (HRTEM) observation illustrated that the Lu₂O₃ film has amorphous structure and the interface with Si substrate is free from amorphous SiO₂. An equivalent oxide thickness (EOT) of 1.1 nm with a leakage current density of 2.6×10⁻⁵ A/cm² at 1 V accumulation bias was obtained for 4.5 nm thick Lu₂O₃ thin film deposited at room temperature followed by post-deposition anneal (PDA) at 600 °C in oxygen ambient. The effects of PDA process and light illumination were studied by capacitance-voltage (C-V) and current density-voltage (J-V) measurements. It was proposed that the net fixed charge density and leakage current density could be altered significantly depending on the post-annealing conditions and the capability of traps to trap and release charges.     

The dependence of barrier height on temperature for Pd Schottky contacts on ZnO

Temperature dependent current-voltage (I-V) and capacitance-voltage (C-V) measurements have been performed on Pd/ZnO Schottky barrier diodes in the range 60-300 K. The room temperature values for the zero bias barrier height from the I-V measurements (Φ_I-V) was found to be 0.52 eV and from the C-V measurements (Φ_C-V) as 3.83 eV. From the temperature dependence of forward bias I-V, the barrier height was observed to increase with temperature, a trend that disagrees with the negative temperature coefficient for semiconductor material. The C-V barrier height decreases with temperature, a trend that is in agreement with the negative temperature coefficient of semiconductor material. This has enabled us to fit two curves in two regions (60-120 K and 140-300 K). We have attributed this behaviour to a defect observed by DLTS with energy level 0.31 eV below the conduction band and defect concentration of between 4×10¹⁶ and 6×10¹⁶ cm⁻³ that traps carriers, influencing the determination of the barrier height.