Electrical and photovoltaic characteristics of sodium copper chlorophyllin/n-type silicon heterojunctions

Heterojunctions of p-type sodium copper chlorophyllin (p-SCC)/n-type silicon (n-Si) were prepared by deposition of p-SCC film on n-Si wafers using spray-pyrolysis technique. Current-voltage and capacitance-voltage measurements of Au/p-SCC/n-Si/In heterojunctions were performed to discuss the electrical properties of these heterostructures. Rectifying characteristics were observed, which are definitely of the diode type. The current-voltage measurements suggest that the forward current in these junctions involves tunnelling and the results showed that the forward current can be explained by a multi-tunnelling capture-emission model in which the electron emission process dominates the carrier transport mechanism. On the other hand, the reverse current is probably limited by the same conduction process. The capacitance-voltage behavior indicates an abrupt heterojunction model is valid for Au/p-SCC/n-Si/In heterojunctions and the junction parameters such as, built-in potential, V_D, carrier concentration, N, the width of depletion layer, W, were obtained. The temperature and frequency dependence of the measured capacitance were also studied. The loaded I-V characteristics under white illumination provided by tungsten lamp (80 mW/cm²) give values of 400 mV, 0.9 mA, 0.38 and 1.7% for the open-circuit voltage, V_oc, the short-circuit current, I_sc, the fill factor, FF, and conversion efficiency, η, respectively.     

Inhomogeneities in 130 MeV Au ion irradiated Au/n-Si (1 0 0) Schottky structure

The electrical characteristics of Au/n-Si (1 0 0) Schottky rectifier have been studied in a wide irradiation fluence range using conventional current-voltage (I-V) and capacitance-voltage (C-V) measurements. The I-V characteristics showed an abnormal increase in forward current at low voltage. The device shows a bend in forward I-V and reverses bias C-V characteristics due to extra current, suggesting that there are two independent contributions to thermionic current, corresponding to two levels of the Schottky barrier. It is shown that the excess current at low voltage can be explained by taking into account the role of heavy ion irradiation induced defects at the metal semiconductor interface.     

Effect of UV lamp irradiation during oxidation of Zr/Pt/Si structure on electrical properties of Pt/ZrO2/Pt/Si structure

Metal-insulator-metal (MIM) capacitors were fabricated using ZrO₂ films and the effects of structural and native defects of the ZrO₂ films on the electrical and dielectric properties were investigated. For preparing ZrO₂ films, Zr films were deposited on Pt/Si substrates by ion beam deposition (IBD) system with/without substrate bias voltages and oxidized at 200 °C for 60 min under 0.1 MPa O₂ atmosphere with/without UV light irradiation (λ = 193 nm, Deep UV lamp). The ZrO₂(∼12 nm) films on Pt(∼100 nm)/Si were characterized by X-ray diffraction pattern (XRD), field emission scanning electron microscopy (FE-SEM) and high-resolution transmission electron microscopy (HRTEM), capacitance-voltage (C-V) and current-voltage (I-V) measurements were carried out on MIM structures. ZrO₂ films, fabricated by oxidizing the Zr film deposited with substrate bias voltage under UV light irradiation, show the highest capacitance (784 pF) and the lowest leakage current density. The active oxygen species formed by UV irradiation are considered to play an important role in the reduction of the leakage current density, because they can reduce the density of oxygen vacancies.     

Correlation between barrier heights and ideality factors of Cd/n-Si and Cd/p-Si Schottky barrier diodes

Our goal is to experimentally investigate whether or not the effective Schottky barrier heights (SBHs) and ideality factors obtained from the current-voltage (I-V) and capacitance-voltage (C-V) characteristics differ from diode to diode even if the samples were identically prepared. For this purpose, we prepared Cd/n-Si (33 dots) and Cd/p-Si (15 dots) diodes. The SBH for the Cd/n-Si diodes ranged from 0.701 to 0.605 eV, and ideality factor n from 1.913 to 1.213. Φ_b value for the Cd/p-Si diodes ranged from 0.688 to 0.730 eV, and ideality factor n value from 1.473 to 1.040. The experimental SBH distributions obtained from the C⁻²-V and I-V characteristics were fitted by a Gaussian function and their mean SBH values were calculated. Furthermore, the laterally homogeneous barrier heights were also computed from the extrapolation of the linear plot of experimental barrier heights versus ideality factors.     

Electric characterization of GaAs deposited on porous silicon by electrodeposition technique

GaAs thin films were synthesized on porous Si substrate by the electrodeposition technique. The X-ray diffraction studies showed that the as-grown films were crystallised in mixed phase nature orthorhombic and cubic of GaAs. The GaAs film was then electrically characterized using current-voltage (I-V) and capacitance-voltage (C-V) techniques by the way of Al/GaAs Shottky junctions. The electric analysis allowed us to determine the n factor and the barrier height Ф_b0 parameters of Al/GaAs Schottky junctions. The (C-V) characteristics were recorded at frequency signal 1 MHz in order to identify the effect of the surface states on the behaviour of the capacitance of the device.     

Fabrication and electrical characterization of nanocrystalline ZnO/Si heterojunctions

Nanocrystalline zinc oxide (nc-ZnO) films were prepared by a sol-gel process on p-type single-crystalline Si substrates to fabricate nc-ZnO/p-Si heterojunctions. The structure and morphology of ZnO films on Si substrates, which were analyzed by X-ray diffraction (XRD) spectroscopy and atomic force microscopy (AFM), showed that ZnO films consisted of 50-100 nm polycrystalline nanograins with hexagonal wurtzite structure. The electrical transport properties of the nc-ZnO/p-Si heterojunctions were investigated by temperature-dependent current-voltage (I-V) measurements and room temperature capacitance-voltage measurements. The temperature-dependent I-V characteristics revealed that the forward conduction was determined by multi-step tunneling current, and the activation energy of saturation current was about 0.26 eV. The 1/C²-V plots indicated the junction was abrupt and the junction built-in potential was 1.49 V at room temperature.     

Electronic and interface state density distribution properties of Ag/p-Si Schottky diode

Electronic and interface state distribution properties of Ag/p-Si Schottky diode have been investigated. The diode indicates non-ideal current-voltage behavior with an ideality factor greater than unity. The capacitance-voltage (C-V) characteristic is linear in reverse bias indicating rectification behavior and charge density within depletion layer is uniform. From I-V and C-V characteristics, junction parameters such as diode ideality factor and barrier height were found as 1.66 and ?_B(I-V) = 0.84 eV (?_B(C-V) = 0.90 eV), respectively. The interface state density N_ss and relaxation time τ of the Schottky diode were determined by means of Schottky capacitance spectroscopy method. The results show the presence of thin interfacial layer between the metal and semiconductor.     

Application of the chemical vapor-etching in polycrystalline silicon solar cells

This paper reports a study of the application of chemical vapor-etching (CVE) for the rear surface and in the emitter of polycrystalline silicon (pc-Si) solar cells. The CVE technique consists of exposing pc-Si wafers to a mixture of HF/HNO₃. This technique is used to groove the rear surface of the pc-Si wafers for acid vapors rich in HNO₃ (HNO₃/HF > 1/4), in order to realize rear-buried metallic contacts (RBMC) and the formation of a porous silicon (PS) layer on the frontal surface of the cell for volume ratio of HNO₃/HF = 1/7. A significant increase of the spectral response in the long wavelength range was observed when a RBMC is formed. This increase was attributed to the reduction of the effective thickness of the base of the cells and grain boundary Al gettering. The achievement of a PS layer on the emitter of the pc-Si cells passivates the surface and reduces the reflectivity. The dark I-V characteristics of pc-Si cells with emitter-based PS show an important reduction of the reverse current together with an improvement of the rectifying behaviour. The I-V characteristic under AM1.5 illumination shows an enhancement of both short circuit current density and fill factor. The internal quantum efficiency is improved, particularly in the short wavelengths region.     

A note on TiN/Si (1 0 0) contacts

The contact properties of TiN on p- and n-type Si (1 0 0) obtained by magnetron reactive sputtering were investigated. Schottky diode characteristics were observed on p-type Si (1 0 0) as determined by forward current-voltage (I-V) measurements, but on n-type Si (1 0 0) the reverse I-V relation has shown a nonsymmetrical character. The zero-bias barrier heights evaluated by I-V on both type diodes were in the range of ∼0.60-0.64 V within the range of a few mVs, not more than ∼±(10-30) mV from each other. Incorporation of the effect of the series resistance in the I-V analysis resulted in a significant reduction in the magnitude of the ideality factor of the TiN/p-type specimen. Almost no change has occurred in the barrier height values. The contradictory reports on the TiN/n-type Si (1 0 0) diode characteristics in earlier works have been explained in terms of surface passivation of Si by the HF cleaning solution. It was stated in these reports that following annealing at 673 K the diodes have shown rectifying behavior. It has been speculated, that the nonsymmetrical nature of the TiN/n-Si (1 0 0) showing an intermediate behavior between Ohmic and rectifying behavior is a result of the specimen being exposed to a temperature lower than 673 K during sputtering where no complete depassivation took place. In order to obtain a rectifying behavior of TiN on both n-type and p-type Si surface passivation has to be eliminated.     

Comparison of electrical parameters of Zn/p-Si and Sn/p-Si Schottky barrier diodes

In this study, current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-semiconductor (MS) Zn/p-Si and Sn/p-Si Schottky diodes, with high resistivity silicon structures, are investigated. The parameters of series resistance (R_S), the ideality factor (n) and the barrier height (Φ_b) are determined by performing different plots from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Thus, the barrier heights (Φ_b) for the Si Schottky diodes obtained between 0.725 and 1.051 eV, the ideality factor (n) between 1.043 and 1.309, and the series resistance (R_S) between 12.594 and 12.950 kΩ. The energy distribution of interface states density was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. It was concluded that the density of interface states in the considered energy range are in close agreement with each other values obtained for Zn/p-Si and Sn/p-Si Schottky diodes.     

Electrical characterization of p-ZnO/p-Si heterojunction

Nitrogen doped p-ZnO film, with urea as nitrogen source, is fabricated by pulsed laser deposition on well-cleaned p-type (1 0 0) Si substrates. The structural and electrical properties of the p-p heterojunction are investigated by current-voltage (I-V) and capacitance-voltage (C-V) measurements. It shows a diode-like behavior with turn-on voltage of 0.5 V. The ideality factor η determined by applying positive potential in p-ZnO and negative potential along p-Si is found to be 6. Such a high value of η is attributed to lattice mismatch between ZnO and Si. and other factors responsible are thermoionic emission, minority carrier injection and recombination. C-V results indicate an abrupt interface and a band bending of 0.9 V in the silicon. Heterojunction band diagram for p-ZnO/p-Si is proposed.     

Current-voltage analysis of a-Si:H Schottky diodes

Direct current (dc)-voltage (I-V) characteristics of the hydrogenated amorphous silicon (a-Si:H) Schottky diode have been measured at different temperatures under dark and light. From the fourth quadrant of illuminated characteristics, fill factor (FF) values were obtained for each temperature measured (173-297 K). We have found that FF increases very little as the temperature is decreased. The measured data from I-V characteristics has been analyzed in detail. In particular, from dark I-V characteristics obtained, the density of state (DOS) near the Fermi level was determined using a simple model based on the space-charge limited current (SCLC). On the other hand, from the illuminated I-V characteristics, the density of carriers was calculated for each temperature using the analysis of diode equation as known. A comparison of the carrier density and the measured photocurrent as a function of the reverse temperature was also made and a good correspondence was obtained.     

Fabrication and electrical characterization of thermally deposited amorphous Se0.82In0.18 on n-Si (100)

Amorphous (a-) Se_0.82In_0.18 thin films have been deposited onto n-type silicon (n-Si) single crystal, using the three-temperature technique, in the fabricated configuration of Au/a-Se_0.82In_0.18/n-Si/Al. The current density-voltage (J–V) characteristics have been measured at different isotherms in the range of 198–313 K, thus inspecting the conduction mechanisms comparing with Au/a-Se/n-Si/Al heterojunctions. The analysis proved that the forward bias is characterized by two parts: current increasing exponentially with the applied voltage (low voltage bias region, V<0.2 V), and non-exponentially in the higher voltage region (V>0.2 V). At the low bias region, the current was dominated by a multi-tunneling capture-emission process with a rather temperature-independent effect in the temperature range investigated. However, at the high voltage region, the effect of temperature becomes more pronounced with an ohmic character in the range of 198 to 273 K. For temperatures higher than 273 K, and below the glass transition temperature of a-Se_0.82In_0.18 (T _g～330 K), the high voltage region could be subdivided into two parts: an ohmic conduction range that limited at bias voltage of 0.20 V<V<0.46 V, and a space charge limited current region for bias voltage of V>0.46 V. The reverse J–V characteristics showed a deviation from that of the ideal diode behavior, analogous to that of pure a-Se/n-Si heterojunctions.     

Low-temperature oxidation of SiGe by liquid-phase deposition

Low-temperature silicon dioxide (SiO₂) films were grown on silicon germanium (SiGe) surfaces using the liquid-phase deposition (LPD) method. The growth solutions of LPD-SiO₂ are hydrofluorosilicic acid (H₂SiF₆) and boric acid (H₃BO₃). It was found that the growth rate increases with increasing temperature and concentration of H₃BO₃. The Auger electron spectroscopy profile shows that no pileup of Ge atoms occurs at the interface of SiO₂/SiGe after the LPD-SiO₂ growth. Al/LPD-SiO₂/p-SiGe MOS capacitors were prepared to determine capacitance-voltage (C-V) and current-voltage (I-V) characteristics. In our experiments, a low leakage current density of 8.69 × 10⁻⁹ A/cm² under a 2 MV/cm electric field was observed. Such a value is much smaller than those of plasma- and thermal-oxides as a result of no plasma damage and a lower growth temperature. Moreover, lower oxide charges and interface charge densities of 3.82 × 10¹⁰ cm⁻² and 1.12 × 10¹¹ eV⁻¹ cm⁻², respectively, were achieved in our LPD-SiO₂ compared to direct photochemical-vapor-deposition-SiO₂.     

Effect of the oxidation process on SiO2/4H-SiC interface electrical characteristics

In this work we have compared the SiO₂/SiC interface electrical characteristics for three different oxidations processes (dry oxygen, water-containing oxygen and water-containing nitrogen atmospheres). MOS structures were fabricated on 8° off-axis 4H-SiC(0 0 0 1) n- and p-type epi-wafers. Electrical characteristics were obtained by I-V measurements, high-frequency capacitance-voltage (C-V) and ac conductance (G-ω) methods. Comparing the results, one observes remarkable differences between samples which underwent different oxidation routes. Among the MOS structures analyzed, the sample which underwent wet oxidation with oxygen as carrier gas presented the higher dielectric strength and lower values of interface states density.     

The interface reaction of high-k La2Hf2O7/Si thin film grown by pulsed laser deposition

The La₂Hf₂O₇ films have been deposited on Si (1 0 0) substrate by using pulsed laser deposition (PLD) method. X-ray diffraction (XRD) demonstrates that the as-grown film is amorphous and crystallizes after 1000 °C annealing. The interface structure is systematically studied by Synchrotron X-ray reflectivity (XRR), Fourier transform infrared (FTIR) and X-ray photoelectron spectroscopy (XPS). Silicide, silicate and SiO_x formations from interfacial reaction are observed on the surface of the Si substrate in the as-grown film. The impact of silicide formation on the electrical properties is revealed by capacitance-voltage (C-V) measurements. By post-deposition annealing (PDA), silicide can be effectively eliminated and C-V property is obviously improved.     

The effect of interface states, excess capacitance and series resistance in the Al/SiO2/p-Si Schottky diodes

The current-voltage (I-V) characteristics of Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance-voltage (C-V) and conductance-voltage (G-V) measurements are studied at frequency range of 10 kHz-1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO₂ interface. The density of interface states (N_ss) distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) at room temperature for the Schottky diode on the order of ≅4 × 10¹³ eV⁻¹ cm⁻²_. These high values of N_ss were responsible for the non-ideal behaviour of I-V and C-V characteristics. Frequency dispersion in C-V and G-V can be interpreted only in terms of interface states. The N_ss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I-V, C-V and G-V characteristics of SD are affected not only in N_ss but also in series resistance (R_s), and the location of N_ss and R_s has a significant on electrical characteristics of Schottky diodes.     

Electron emission characteristics of Al-AlN granular films

An electron conduction emitter of Al-AlN granular films was proposed for surface conduction electron emission device in this paper. The Al-AlN granular films with thickness of 30 nm were prepared between two co-planar electrodes with gap of 10 μm by magnetron sputtering. After electroforming the Al-AlN granular films, the films’ structure could be recovered by applying the periodic device voltage (V_f). Stable and uniform electron emission was observed with turn-on voltage of 5.3 V and threshold voltage of 9 V. The emitter emission current (I_e) of 4.84 μA for 36 cells was obtained with the anode voltage of 2.5 kV and the device voltage of 12 V. In addition, Fowler-Nordheim plots for I_e-V_f properties showed that the electron emission mechanism should be field emission.     

Studying of barrier height and ideality factor relation in the nano sized Au-n type Si Schottky diodes

The results of formation of the operating potential barrier height (Φ_в) of inhomogeneous Schottky diodes (SD) in view of an additional electric field in the near contact region of the semiconductor and features of its dependence on the external applied voltage are presented. A correlation, between SD heterogeneity and dependence between potential barrier height (Φ_в) and ideality factor (n), is presented. Using conducting probe atomic force microscope (CP-AFM) techniques, it is shown that Au/n-Si diodes consist of sets of parallel-connected and cooperating nano diodes with the contact surfaces sizes in the order of 100-200 nm. The effective Φ_в and ideality factors of the SD have been obtained from the current-voltage (I-V) characteristics, which were measured using a CP-AFM along a contact surface. It was experimentally shown that the forward and reverse part of I-V characteristics and their effective Φ_в and ideality factors of the identically fabricated nano-SD differ from diode to diode. The Φ_в for the nano-SD has ranged from 0.565 to 0.723 eV and ideality factor from 1.11 to 1.98. No correlation can be found between the Φ_в and ideality factor. The Φ_в distribution obtained from the I-V characteristics has been fitted by a Gaussian function but the ideality factor distribution could not be fitted by a Gaussian function.     

Capacitance-voltage measurements on p-n-p InP structures

The electrical properties of p-type layers of indium phosphide (InP) formed by the diffusion of zinc into n-type material were studied by capacitance-voltage measurements. A non-correspondence of atom and carrier concentrations was indicated, confirming previous four-point resistivity and Hall Effect studies. Using several specimens, a typical value of 25 was found from C⁻²-V and C-V curves for the atom/carrier ratio. The dielectric constant of InP was taken to be 11. The width of the depletion region at an intermediate voltage (0.5 V) was typically 0.03 μm. It was concluded that further work on contacting procedures to produce a good Schöttky Barrier at the contact-semiconductor interface should make this technique particularly useful for determining carrier profiles.