0.18μm CMOS工艺栅极氧化膜可靠性的衬底和工艺依存性

用斜坡电压法(Voltage Ramp, V-ramp)评价了0.18μm双栅极 CMOS工艺栅极氧化膜击穿电量(Charge to Breakdown, Q_bd)和击穿电压(Voltage to Breakdown, V_bd). 研究结果表明，低压器件(1.8V)的栅极氧化膜(薄氧)p型衬底MOS电容和N型衬底电容的击穿电量值相差较小，而高压器件(3.3V)栅极氧化膜(厚氧)p衬底MOS电容和n衬底MOS电容的击穿电量值相差较大，击穿电压测试值也发现与击穿电量 关键词： 薄氧 可靠性 击穿电压 击穿电量     

Scanning tunneling microscopy luminescence from nanoscale surface of GaAs(1 1 0)

Scanning tunneling microscopy luminescence (STML) was induced from the nanometer scale surfaces of cleaved n-type and p-type GaAs(1 1 0) wafers by using of an ITO-coated optical fiber probe in an ultrahigh-vacuum chamber. The STML from n-type GaAs(1 1 0) surface was induced under negative sample bias when the applied bias exceeds a threshold voltage around −1.5 V. Whereas the STML from p-type GaAs(1 1 0) surface was induced under positive sample bias when the applied bias exceeds a threshold voltage around +1.5 V. The excitation energies at the threshold voltages are consistent with the band gap of GaAs (1.42 eV) at 295 K. The typical quantum efficiencies for n-type and p-type GaAs are about 3 × 10⁻⁵ and 2 × 10⁻⁴ photons/electron, respectively. The observed STML from are attributed to a radiative recombination of electron-hole pairs generated by a hole injection for n-type GaAs under negative sample bias and an electron injection for p-type GaAs under positive sample bias, respectively.     

Enhanced ESD properties of GaN-based light-emitting diodes with various MOS capacitor designs

High electrostatic discharge (ESD) protection of GaN-based light-emitting diodes (LEDs) has been developed using a metal–oxide semiconductor (MOS) capacitor. This structure is realized by adopting various metal electrode patterns. The MOS capacitor can be implemented by extending the metal line directly from the p-type electrode to the top surface of an SiO₂-capped n-GaN layer near the vicinity of the n-type electrode. By connecting a MOS capacitor in parallel with the GaN-based LED, the negative ESD strike could be significantly increased from 385 to 1075 V of human body mode (HBM).     

Surface redox induced bipolar switching of transition metal oxide films examined by scanning probe microscopy

The bipolar resistive switching mechanisms of a p-type NiO film and n-type TiO₂ film were examined using local probe-based measurements. Scanning probe-based current–voltage (I–V) sweeps and surface potential/current maps obtained after the application of dc bias suggested that resistive switching is caused mainly by the surface redox reactions involving oxygen ions at the tip/oxide interface. This explanation can be applied generally to both p-type and n-type conducting resistive switching films. The contribution of oxygen migration to resistive switching was also observed indirectly, but only in the cases where the tip was in (quasi-) Ohmic contact with the oxide.     

Improved 4H-SiC UMOSFET with super-junction shield region

This article investigates an improved 4H-SiC trench gate metal-oxide-semiconductor field-effect transistor (MOSFET) (UMOSFET) fitted with a super-junction (SJ) shielded region. The modified structure is composed of two n-type conductive pillars, three p-type conductive pillars, an oxide trench under the gate, and a light n-type current spreading layer (NCSL) under the p-body. The n-type conductive pillars and the light n-type current spreading layer provide two paths to and promote the diffusion of a transverse current in the epitaxial layer, thus improving the specific on-resistance ($R_{\rm on,sp}$). There are three p-type pillars in the modified structure, with the p-type pillars on both sides playing the same role. The p-type conductive pillars relieve the electric field ($E$-field) in the corner of the trench bottom. Two-dimensional simulation (silvaco TCAD) indicates that $R_{\rm on,sp }$ of the modified structure, and breakdown voltage ($V_{\rm BR}$) are improved by 22.2% and 21.1% respectively, while the maximum figure of merit (${\rm FOM}=V^{2}_{\rm BR}/R_{\rm on,sp}$) is improved by 79.0%. Furthermore, the improved structure achieves a light smaller low gate-to-drain charge ($Q_{\rm gd}$) and when compared with the conventional UMOSFET (conventional-UMOS), it displays great advantages for reducing the switching energy loss. These advantages are due to the fact that the p-type conductive pillars and n-type conductive pillars configured under the gate provide a substantial charge balance, which also enables the charge carriers to be extracted quickly. In the end, under the condition of the same total charge quantity, the simulation comparison of gate charge and OFF-state characteristics between Gauss-doped structure and uniform-doped structure shows that Gauss-doped structure increases the $V_{\rm BR}$ of the device without degradation of dynamic performance.     

High-performance inverters based on ambipolar organic-inorganic heterojunction thin-film transistors

This work reports on the integration of organic and inorganic semiconductors as heterojunction active layers for highperformance ambipolar transistors and complementary metal-oxide-semiconductor(CMOS)-like inverters. Pentacene is employed as a p-type organic semiconductor for its stable electrical performance, while the solution-processed scandium(Sc) substituted indium oxide(Sc In O) is employed as an n-type inorganic semiconductor. It is observed that by regulating the doping concentration of Sc, the electrical performance of the n-type semiconductor could be well controlled to obtain a balance with the electrical performance of the p-type semiconductor, which is vital for achieving high-performance inverters. When the doping concentration of Sc is 10 at.%, the CMOS-like logic inverters exhibit a voltage gain larger than 80 and a wide noise margin(53% of the theoretical value). The inverters also respond well to the input signal with frequency up to 500 Hz.     

Van der Pauw Hall Measurement on Intended Doped ZnO Films for p-Type Conductivity

A Van der Pauw Hall measurement is performed on the intended doped ZnO films （Na doped ZnO） grown by using the molecular beam epitaxial method. All as-grown samples show n-type conductivity, whereas the annealed samples （annealing temperature 900℃） show ambiguous carrier conductivity type （n- and p-type） in the automatic Van der Pauw Hall measurement. A similar result has been observed in Li doped ZnO and in as-doped ZnO films by other groups before. However, by tracing the Hall voltage in the Van der Pauw Hall measurement, it is found that this alternative appearance of both n- and p-type conductivity is not intrinsic behavior of the intended doped ZnO films, but is due to the persistent photoconductivity effect in ZnO. The persistent photoconductivity effect would strongly affect the accurate determination of the carrier conductivity type of a highly resistive intended doped ZnO sample.     

The effect of subsurface doping on gate oxide charging damage

The effect of wells and substrate type on gate oxide charging damage during plasma processing, and more specifically plasma immersion ion implantation, is modeled. The simulation combines the equations governing the plasma currents and integrated circuit device models to determine the gate oxide stressing voltage during implantation. Depending on the substrate type and the surface potential (V_s), a depletion region may exist, reducing the gate oxide voltage, and hence the gate oxide damage. In addition, well structures, by the nature of their capacitance, modulate V_s, altering the oxide stressing voltage. For most PIII implant conditions, gate oxides with p-type channel doping will be damaged more than those oxides with n-type channel doping. Experimental results confirm the substrate and well effects on plasma charging damage     

THEORETICAL AND EXPERIMENTAL INVESTIGATION ON ANOMALOUS HALL EFFECT OF HETEROGENOUS SEMICONDUCTOR SAMPLES

Based on the theoretical results of inversion layers model and interpenetrating network model, we studied the anomalous Hall effect of heterogenous semiconductor samples, and obtained the following results: (1) the wider the sample energy gap, the higher the temper-ature at which anomalous Hall effect begins to appear; (2) the lower the sample resistivity, the higher the temperature at which anomalous Hall effect begins to appear, which is further verified in our experiment; (3) mobility is the main factor which determines what role p-n junction plays in sample Hall voltage; (4) for n-Ge sample with inversion layers structure, with the increase of p-type region, the Hall effect changes from normal n-type Hall effect to anomalous Hall effect of the single dip type, then to anomalous Hall effect of the second reversal type.     

The influence of electronic transport across interface junction between Si substrate and the root of ZnO micro-prism on field emission performance

ZnO micro-prisms are prepared on the p-type and n-type Si substrates, separately. The $I$--$V$ curves analysed by AFM show that the interface junctions between the ZnO micro-prisms and the p-type substrate and between the ZnO micro-prisms and the n-type Si substrate exhibit p--n junction behaviour and ohmic contact behaviour, respectively. The formation of the p--n heterojunction and ohmic contact is ascribed to the intrinsic n-type conduction of ZnO material. Better field emission performance (lower onset voltage and larger emission current) is observed from an individual ZnO micro-prism grown on the n-type Si substrate. It is suggested that the n-Si/n-ZnO interfacial ohmic contact benefits the electron emission; while the p-Si/n-ZnO interface heterojunction deteriorates the electron emission.     

Thermoelectric generator based on a bismuth-telluride alloy fabricated by addition of ethylene glycol

This paper introduces a new method to selectively fabricate n-type and p-type bismuth (Bi)-telluride (Te) thermoelectric materials by the rate of addition of ethylene glycol (EG) in the Bi–Te co-electrodeposition solution. As the amount of added EG is increased, the atomic ratio of Bi in the deposited Bi–Te alloy reached a slope of 0.463 (at.% of Bi/vol.% of EG), and increased in a linear manner. When the EG content reached approximately 20%v/v, the n-type material changed into a p-type. This change implies that adjusting the EG content in the electrodeposition solution affords simple control of the Bi–Te composition. To demonstrate the applicability of the developed thermoelectric materials, thermoelectric generators (TEGs) were fabricated using electrodeposited n-type (using solution without EG) and p-type (using solution with 30%v/v EG) Bi–Te alloys. The Seebeck voltage of the pair of n-type and p-type thermoelectric materials was 140 mV and the power generated from the pair was 24.36 nW at a 10 °C temperature difference.     

Visible electroluminescence from p-n junction porous Si diode with a polyaniline film contact

We have fabricated a light emitting diode using a p-type conducting polyaniline layer deposited on a n-type porous silicon (PS) layer. The contact formed between a p-type conducting polyaniline layer and a n-type PS wafer has rectified behaviour demonstrated clearly by the I-V curves. The series resistance Rs in the p-type conducting polyaniline/n-PS diode is reduced greatly and has a lower onset voltage compared with ITO/n-PS diode. The PS has an orange photoluminescence (PL) band after coating with polyaniline. Visible electroluminescence (EL) has been obtained from this junction when a forward bias is applied. The emission band is very broad extending from 600-803 nm with a peak at 690 nm.     

On the frequency-dependence of the impedance of n- and p-type gallium arsenide electrodes

The impedance of n- and p-type GaAs electrodes has been studied as a function of applied voltage and of frequency. Simple frequency laws were found to exist for the series capacitance and resistance. To explain these laws, a distribution of time constants has been assumed, associated with dielectric relaxation phenomena in the double-layer at the semiconductor/electrolyte interface. This distribution was found to be independent of the distance from the crystal surface for n-type samples but to depend upon it for p-type specimens. An investigation on the role of the applied voltage in these frequency laws yielded additional evidence for the mathematical model which was originally introduced in a previous paper in order to explain similar laws observed at CdSe, CdS and TiO₂ electrodes. The frequency-dispersion of the p-type samples was found to be strongly influenced by an appropriate pretreatment of the surface, in contrast with the behaviour of the n-type specimens. In both cases, the experimental results indicate that the source of the frequency dispersion has to be sought in structural irregularities of the depletion region of the electrode. The possibility of determining the flat-band potential from frequency-dependent impedance data is discussed.     

A 4H-SiC trench MOSFET structure with wrap N-type pillar for low oxide field and enhanced switching performance

An optimized silicon carbide (SiC) trench metal-oxide-semiconductor field-effect transistor (MOSFET) structure with side-wall p-type pillar (p-pillar) and wrap n-type pillar (n-pillar) in the n-drain was investigated by utilizing Silvaco TCAD simulations. The optimized structure mainly includes a p$+$ buried region, a light n-type current spreading layer (CSL), a p-type pillar region, and a wrapping n-type pillar region at the right and bottom of the p-pillar. The improved structure is named as SNPPT-MOS. The side-wall p-pillar region could better relieve the high electric field around the p$+$ shielding region and the gate oxide in the off-state mode. The wrapping n-pillar region and CSL can also effectively reduce the specific on-resistance ($R_{\rm on,sp}$). As a result, the SNPPT-MOS structure exhibits that the figure of merit (FoM) related to the breakdown voltage ($V_{\rm BR}$) and $R_{\rm on,sp}$ ($V_{\rm BR}^{2}R_{\rm on,sp}$) of the SNPPT-MOS is improved by 44.5%, in comparison to that of the conventional trench gate SJ MOSFET (full-SJ-MOS). In addition, the SNPPT-MOS structure achieves a much faster-witching speed than the full-SJ-MOS, and the result indicates an appreciable reduction in the switching energy loss.     

Commensurate spin dynamics in the superconducting state of an electron-doped cuprate superconductor

We report neutron scattering studies on two single crystal samples of the electron-doped (n-type) superconducting (SC) cuprate Nd2-xCexCuO4 (x=0.15) with T(c)=18 and 25 K. Unlike the hole-doped (p-type) SC cuprates, where incommensurate magnetic fluctuations commonly exist, the n-type cuprate shows commensurate magnetic fluctuations at the tetragonal (1/2 1/2 0) reciprocal points both in the SC and in the normal state. A spin gap opens up when the n-type cuprate becomes SC, as in the optimally doped p-type La2-xSrxCuO4. The gap energy, however, increases gradually up to about 4 meV as T decreases from T(c) to 2 K, which contrasts with the spin pseudogap behavior with a T-independent gap energy in the SC state of p-type cuprates.     

Fabrication and characterization of Fe-doped titania semiconductor electrodes with p-n homojunction devices

The nano-TiO₂ electrode with a p-n homojunction device was designed and fabricated by coating of the Fe³⁺-doped TiO₂ (p-type) film on top of the nano-TiO₂ (n-type) film. These films were prepared from synthesized sol-gel TiO₂ samples which were verified as anatase with nano-size particles. The semiconductor characteristics of the p-type and n-type films were demonstrated by current-voltage (I-V) measurements. Results show that the rectifying curves of undoped TiO₂ and Fe³⁺-doped TiO₂ sample films were observed from the I-V data illustration for both the n-type and p-type films. In addition, the shapes of the rectifying curves were influenced by the fabrication conditions of the sample films, such as the doping concentration of the metal ions, and thermal treatments. Moreover, the p-n homojunction films heating at different temperatures were produced and analyzed by the I-V measurements. From the I-V data analysis, the rectifying current of this p-n junction diode has a 10 mA order higher than the current of the n-type film. The p-n homojunction TiO₂ electrode demonstrated greater performance of electronic properties than the n-type TiO₂ electrode.     

P–n junction characteristics of graphene oxide and reduced graphene oxide on n-type Si(111)

The semiconductor behavior of graphene oxide (GO) and reduced graphene oxide (RGO) synthesized by the Hummers method on n-type Si(111) were investigated. Graphene oxide is a product of the oxidation of graphite, during which numerous oxygen functional groups bond to the carbon plane during oxidation. RGO was prepared by adding excess hydrazine to the GO showing p-type semiconductor material behavior. In the C–O bond, the O atom tends to pull electrons from the C atom, leaving a hole in the carbon network. This results in p-type semiconductor behavior of GO, with the carrier concentration dependent upon the degree of oxidation. The RGO was obtained by removing most of the oxygen-containing functionalities from the GO using hydrazine. However, oxygen remaining on the carbon plane caused the RGO to exhibit p-type behavior. The I–V characteristics of GO and RGO deposited on n-type Si(111) forming p–n junctions exhibited different turn-on voltages and slope values.     

Raman scattering studies of monolayer-thickness oxide and tellurium films on PbSnTe

Raman backscattering spectra from fractured and etched surfaces of PbTeSnTe alloys have been studied and compared with X-ray photoelectron spectroscopy (XPS) analysis of the surfaces. For samples freshly broken in air or suitably etched electrolytically, the spectra are identified with very thin (?monolayer) films of oxide, chemically as TeO₂. For samples etched in HNO₃ and HCl and for as-grown epi-films the spectra are identified with thin films of elemental tellurium. On n-type material, the surface oxide spectrum is found to change with time after fracture going from an initial rapidly formed TeO₂ spectrum, similar to that of p-type material, to a spectrum identified with a mixture of Pb and Te oxides.     

Structural comparison of n-type and p-type LaAlO3/SrTiO3 interfaces

Using a surface x-ray diffraction technique, we investigated the atomic structure of two types of interfaces between LaAlO3 and SrTiO3, that is, p-type (SrO/AlO2) and n-type (TiO2/LaO) interfaces. Our results demonstrate that the SrTiO3 in the sample with the n-type interface has a large polarized region, while that with the p-type interface has a limited polarized region. In addition, atomic intermixing was observed to extend deeper into the SrTiO3 substrate at the n-type interface compared to the p type. These differences result in distinct degrees of band bending, which likely contributes to the striking contrast in electrical conductivity between the two types of interfaces.     

不同Sb含量p-SnO2薄膜的制备和特性

采用化学气相沉积方法, 利用Sb₂O₃/SnO作为源材料, 在蓝宝石衬底上制备出不同Sb掺杂量的SnO₂薄膜, 并在此基础上制作出p-SnO₂:Sb/n-SnO₂同质p-n 结器件. 研究表明, 随着Sb含量的增加, 样品表面变得平滑, 晶粒尺寸逐渐增大, 且晶体质量有所改善, 发现少量Sb的掺入可以起到表面活化剂的作用. Hall测量结果证实适量Sb的掺杂可以使SnO₂呈现p型导电特性, 当Sb₂O₃/SnO的质量比为1:5时, 其电学参数为最佳值. 此外, p-SnO₂:Sb/n-SnO₂同质p-n结器件展现出良好的整流特性, 其正向开启电压为3.4 V.