The effects of annealing on Au/pyronine-B/MD n-InP Schottky structure

Thin film of non-polymeric organic compound pyronine-B has been fabricated on moderately doped (MD) n-InP substrate as an interfacial layer using spin coating technique for the electronic modification of Au/MD n-InP Schottky contact. The electrical characteristics have been determined at room temperature. The barrier height and the ideality factor values for Au/pyronine-B/MD n-InP Schottky diode have been obtained from the forward bias I-V characteristics at room temperature as 0.60 eV and 1.041; 0.571 and 1.253 eV after annealing at 100 and 250 °C, respectively. An increase in annealing temperature at the Au/n-InP Schottky junction is shown to increase the reverse bias leakage current by about one order of magnitude and decrease the Schottky barrier height by 0.027 eV. Furthermore, the barrier height values for the Au/pyronine-B/MD n-InP Schottky diode have also been obtained from the C-V characteristics at room temperature as 1.001 and 0.709 eV after annealing at 100 and 250 °C, respectively. Finally, it was seen that the diode parameters changed with increase in the annealing temperature.     

Correlation between barrier heights and ideality factors of Cd/n-Si and Cd/p-Si Schottky barrier diodes

Our goal is to experimentally investigate whether or not the effective Schottky barrier heights (SBHs) and ideality factors obtained from the current-voltage (I-V) and capacitance-voltage (C-V) characteristics differ from diode to diode even if the samples were identically prepared. For this purpose, we prepared Cd/n-Si (33 dots) and Cd/p-Si (15 dots) diodes. The SBH for the Cd/n-Si diodes ranged from 0.701 to 0.605 eV, and ideality factor n from 1.913 to 1.213. Φ_b value for the Cd/p-Si diodes ranged from 0.688 to 0.730 eV, and ideality factor n value from 1.473 to 1.040. The experimental SBH distributions obtained from the C⁻²-V and I-V characteristics were fitted by a Gaussian function and their mean SBH values were calculated. Furthermore, the laterally homogeneous barrier heights were also computed from the extrapolation of the linear plot of experimental barrier heights versus ideality factors.     

Thermal stability study of palladium and cobalt Schottky contacts on n-Ge (1 0 0) and defects introduced during contacts fabrication and annealing process

Palladium (Pd) and cobalt (Co) Schottky barrier diodes were fabricated on n-Ge (1 0 0). The Pd-Schottky contacts were deposited by resistive evaporation while the Co-contacts were deposited by resistive evaporation and electron beam deposition. Current-voltage (I-V), capacitance-voltage (C-V) and deep level transient spectroscopy (DLTS) measurements were performed on as-deposited and annealed samples. Electrical properties of Pd and Co samples annealed between 30 and 600 °C indicate the formation of one phase of palladium germanide and two phases of cobalt germanide. No defects were observed for the resistively evaporated as-deposited Pd-and Co-Schottky contacts. A hole trap at 0.33 eV above the valence band was observed on the Pd-Schottky contacts after annealing at 300 °C. An electron trap at 0.37 eV below the conduction band and a hole trap at 0.29 eV above the valence band was observed on as-deposited Co-electron beam deposited Schottky contacts. Rutherford back scattering (RBS) technique was also used to characterise the Co-Ge, for as-deposited and annealed samples.     

C-V analysis of rapidly thermal annealed SF6 plasma treated AlGaN/GaN heterostructures

We studied influence of rapid thermal annealing on electrical parameters of SF₆ plasma treated AlGaN/GaN heterostructures. The main emphasis by the evaluation was laid on C-V measurement and simulation, but also I-V and SIMS measurement were used. It was found that the diminished sheet carrier concentration of a two-dimensional electron gas after plasma treatment recovered significantly at the temperature of 500 °C. By using C-V measurement, it was possible to assess besides the changes of the two-dimensional electron gas concentration after annealing also the changes in the Schottky barrier heights and to find out the doping concentration in AlGaN barrier and GaN channel layer. The trend in Schottky barrier height changes after annealing was confirmed also by I-V measurement.     

Annealing and measurement temperature dependence of W2B5-based rectifying contacts to n-GaN

The thermal stability and measurement temperature dependence of Schottky contact characteristics on n-GaN using a W₂B₅/Ti/Au metallization scheme was studied using current-voltage (I-V), scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) measurements. The elemental profile obtained from samples annealed at 350 °C showed some titanium diffusion into the gold layer but little other difference from the as-deposited wafer. Annealing at 700 °C produced significant diffusion of titanium. The Schottky barrier height increased with anneal temperature up to 200 °C, reaching a maximum value of 0.65 eV, but decreased at higher annealing temperatures. The reverse breakdown voltage from diodes fabricated using the W₂B₅-based contacts showed a similar dependence. The reverse current magnitude was larger than predicted by thermionic emission alone. The barrier height showed only minor changes with measurement temperature up to 150 °C.     

Investigation of the effects of porous layer on the electrical properties of Pt/n-GaN Schottky contacts

This article reports the effects of porosity on the enhancement of the Schottky barrier height (SBH) and reduction of the leakage current of Pt Schottky diode based on n-type GaN. The porous GaN layer in this work was generated by electroless chemical etching under UV illumination. For comparative study, two additional samples, i.e. one as-grown sample and one thermally treated sample, were also prepared. The structural studies showed that the porous GaN sample has a relatively rough surface morphology with slightly broader X-ray diffraction peak of the (0 0 0 2) plane. The current-voltage (I-V) measurements revealed that the electrical characteristics of the Pt Schottky diode were improved significantly by the presence of the porous layer, in which SBH was observed to be enhanced by 27%.     

Nonideality of Au/Si and Au/GaAs Schottky barriers due to process-induced defects

A mechanism of local lowering of the Schottky barrier height (SBH) is proposed, which causes nonideality in nearly ideal Au/n-Si and Au/n-GaAs Schottky barriers. Positively ionized defects generated by the process very close to the interface induce electrons in the metal-induced gap states (MIGS) and lower the SBH locally. The spatial density distribution of the ionized defects obtained from the SBH distribution is determined by the unique interaction with the MIGS. The defects are considered to have the negative-U property and are neutralized at very close positions to the MIGS. The potential distributions close to the interface have a considerable potential drop due to the large defect density. These inhomogeneous potentials are coincident with the energy level scheme of the defect identified as the defect causing the nonideality. This defect is Si self-interstitial in Au/Si SB, and As antisite in Au/n-GaAs SB. This MIGS with process-induced defect model supersedes the previously proposed two major Fermi level pinning models. The mystery of the T₀ effect is solved. The thermionic-field emission current taking place in the strong electric field has influence on the I-V characteristics at low temperatures. Regarding the C-V characteristics of Au/Si SB, the observed extra capacitance under the forward bias is an experimental evidence in accordance with the proposed model.     

Annealing temperature effect on the structural, optical and electrical properties of ZnS thin films

Zinc sulfide thin films were prepared on glass substrates at room temperature using a chemical bath deposition method. The obtained films were annealed at temperatures ranging from 100 to 500 °C in steps of 100 °C for 1 h. The films were characterized by X-ray diffraction (XRD), Raman spectroscopy, energy dispersive X-ray analysis (EDX), optical absorption spectra, and electrical measurements. X-ray diffraction analysis indicates that the deposited films have an amorphous structure, but after being annealed at 500 °C, they change to slightly polycrystalline. The optical constants such as the refractive index (n_r), the extinction coefficient (k), and the real (ε₁) and imaginary (ε₂) parts of the dielectric constant are calculated depending on the annealing temperature. Aside from the ohmic characteristics of the I-V curve, a nonlinear I-V curve owing to the Schottky contact is also found, and the barrier heights (?_bn) for Au/n-ZnS and In/n-ZnS heterojunctions are calculated. The conductivity type was identified by the hot-probe technique.     

Schottky barrier properties of various metal (Zr, Ti, Cr, Pt) contact on p-GaN revealed from I-V-T measurement

Schottky barrier contact using three different metal (Zr, Ti, Cr and Pt) and Ohmic contact using Ni were made on same epitaxial growth layer of p-GaN. Measurements were carried out using current-voltage-temperature (I-V-T) in the range of 27-100°C. Under forward bias and room-temperature (RT), the ideality factors (η) were determined to be 2.38, 1.82, 1.51 and 2.63, respectively, for Zr, Ti, Cr and Pt. The Schottky barrier height (SBH) and effective Richardson coefficient A^** were measured through modified Norde plot as one of the analysis tools. Barrier heights of 0.84, 0.82, 0.77 and 0.41 eV for Zr, Ti, Cr and Pt, respectively, were obtained from the modified Norde plot. Schottky barrier heights of Zr, Ti, or Cr/p-GaN were also measured through activation energy plot, and determined to be in the same range (∼0.87 eV) and Pt at 0.49 eV. These results indicate that the Fermi level seems to be pinned due to the value of slope parameter (S) was very low (S = −0.25).     

Characterization of the low temperature dopant activation behavior at NiSi/silicon interface formed by implant into silicide method

Process temperature and thermal budget control are very important for high-k dielectric device manufacturing. This work focuses on the characteristics of low temperature activated nickel silicide/silicon (M/S) interface formed by implant into silicide (IIS) method. By combining SIMS, C-V, I-V, and AFM measurements in this work, it provides a clear picture that the high dopant activation ratio can be achieved at low temperature (below 600 °C) by IIS method. From SIMS and C-V measurements, high dopant activation behavior is exhibited, and from I-V measurement, the ohmic contact behavior at the M/S junction is showed. AFM inspection displays that under 2nd RTA 700 °C 30 s no agglomeration occurs. These results suggest that IIS method has the potential to integrate with high-k dielectric due to its low process temperature. It gives an alternate for future device integration.     

Current transport mechanism in Al/Si3N4/p-Si (MIS) Schottky barrier diodes at low temperatures

The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-insulator-semiconductor (Al/Si₃N₄/p-Si) Schottky barrier diodes (SBDs) were measured in the temperature range of 80-300 K. By using the thermionic emission (TE) theory, the zero-bias barrier height Φ_B0 calculated from I-V characteristics was found to increase with increasing temperature. Such temperature dependence is an obvious disagreement with the negative temperature coefficient of the barrier height calculated from C-V characteristics. Also, the ideality factor decreases with increasing temperature, and especially the activation energy plot is nonlinear at low temperatures. Such behaviour is attributed to Schottky barrier inhomogeneties by assuming a Gaussian distribution of barrier heights (BHs) at interface. We attempted to draw a Φ_B0 versus q/2kT plot to obtain evidence of a Gaussian distribution of the BHs, and the values of Φ_Bo = 0.826 eV and α_o = 0.091 V for the mean barrier height and standard deviation at zero-bias, respectively, have been obtained from this plot. Thus, a modified ln(I_o/T²) − q²σ_o²/2(kT)² versus q/kT plot gives Φ_B0 and Richardson constant A^* as 0.820 eV and 30.273 A/cm² K², respectively, without using the temperature coefficient of the barrier height. This value of the Richardson constant 30.273 A/cm² K² is very close to the theoretical value of 32 A/cm² K² for p-type Si. Hence, it has been concluded that the temperature dependence of the forward I-V characteristics of the Al/Si₃N₄/p-Si Schottky barrier diodes can be successfully explained on the basis of TE mechanism with a Gaussian distribution of the barrier heights. In addition, the temperature dependence of energy distribution of interface state density (N_SS) profiles was determined from the forward I-V measurements by taking into account the bias dependence of the effective barrier height and ideality factor.     

Prediction of barrier inhomogeneities and carrier transport in Ni-silicided Schottky diode

Based on Quantum Mechanical (QM) carrier transport and the effects of interface states, a theoretical model has been developed to predict the anomalous current-voltage (I-V) characteristics of a non-ideal Ni-silicided Schottky diode at low temperatures. Physical parameters such as barrier height, ideality factor, series resistance and effective Richardson constant of a silicided Schottky diode were extracted from forward I-V characteristics and are subsequently used for the simulation of both forward and reverse I-V characteristics using a QM transport model in which the effects of interface state and bias dependent barrier reduction are incorporated. The present analysis indicates that the effects of barrier inhomogeneity caused by incomplete silicide formation at the junction and the interface states may change the conventional current transport process, leading to anomalous forward and reverse I-V characteristics for the Ni-silicided Schottky diode.     

Characterization of the low temperature activated N/P junction formed by implant into silicide method

Shallow junction formation and low thermal budget control are important for advanced device manufacturing. Implant into silicide (IIS) method is a candidate to achieve both requirements. In this work we show that the high activation ability of the implant into nickel silicide method at low activated temperature is strongly related to the solid phase epitaxial regrowth (SPER) process. The SIMS, capacitance-voltage (C-V), four points probe (FPP), and current-voltage (I-V) measurements are combined to demonstrate that the SPER process of the IIS method is starting from the silicide/silicon (M/S) interface. The best N⁺/P interface is formed when SPER is complete. After SPER process finished, additional thermal budget may cause junction performance degradation at the temperature higher than 550 °C.     

Inhomogeneities in 130 MeV Au ion irradiated Au/n-Si (1 0 0) Schottky structure

The electrical characteristics of Au/n-Si (1 0 0) Schottky rectifier have been studied in a wide irradiation fluence range using conventional current-voltage (I-V) and capacitance-voltage (C-V) measurements. The I-V characteristics showed an abnormal increase in forward current at low voltage. The device shows a bend in forward I-V and reverses bias C-V characteristics due to extra current, suggesting that there are two independent contributions to thermionic current, corresponding to two levels of the Schottky barrier. It is shown that the excess current at low voltage can be explained by taking into account the role of heavy ion irradiation induced defects at the metal semiconductor interface.     

Molecular control over Ag/p-Si diode by organic layer

Electrical transport properties of Ag metal-fluorescein sodium salt (FSS) organic layer-silicon junction have been investigated. The current-voltage (I-V) characteristics of the diode show rectifying behavior consistent with a potential barrier formed at the interface. The diode indicates a non-ideal I-V behavior with an ideality factor higher than unity. The ideality factor of the Ag/FSS/p-Si diode decreases with increasing temperature and the barrier height increases with increasing temperature. The barrier height (φ_b=0.98 eV) obtained from the capacitance-voltage (C-V) curve is higher than barrier height (φ_b=0.72 eV) derived from the I-V measurements. The barrier height of the Ag/FSS/p-Si Schottky diode at the room temperature is significantly larger than that of the Ag/p-Si Schottky diode. It is evaluated that the FSS organic layer controls electrical charge transport properties of Ag/p-Si diode by excluding effects of the SiO₂ residual oxides on the hybrid diode.     

Comparison of electrical parameters of Zn/p-Si and Sn/p-Si Schottky barrier diodes

In this study, current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-semiconductor (MS) Zn/p-Si and Sn/p-Si Schottky diodes, with high resistivity silicon structures, are investigated. The parameters of series resistance (R_S), the ideality factor (n) and the barrier height (Φ_b) are determined by performing different plots from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Thus, the barrier heights (Φ_b) for the Si Schottky diodes obtained between 0.725 and 1.051 eV, the ideality factor (n) between 1.043 and 1.309, and the series resistance (R_S) between 12.594 and 12.950 kΩ. The energy distribution of interface states density was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. It was concluded that the density of interface states in the considered energy range are in close agreement with each other values obtained for Zn/p-Si and Sn/p-Si Schottky diodes.     

Effect of annealing on the electronic parameters of Au/poly(ethylmethacrylate)/n-InP Schottky diode with organic interlayer

A thin poly(ethylmethacrylate) (PEMA) layer is deposited on n-InP as an interlayer for electronic modification of Au/n-InP Schottky structure. The electrical properties of Au/PEMA/n-InP Schottky diode have been investigated by current–voltage (I–V) and capacitance–voltage (C–V) measurements at different annealing temperatures. Experimental results show that Au/PEMA/n-InP structure exhibit a good rectifying behavior. An effective barrier height as high as 0.83 eV (I–V) and 1.09 eV (C–V) is achieved for the Au/PEMA/n-InP Schottky structure after annealing at 150 °C compared to the as-deposited and annealed at 100 and 200 °C. Modified Norde's functions and Cheung method are also employed to calculate the barrier height, series resistance and ideality factors. Results show that the barrier height increases upon annealing at 150 °C and then slightly decreases after annealing at 200 °C. The PEMA layer increases the effective barrier height of the structure as this layer creates a physical barrier between the Au metal and the n-InP. Terman's method is used to determine the interface state density and it is found to be 5.141 × 10¹² and 4.660 × 10¹² cm^?2 eV^?1 for the as-deposited and 200 °C annealed Au/PEMA/n-InP Schottky diodes. Finally, it is observed that the Schottky diode parameters change with increasing annealing temperature.     

Temperature dependence of the current-voltage characteristics of the Al/Rhodamine-101/p-Si(1 0 0) contacts

The current-voltage (I-V) characteristics of Al/Rhodamine-101/p-Si/Al contacts have been measured at temperatures ranging from 280 to 400 K at 20 K intervals. A barrier height (BH) value of 0.817 eV for the Al/Rh101/p-Si/Al contact was obtained at the room temperature that is significantly larger than the value of 0.58 eV of the conventional Al/p-Si Schottky diode. While the barrier height Φ_b0 decreases the ideality factors (n) become larger with lowering temperature. The high values of n depending on the sample temperature may be ascribed to decrease of the exponentially increase rate in current due to space-charge injection into Rh101 thin film at higher voltage. Therefore, at all temperatures, it has been seen that the I-V characteristics show three different regions, the ohmic behavior at low voltages, and the space charge limited current with an exponential distribution of traps at high voltages.     

The dependence of barrier height on temperature for Pd Schottky contacts on ZnO

Temperature dependent current-voltage (I-V) and capacitance-voltage (C-V) measurements have been performed on Pd/ZnO Schottky barrier diodes in the range 60-300 K. The room temperature values for the zero bias barrier height from the I-V measurements (Φ_I-V) was found to be 0.52 eV and from the C-V measurements (Φ_C-V) as 3.83 eV. From the temperature dependence of forward bias I-V, the barrier height was observed to increase with temperature, a trend that disagrees with the negative temperature coefficient for semiconductor material. The C-V barrier height decreases with temperature, a trend that is in agreement with the negative temperature coefficient of semiconductor material. This has enabled us to fit two curves in two regions (60-120 K and 140-300 K). We have attributed this behaviour to a defect observed by DLTS with energy level 0.31 eV below the conduction band and defect concentration of between 4×10¹⁶ and 6×10¹⁶ cm⁻³ that traps carriers, influencing the determination of the barrier height.     

Study of nickel silicide formation on Si(1 1 0) substrate

Nickel silicide formation on Si(1 1 0) and Si(1 0 0) substrate was investigated in this paper. It is confirmed that nickel monosilicide (NiSi) starts to form after 450 °C annealing for Si(1 0 0) substrate, but a higher annealing temperature is required for NiSi formation on Si(1 1 0) substrate, which is demonstrated by X-ray diffraction (XRD) and Raman scattering spectroscopy. The higher formation temperature of NiSi is attributed to the larger Ni₂Si grain size formed on Si(1 1 0) substrate. Ni silicided Schottky contacts on both Si(1 0 0) and Si(1 1 0) substrates were also fabricated for electrical characteristics evaluation. It clearly reveals that the rectifying characteristics of NiSi/n-Si(1 1 0) Schottky contacts is inferior to that of NiSi/n-Si(1 0 0) Schottky contacts, which is attributed to a lower Schottky barrier height and a rougher contact interface. The formation kinetics for nickel silicide on Si(1 1 0) substrate is also discussed in this paper.