Structure and transport mechanisms of Si/porous Si n-p junctions prepared by liquid phase epitaxy

Heterojunction devices of n-Si/p-PSi were fabricated by growing n-Si films onto p-type porous Si substrates by liquid phase epitaxy. The structure of the grown films was checked using scanning electron microscopy and X-ray diffraction spectroscopy. X-ray diffraction measurements showed that the grown films have monocrystalline structure oriented along (1 1 1) direction with mainly cubic phase. Current-voltage (I-V) and capacitance-voltage (C-V) characteristics were measured over the temperature range from 298 to 398 K. The analysis of the dark I-V characteristics of n-Si/p-PSi at several temperatures is done to elucidate the conduction mechanisms and the evaluation of the heterojunction parameters is presented. Two carrier transport mechanisms are believed to be at the origin of the forward current. At low bias voltage (V ≤ 0.4 V) the forward current is dominated by the recombination at the porous silicon side of the space charge region. In the 0.5 V ≤ V ≤ 1.4 V region, the current transport is due to the space charge—limited current mechanism dominated by a single trapping level of energy 0.41 eV. The reverse current is considered to be mainly generated in the depletion region of the porous silicon. The capacitance-voltage results confirm an abrupt junction with a homogenous distribution of the impurities inside the space charge region. Information on the depletion region, built-in voltage and net carrier concentration were obtained from the dark C-V characteristics.     

Inhomogeneities in 130 MeV Au ion irradiated Au/n-Si (1 0 0) Schottky structure

The electrical characteristics of Au/n-Si (1 0 0) Schottky rectifier have been studied in a wide irradiation fluence range using conventional current-voltage (I-V) and capacitance-voltage (C-V) measurements. The I-V characteristics showed an abnormal increase in forward current at low voltage. The device shows a bend in forward I-V and reverses bias C-V characteristics due to extra current, suggesting that there are two independent contributions to thermionic current, corresponding to two levels of the Schottky barrier. It is shown that the excess current at low voltage can be explained by taking into account the role of heavy ion irradiation induced defects at the metal semiconductor interface.     

Correlation between barrier heights and ideality factors of Cd/n-Si and Cd/p-Si Schottky barrier diodes

Our goal is to experimentally investigate whether or not the effective Schottky barrier heights (SBHs) and ideality factors obtained from the current-voltage (I-V) and capacitance-voltage (C-V) characteristics differ from diode to diode even if the samples were identically prepared. For this purpose, we prepared Cd/n-Si (33 dots) and Cd/p-Si (15 dots) diodes. The SBH for the Cd/n-Si diodes ranged from 0.701 to 0.605 eV, and ideality factor n from 1.913 to 1.213. Φ_b value for the Cd/p-Si diodes ranged from 0.688 to 0.730 eV, and ideality factor n value from 1.473 to 1.040. The experimental SBH distributions obtained from the C⁻²-V and I-V characteristics were fitted by a Gaussian function and their mean SBH values were calculated. Furthermore, the laterally homogeneous barrier heights were also computed from the extrapolation of the linear plot of experimental barrier heights versus ideality factors.     

Illumination dependence of I-V and C-V characterization of Au/InSb/InP(1 0 0) Schottky structure

The effects of surface preparation and illumination on electric parameters of Au/InSb/InP(100) Schottky diode were investigated, in the later diode InSb forms a fine restructuration layer allowing to block In atoms migration to surface. In order to study the electric characteristics under illumination, we make use of an He-Ne laser of 1 mW power and 632.8 nm wavelength. The current-voltage I(V_G), the capacitance-voltage C(V_G) measurements were plotted and analysed. The saturation current I_s, the serial resistance R_s and the mean ideality factor n are, respectively, equal to 2.03 × 10⁻⁵ A, 85 Ω, 1.7 under dark and to 3.97 × 10⁻⁵ A, 67 Ω, 1.59 under illumination. The analysis of I(V_G) and C(V_G) characteristics allows us to determine the mean interfacial state density N_ss and the transmission coefficient θ_n equal, respectively, to 4.33 × 10¹² eV⁻¹ cm⁻², 4.08 × 10⁻³ under dark and 3.79 × 10¹² eV⁻¹ cm⁻² and 5.65 × 10⁻³ under illumination. The deep discrete donor levels presence in the semiconductor bulk under dark and under illumination are responsible for the non-linearity of the C⁻²(V_G) characteristic.     

Fabrication and electrical characterization of thermally deposited amorphous Se0.82In0.18 on n-Si (100)

Amorphous (a-) Se_0.82In_0.18 thin films have been deposited onto n-type silicon (n-Si) single crystal, using the three-temperature technique, in the fabricated configuration of Au/a-Se_0.82In_0.18/n-Si/Al. The current density-voltage (J–V) characteristics have been measured at different isotherms in the range of 198–313 K, thus inspecting the conduction mechanisms comparing with Au/a-Se/n-Si/Al heterojunctions. The analysis proved that the forward bias is characterized by two parts: current increasing exponentially with the applied voltage (low voltage bias region, V<0.2 V), and non-exponentially in the higher voltage region (V>0.2 V). At the low bias region, the current was dominated by a multi-tunneling capture-emission process with a rather temperature-independent effect in the temperature range investigated. However, at the high voltage region, the effect of temperature becomes more pronounced with an ohmic character in the range of 198 to 273 K. For temperatures higher than 273 K, and below the glass transition temperature of a-Se_0.82In_0.18 (T _g～330 K), the high voltage region could be subdivided into two parts: an ohmic conduction range that limited at bias voltage of 0.20 V<V<0.46 V, and a space charge limited current region for bias voltage of V>0.46 V. The reverse J–V characteristics showed a deviation from that of the ideal diode behavior, analogous to that of pure a-Se/n-Si heterojunctions.     

Fabrication and electrical characterization of nanocrystalline ZnO/Si heterojunctions

Nanocrystalline zinc oxide (nc-ZnO) films were prepared by a sol-gel process on p-type single-crystalline Si substrates to fabricate nc-ZnO/p-Si heterojunctions. The structure and morphology of ZnO films on Si substrates, which were analyzed by X-ray diffraction (XRD) spectroscopy and atomic force microscopy (AFM), showed that ZnO films consisted of 50-100 nm polycrystalline nanograins with hexagonal wurtzite structure. The electrical transport properties of the nc-ZnO/p-Si heterojunctions were investigated by temperature-dependent current-voltage (I-V) measurements and room temperature capacitance-voltage measurements. The temperature-dependent I-V characteristics revealed that the forward conduction was determined by multi-step tunneling current, and the activation energy of saturation current was about 0.26 eV. The 1/C²-V plots indicated the junction was abrupt and the junction built-in potential was 1.49 V at room temperature.     

Effect of the oxidation process on SiO2/4H-SiC interface electrical characteristics

In this work we have compared the SiO₂/SiC interface electrical characteristics for three different oxidations processes (dry oxygen, water-containing oxygen and water-containing nitrogen atmospheres). MOS structures were fabricated on 8° off-axis 4H-SiC(0 0 0 1) n- and p-type epi-wafers. Electrical characteristics were obtained by I-V measurements, high-frequency capacitance-voltage (C-V) and ac conductance (G-ω) methods. Comparing the results, one observes remarkable differences between samples which underwent different oxidation routes. Among the MOS structures analyzed, the sample which underwent wet oxidation with oxygen as carrier gas presented the higher dielectric strength and lower values of interface states density.     

Effect of surface preparation on the properties of Au/p-Cd1−xZnxTe

The effect of bromine methanol (BM) etching and NH₄F/H₂O₂ passivation on the Schottky barrier height between Au contact and semi-insulated (SI) p-Cd_1−xZn_xTe (x ≈ 0.09-0.18) was studied through current-voltage (I-V) and capacitance-voltage (C-V) measurements. Near-infrared (NIR) spectroscopy technique was utilized to determine the Zn concentration. X-ray photoelectron spectroscopy (XPS) for surface composition analysis showed that BM etched sample surface left a Te⁰-rich layer, however, which was oxidized to TeO₂ and the surface [Te]/([Cd] + [Zn]) ratio restored near-stoichiometry after NH₄F/H₂O₂ passivation. According to I-V measurement, barrier height was 0.80 ± 0.02-0.85 ± 0.02 eV for Au/p-Cd_1−xZn_xTe with BM etching, however, it increased to 0.89 ± 0.02-0.93 ± 0.02 eV with NH₄F/H₂O₂ passivation. Correspondingly, it was about 1.34 ± 0.02-1.43 ± 0.02 eV and 1.41 ± 0.02-1.51 ± 0.02 eV by C-V method.     

Annealing temperature effect on the structural, optical and electrical properties of ZnS thin films

Zinc sulfide thin films were prepared on glass substrates at room temperature using a chemical bath deposition method. The obtained films were annealed at temperatures ranging from 100 to 500 °C in steps of 100 °C for 1 h. The films were characterized by X-ray diffraction (XRD), Raman spectroscopy, energy dispersive X-ray analysis (EDX), optical absorption spectra, and electrical measurements. X-ray diffraction analysis indicates that the deposited films have an amorphous structure, but after being annealed at 500 °C, they change to slightly polycrystalline. The optical constants such as the refractive index (n_r), the extinction coefficient (k), and the real (ε₁) and imaginary (ε₂) parts of the dielectric constant are calculated depending on the annealing temperature. Aside from the ohmic characteristics of the I-V curve, a nonlinear I-V curve owing to the Schottky contact is also found, and the barrier heights (?_bn) for Au/n-ZnS and In/n-ZnS heterojunctions are calculated. The conductivity type was identified by the hot-probe technique.     

The dependence of barrier height on temperature for Pd Schottky contacts on ZnO

Temperature dependent current-voltage (I-V) and capacitance-voltage (C-V) measurements have been performed on Pd/ZnO Schottky barrier diodes in the range 60-300 K. The room temperature values for the zero bias barrier height from the I-V measurements (Φ_I-V) was found to be 0.52 eV and from the C-V measurements (Φ_C-V) as 3.83 eV. From the temperature dependence of forward bias I-V, the barrier height was observed to increase with temperature, a trend that disagrees with the negative temperature coefficient for semiconductor material. The C-V barrier height decreases with temperature, a trend that is in agreement with the negative temperature coefficient of semiconductor material. This has enabled us to fit two curves in two regions (60-120 K and 140-300 K). We have attributed this behaviour to a defect observed by DLTS with energy level 0.31 eV below the conduction band and defect concentration of between 4×10¹⁶ and 6×10¹⁶ cm⁻³ that traps carriers, influencing the determination of the barrier height.     

Fabrication and electrical characterization of ZnO rod arrays/CuSCN heterojunctions

ZnO rod arrays/CuSCN heterojunctions are fabricated by depositing ZnO rod arrays films using two-step chemical bath deposition (CBD) and CuSCN thin films using successive ionic layer adsorption and reaction (SILAR) on ITO substrate successively. The structures and morphologies of ZnO films and CuSCN films, analyzed by X-ray diffraction (XRD) spectroscopy and metallurgical microscope, show that ZnO films are hexagonal wurtzite structure and consisted of vertical polycrystalline rods with diameter of 1 μm, CuSCN films are β-phase structure and consisted of elongated grains with length of 3 μm. Current–voltage (I–V) measurements of ZnO/CuSCN heterojunctions show good diode characteristics with rectification ratio about 48.3 at 3 V. The forward conduction is, respectively, determined by carrier recombination in the space charge region, defect-assisted tunneling and exponential distribution trap-assisted space charge limited current mechanism with the increase of forward voltage. Also, a band diagram of ZnO/CuSCN heterojunctions has been proposed to explain the transport mechanism.     

Effect of series resistance and interface states on the I-V, C-V and G/ω-V characteristics in Au/Bi-doped polyvinyl alcohol (PVA)/n-Si Schottky barrier diodes at room temperature

The forward and reverse bias current-voltage (I-V), capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the Au/PVA (Bi-doped)/n-Si Schottky barrier diodes (SBDs) have been investigated at room temperature by taking the interface states (N_ss) and series resistance (R_s) effects into account. The voltage dependent profiles of resistance (R_i) were obtained from both the I-V and C/G-V measurements by using Ohm’s Law and Nicollian methods. The obtained values of R_i with agreement each other especially at sufficiently high bias voltages which correspond the value of R_s of the diode. Therefore, the energy density distribution profile of N_ss was obtained from the forward bias I-V data taking the bias dependence of the effective barrier height (BH) Φ_e and R_s into account. The high value of ideality factor (n) was attributed to high density of N_ss and interfacial polymer layer at metal/semiconductor (M/S) interface. In order to examine the frequency dependence of some of the electrical parameters such as doping donor concentration (N_D), Φ_e, R_s and N_ss values, C-V and G/ω-V measurements of the diode were performed at room temperature in the frequency range of 50 kHz-5 MHz. Experimental results confirmed that the N_ss, R_s and interfacial layer are important parameters that influence electrical characteristics of SBD.     

Electrical characterization of p-ZnO/p-Si heterojunction

Nitrogen doped p-ZnO film, with urea as nitrogen source, is fabricated by pulsed laser deposition on well-cleaned p-type (1 0 0) Si substrates. The structural and electrical properties of the p-p heterojunction are investigated by current-voltage (I-V) and capacitance-voltage (C-V) measurements. It shows a diode-like behavior with turn-on voltage of 0.5 V. The ideality factor η determined by applying positive potential in p-ZnO and negative potential along p-Si is found to be 6. Such a high value of η is attributed to lattice mismatch between ZnO and Si. and other factors responsible are thermoionic emission, minority carrier injection and recombination. C-V results indicate an abrupt interface and a band bending of 0.9 V in the silicon. Heterojunction band diagram for p-ZnO/p-Si is proposed.     

Current transport through InP/InSb heterojunction: Effect of lattice mismatch

Semiconductor heterojunctions of MOCVD grown InP were fabricated on n-InSb to study some features of a current transport in strained heterojunctions. The MOCVD grown undoped InP samples on InP substrates were characterized by XRD and Hall measurements whereas the InP/InSb heterojunction was characterized by XRD, TEM and I-V measurements in the temperature range 160-305 K. On increasing the voltage, first the current through the heterojunction is found to increase linearly and then it gets saturate due to surface states saturation. When the misfit dislocation density was increased, overlapping in the depletion regions gave rise to a barrier to the current flow there by saturating the current.     

Fabrication and electrical characterization of p-Sb2S3/n-Si heterojunctions for solar cells application

Antimony trisulphide (Sb₂S₃) films were prepared by thermal evaporation technique on n-type single crystal Si substrates to fabricate p-Sb₂S₃/n-Si heterojunctions. The electrical transport properties of the p–Sb₂S₃/n-Si heterojunctions were investigated by current–voltage (I–V) and capacitance–voltage (C–V) measurements. The temperature-dependent I–V characteristics revealed that the forward conduction was determined by multi-step tunnelling current and the activation energy of saturation current was about 0.54 eV. The 1/C²–V plots indicated the junction was abrupt and the junction built-in potential was 0.6 V at room temperature and decreased with increasing temperature. The solar cell parameters have been calculated for the fabricated cell as V_oc = 0.50 V, J_sc = 14.53 mA cm⁻², FF = 0.32 and η = 4.65% under an illumination of 50 mW cm⁻².     

Electronic and interface state density distribution properties of Ag/p-Si Schottky diode

Electronic and interface state distribution properties of Ag/p-Si Schottky diode have been investigated. The diode indicates non-ideal current-voltage behavior with an ideality factor greater than unity. The capacitance-voltage (C-V) characteristic is linear in reverse bias indicating rectification behavior and charge density within depletion layer is uniform. From I-V and C-V characteristics, junction parameters such as diode ideality factor and barrier height were found as 1.66 and ?_B(I-V) = 0.84 eV (?_B(C-V) = 0.90 eV), respectively. The interface state density N_ss and relaxation time τ of the Schottky diode were determined by means of Schottky capacitance spectroscopy method. The results show the presence of thin interfacial layer between the metal and semiconductor.     

Molecular control over Ag/p-Si diode by organic layer

Electrical transport properties of Ag metal-fluorescein sodium salt (FSS) organic layer-silicon junction have been investigated. The current-voltage (I-V) characteristics of the diode show rectifying behavior consistent with a potential barrier formed at the interface. The diode indicates a non-ideal I-V behavior with an ideality factor higher than unity. The ideality factor of the Ag/FSS/p-Si diode decreases with increasing temperature and the barrier height increases with increasing temperature. The barrier height (φ_b=0.98 eV) obtained from the capacitance-voltage (C-V) curve is higher than barrier height (φ_b=0.72 eV) derived from the I-V measurements. The barrier height of the Ag/FSS/p-Si Schottky diode at the room temperature is significantly larger than that of the Ag/p-Si Schottky diode. It is evaluated that the FSS organic layer controls electrical charge transport properties of Ag/p-Si diode by excluding effects of the SiO₂ residual oxides on the hybrid diode.     

Comparison of electrical parameters of Zn/p-Si and Sn/p-Si Schottky barrier diodes

In this study, current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-semiconductor (MS) Zn/p-Si and Sn/p-Si Schottky diodes, with high resistivity silicon structures, are investigated. The parameters of series resistance (R_S), the ideality factor (n) and the barrier height (Φ_b) are determined by performing different plots from the forward bias current-voltage (I-V) and reverse bias capacitance-voltage (C-V) characteristics. Thus, the barrier heights (Φ_b) for the Si Schottky diodes obtained between 0.725 and 1.051 eV, the ideality factor (n) between 1.043 and 1.309, and the series resistance (R_S) between 12.594 and 12.950 kΩ. The energy distribution of interface states density was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. It was concluded that the density of interface states in the considered energy range are in close agreement with each other values obtained for Zn/p-Si and Sn/p-Si Schottky diodes.     

The effect of interface states, excess capacitance and series resistance in the Al/SiO2/p-Si Schottky diodes

The current-voltage (I-V) characteristics of Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance-voltage (C-V) and conductance-voltage (G-V) measurements are studied at frequency range of 10 kHz-1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO₂ interface. The density of interface states (N_ss) distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) at room temperature for the Schottky diode on the order of ≅4 × 10¹³ eV⁻¹ cm⁻²_. These high values of N_ss were responsible for the non-ideal behaviour of I-V and C-V characteristics. Frequency dispersion in C-V and G-V can be interpreted only in terms of interface states. The N_ss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I-V, C-V and G-V characteristics of SD are affected not only in N_ss but also in series resistance (R_s), and the location of N_ss and R_s has a significant on electrical characteristics of Schottky diodes.     

XPS, electric and photoluminescence-based analysis of the GaAs (1 0 0) nitridation

In this paper, nitridation process of GaAs (1 0 0) substrates was studied in-situ using X-ray photoelectron spectroscopy (XPS) and ex-situ by means of electrical method I-V and photoluminescence surface state spectroscopy (PLS³) in order to determine chemical, electrical and electronic properties of the elaborated GaN/GaAs interfaces.The elaborated structures were characterised by I-V analysis. The saturation current I_S, the ideality factor n, the barrier height Φ_Bn and the serial resistance R_S are determined.The elaborated GaN/GaAs structures are also exhibited a high PL intensity at room temperature. From the computer-aided analysis of the power-dependent PL efficiency measurements (PLS³ technique), the value of the interface state density N_SS(E) close to the mid-gap was estimated to be in the range of 2-4 × 10¹¹ eV⁻¹ cm⁻², indicating a good electronic quality of the obtained interfaces.Correlation among chemical, electronic and electrical properties of the GaN/GaAs interface was discussed.