激光等离子体相互作用的受激拉曼散射饱和效应

在激光等离子体相互作用过程中,受激拉曼散射（SRS）会通过Langmuir波衰减不稳定性（LDI）和电子俘获两种机理饱和.文章给出均匀一维等离子体和低强度非相对论激光作用中,LDI和电子俘获两种机理下的SRS饱和时间的解析表达式.SRS饱和时间与入射激光强度,电子密度,电子温度,初始电子密度微扰等参数有关.解析理论计算得到了与模拟和实验相符的结果. 关键词： 受激拉曼散射 饱和 Langmuir波衰变不稳定性（LDI） 电子俘获     

HfO_2中影响电荷俘获型存储器的氧空位特性第一性原理研究

随着器件尺寸进一步等比例缩小,高k材料HfO2作为俘获层的电荷俘获型存储器展现了较好的耐受性和较强的存储能力,且工艺相对简单,与传统半导体工艺完全兼容,因此得到了广泛的研究.为研究HfO2中氧空位引入的缺陷能级对电荷俘获型存储器存储特性的影响,运用第一性原理计算分析了HfO2中的氧空位缺陷.通过改变缺陷超胞中的电子数模拟器件的写入和擦除操作,发现氧空位对电荷的俘获基本上不受氧空位之间距离的影响,而氧空位个数则影响对电子的俘获,氧空位数多,俘获电子的能力就强.此外,四价配位的氧空位俘获电子的能力比三价配位的氧空位大.态密度分析发现四价配位的氧空位引入深能级量子态数大,并且受氧空位之间的距离影响小,对电子的俘获概率大.结果表明,HfO2中四价配位的氧空位缺陷有利于改善电荷俘获型存储器的存储特性.     

二维原子层谷电子学材料和器件

人为操控电子的内禀自由度是现代电子器件的核心和关键.如今电子的电荷和自旋自由度已经被广泛地应用于逻辑计算与信息存储.以二维过渡金属硫属化合物为代表的二维原子层材料由于其具有独特的谷自由度和优异的物理性质,成为了新型谷电子学器件研究的优选材料体系.本文介绍了能谷的基本概念、谷材料的基本物理性质、谷效应的调控和谷电子学器件的研究进展,并对谷电子学材料和器件的研究进行了总结与展望.     

基于逻辑器件响应特性的自治布尔网络调控

自治布尔网络已成功应用于随机数产生、基因调控、储备池计算等领域.为了在应用中合理选择器件使输出更好地满足各应用的需求,本文研究了自治布尔网络中的逻辑器件响应特性变化时,自治布尔网络输出状态随之变化的规律,结果显示逻辑器件响应特性变化可以调控自治布尔网络输出在周期和混沌之间转变,且能改变自治布尔网络输出序列的复杂程度.进一步观察了逻辑器件响应特性和链路延时二维参数空间中输出序列复杂程度的分布,结果显示快的逻辑门响应特性可以增强高复杂序列在链路延时参数空间的分布范围.同时研究了自治布尔网络中任意逻辑器件的响应特性单独变化对网络输出状态的影响,结果显示不同节点的器件响应特性对序列复杂程度的调控能力有差异.研究表明,逻辑器件响应特性可以调控网络输出序列复杂程度,快的响应特性有利于高复杂混沌的稳定产生.     

低能He2+-He反应中单电子俘获微分散射过程的实验研究

利用冷靶反冲离子动量谱仪装置系统研究了20-40 keV He2+-He碰撞体系的态选择单电子俘获过程,实验获得了单电子俘获过程的态选择截面以及角微分截面.在所研究的能区范围,电子俘获到L壳层的截面最大,为主要的反应道,这与分子库仑过垒模型的反应窗理论的预测一致.实验测量的态选择截面与原子轨道紧耦合的计算结果很好地符合,与光谱方法的测量结果存在一定的差别,主要原因是光谱方法不能测量完整的反应通道信息.实验结果表明,总角微分截面在小角度范围主要来源于电子俘获到基态的贡献,在大角度范围主要来自电子俘获到激发态的贡献;电子俘获到基态的和激发态的角微分截面均出现振荡结构,这种振荡来源于电子俘获反应中分子轨道之间的相干效应.实验测量的角微分截面与其他实验和紧耦合方法的计算结果进行了比较和分析.     

裸核离子与中性原子碰撞电离过程的理论研究

基于处理裸核离子与中性原子碰撞电离过程的OBKN和ECPSSR理论模型,系统计算了不同裸核离子与中性原子碰撞K壳层电子俘获截面和直接电离截面,并与其它文献已有的理论和实验结果进行了比较.研究结果表明：碰撞能量较低时,电子俘获截面大于直接电离截面,随着碰撞能量的增加,电子俘获截面和直接电离截面均是先增大后减小且直接电离截面减小地非常缓慢,高能时,直接电离截面大于电子俘获截面.当入射炮弹离子速度接近0.67倍靶原子K壳层电子速度时,电子俘获截面达到最大值,而当入射炮弹离子速度接近靶原子K壳层电子速度时,直接电离截面达到最大值.     

低能He2+-He反应中单电子俘获微分散射过程的实验研究

利用冷靶反冲离子动量谱仪装置系统研究了20—40 keV He²⁺-He碰撞体系的态选择单电子俘获过程,实验获得了单电子俘获过程的态选择截面以及角微分截面.在所研究的能区范围,电子俘获到L壳层的截面最大,为主要的反应道,这与分子库仑过垒模型的反应窗理论的预测一致.实验测量的态选择截面与原子轨道紧耦合的计算结果很好地符合,与光谱方法的测量结果存在一定的差别,主要原因是光谱方法不能测量完整的反应通道信息.实验结果表明,总角微分截面在小角度范围主要来源于电子俘获到基态的贡献,在大角度范围主要来自电子俘获到激发态的贡献;电子俘获到基态的和激发态的角微分截面均出现振荡结构,这种振荡来源于电子俘获反应中分子轨道之间的相干效应.实验测量的角微分截面与其他实验和紧耦合方法的计算结果进行了比较和分析. 关键词： 冷靶反冲离子动量谱仪 态选择电子俘获 态选择截面 角微分截面     

裸核离子与中性原子碰撞电离过程的理论研究

基于处理裸核离子与中性原子碰撞电离过程的OBKN和ECPSSR理论模型,系统计算了不同裸核离子与中性原子碰撞K壳层电子俘获截面和直接电离截面,并与其它文献已有的理论和实验结果进行了比较.研究结果表明:碰撞能量较低时,电子俘获截面大于直接电离截面,随着碰撞能量的增加,电子俘获截面和直接电离截面均是先增大后减小且直接电离截面减小地非常缓慢,高能时,直接电离截面大于电子俘获截面.当入射炮弹离子速度接近0.67倍靶原子K壳层电子速度时,电子俘获截面达到最大值,而当入射炮弹离子速度接近靶原子K壳层电子速度时,直接电离截面达到最大值.     

电荷俘获存储器的过擦现象

基于密度泛函理论的第一性原理平面波超软赝势方法和VASP软件对电荷俘获存储器过擦现象进行了分析研究.通过形成能的计算,确定了含有氮空位缺陷的Si3N4和含有间隙氧缺陷的Hf O2作为研究的对象;俘获能的计算结果表明两种体系对电子的俘获能力比对空穴的大,因而对两体系擦写载流子确定为电子.分别计算了Hf O2和Si3N4擦写前后的能量、擦写前后电荷分布变化、吸附能和态密度,以说明过擦的微观机理.对能量和擦写电荷变化的研究,表明Si3N4相比于Hf O2,其可靠性较差,且Si3N4作为俘获层,在一个擦写周期后,晶胞中电子出现减少现象;界面吸附能的研究表明,Si3N4相比于Hf O2在缺陷处更容易与氧进行电子交换;最后,通过对态密度的分析表明Si3N4和Hf O2在对应的缺陷中均有缺陷能级俘获电子,前者为浅能级俘获,后者为深能级俘获.综上分析表明,Si3N4在氮空位的作用下,缺陷附近原子对电子的局域作用变弱,使得Si3N4作为俘获层时,材料本身的电子被擦出,使得擦操作时的平带偏移电压增大,导致存储器发生过擦.本文的研究结果揭示了过擦的本质,对提高电荷俘获存储器的可靠性以及存储特性有着重要的指导意义.     

电子俘获材料的红外上转换效率

采用稀土直接掺杂工艺提高了电子俘获材料CaS:Eu,Sm和CaS:Ce,Sm的发光亮度和制备效率,并利用超短脉冲红外激光测试了它们的红外上转换效率.借助等离子体质谱技术检测了硫化助熔剂法和稀土直接掺杂工艺合成电子俘获材料中主要掺杂剂的化学计量比,分析了影响电子俘获材料上转换发光效率的主要因素.     

Simplification of Space-Variant Parallel Logic Operations Using the Temporal Method

A time-domain encoding method (temporal method) for space-variant parallel logic operations, which can execute different operations in parallel, is proposed. The temporal method is based on temporal encoding of two input patterns, temporal gating of the coded pattern, and decoding by temporal addition of the gated patterns. The first feature of the proposed method is that parallel logic operations can be performed without complex pattern transformations. The second feature is that the logical output can be directly fed to succeeding systems without specific decoding. Therefore, the logic operation system can be constructed using conventional optics and existing spatial light modulators. In order to confirm these features, an optoelectronic experimental system is constructed and space-variant parallel logic operations are performed.     

一种数据非易失性、多功能和可编程的自旋逻辑研究进展

自旋(磁)逻辑器件具有数据非易失性、CMOS电路兼容性、操作速度快等优点,是开发计算存储相融合的非冯·诺依曼计算机架构的理想候选方案之一.本文进一步演示基于自旋霍尔效应的自旋逻辑方案.利用自旋霍尔效应不仅能够实现基本的布尔逻辑功能和数据存储功能,还可以利用自旋轨道力矩磁矩翻转的对称性要求、偏置磁场要求等,进一步实现自旋逻辑器件的可编程和多功能特性.利用这些特点,同一自旋霍尔逻辑器件可以实现"与"、"或"、"非"、"与非"、"或非"等功能.因为这些特性,基于自旋霍尔效应的自旋逻辑单元有望成为后续自旋逻辑器件和电路的核心器件,推动后者的持续开发与广泛应用.     

A scheme of developing frequency encoded tristate logic operations exploiting nonlinear character of PPLN waveguide and RSOA

In binary logic the information is represented by two distinct states only (0 and 1 state). The major disadvantage of the binary or Boolean logic operation is due to its limitation of large information handling capacity. It is established that tristate operations can be accommodated with optics in data processing, as this type of operation can enhance the operation speed very much as well as information capacity. Here in this communication the authors propose a new concept to implement all-optical different logic gates with tristate mechanism using frequency-encoding principle. For this purpose, co-propagating beams having different frequencies in C-band have used for generating cascaded sum and difference frequency, exploiting the nonlinear response character of periodically poled LiNbO₃ waveguide (PPLN). The highly reflecting property of optical add and drop multiplexer (ADM) and high wavelength conversion property of reflecting semiconductor optical amplifiers (RSOA) have been exploited here to implement the desired AND, NAND,OR and NOR logic operations with tristate. As NAND and NOR are the universal logic operation, so any other member of this logic family may be implemented with these.     

Programmable Logic Based on Large Magnetoresistance of Germanium

We find extremely large low-magnetic-field magnetoresistance(~350%at 0.2T and ~180%at 0.1T) in germanium at room temperature and the magnetoresistance is highly sensitive to the surface roughness.This unique magnetoelectric property is applied to fabricate logic architecture which could perform basic Boolean logic including AND,OR,NOR and NAND.Our logic device may pave the way for a high performance microprocessor and may make the germanium family more advanced.     

Modified signed-digit addition by using binary logic operations and its optoelectronic implementation

In this work, a three-step modified signed-digit (MSD) addition by using binary logic operations is proposed. Each input digit is encoded with two binary bits. Through binary logic operations, all of the weight and transfer digits and the final sum digits represented with the same encoding scheme will be generated. The operations can be performed at each digit position in parallel. In our suggested optical arithmetic and logic unit (ALU), a single electron trapping (ET) device is employed to serve as the binary logic device. This technique based on ET logic possesses the advantage of high signal-to-noise ratio (SNR). The optoelectronic system can be constructed in a simple, compact and general-purpose form.     

Coreflections in Algebraic Quantum Logic

Various generalizations of Boolean algebras are being studied in algebraic quantum logic, including orthomodular lattices, orthomodular po-sets, orthoalgebras and effect algebras. This paper contains a systematic study of the structure in and between categories of such algebras. It does so via a combination of totalization (of partially defined operations) and transfer of structure via coreflections.     

Shannon Logic Based Novel QCA Full Adder Design with Energy Dissipation Analysis

Quantum-dot Cellular Automata (QCA) is an emerging nanotechnology to replace VLSI-CMOS digital circuits. Due to its attractive features such as low power consumption, ultra-high speed switching, high device density, several digital arithmetic circuits have been proposed. Adder circuit is the most prominent component used for arithmetic operations. All other arithmetic operation can be successively performed using adder circuits. This paper presents Shannon logic based QCA efficient full adder circuit for arithmetic operations. Shannon logic expression with control variables helps the designer to reduce hardware cost; using with minimum foot prints of the chip size. The mathematical models of the proposed adder are verified with the theoretical values. In addition, the energy dissipation losses of the proposed adder are carried out. The energy dissipation calculation is evaluated under the three separate tunneling energy levels, at temperature T = 2K.The proposed adder dissipates less power. QCAPro tool is used for estimating the energy dissipation. In this paper we proposed novel Shannon based adder for arithmetic calculations. This adder has been verified in different aspects like using Boolean algebra besides it power analysis has been calculated. In addition 1-bit full adder has been enhanced to propose 2-bit and 4-bit adder circuits.     

Generalized optical logic elements - GOLEs

A Generalized Optical Logic Element or GOLE is device that performs any of the 16 Boolean logic operations on signals in an optical beam with very fast switching among functions. The advantages of a generalized or universal gate in manufacturing are obvious. Extremely flexible functioning becomes possible if the GOLE functionality is switched in response to earlier computations. Likewise Field Programmable Gate Arrays or FPGAs can be used to fix the GOLE functions, making one of the most powerful and flexible processor units ever designed - called a Field GOLE. Such systems can be made in bulk optics to utilize Spatial Light Modulator or SLM capabilities, but integrated optics on silicon will be the choice for most applications. GOLEs can be generalized in several ways to become Fredkin gates and generalized Fredkin gates. They can also be cascaded similarly to electronic gates.     

All optical logic NAND gate based on two-photon absorption in semiconductor optical amplifiers

We propose a new scheme to realize all optical logic NAND operating at high speeds up to 250 Gb/s utilizing the ultrafast phase response during two-photon absorption (TPA) process in semiconductor optical amplifiers (SOA). NAND gate is important because other Boolean logic elements and circuits can be realized using NAND gates as basic building blocks. Rate equations for semiconductor optical amplifiers (for input data signals with high intensity) configured in the form of a Mach-Zehnder interferometer have been solved. The input intensities are high enough so that the two-photon induced phase change is larger than the regular gain induced phase change. The performance of this scheme is analyzed by calculating the quality factor of the resulting data streams. The results show that both AND and NAND operations at 250 Gb/s with good signal to noise ratio are feasible.     

Mach-Zehnder interferometer-based all-optical reversible logic gate

In recent years, reversible logic has emerged as a promising computing paradigm having application in low-power CMOS, quantum computing, nanotechnology and optical computing. Optical logic gates have the potential to work at macroscopic (light pulses carry information), or quantum (single photons carry information) levels with great efficiency. However, relatively little has been published on designing reversible logic circuits in all-optical domain. In this paper, we propose and design a novel scheme of Toffoli and Feynman gates in all-optical domain. We have described their principle of operations and used a theoretical model to assist this task, finally confirming through numerical simulations. Semiconductor optical amplifier (SOA)-based Mach-Zehnder interferometer (MZI) can play a significant role in this field of ultra-fast all-optical signal processing. The all-optical reversible circuits presented in this paper will be useful to perform different arithmetic (full adder, BCD adder) and logical (realization of Boolean function) operations in the domain of reversible logic-based information processing.