Fabrication and characteristics of lateral Ti/4H-SiC Schottky barrier diodes

This paper describes the fabrication and characteristics of the lateral Ti/4H-SiC Schottky barrier diodes (SBDs). SBDs are fabricated by nitrogen ion implantation into p-type 4H-SiC epitaxial layer. The implant depth profile is simulated using the Monte Carlo simulator TRIM. Measurements of the reverse I－V characteristics demonstrate a low reverse current, that is good enough for many SiC-based devices such as SiC metal-semiconductor field-effect transistors, and SiC static induction transistors. The parameters of the diodes are extracted from the forward I－V characteristics. The barrier height φ_b of Ti/4H-SiC is 0.95 eV.     

Characterization of ion-implanted 4H-SiC Schottky barrier diodes

Ion-implantation layers are fabricated by multiple nitrogen ion-implantations (3 times for sample A and 4 times for sample B) into a p-type 4H-SiC epitaxial layer. The implantation depth profiles are calculated by using the Monte Carlo simulator TRIM. The fabrication process and the I--V and C--V characteristics of the lateral Ti/4H-SiC Schottky barrier diodes (SBDs) fabricated on these multiple box-like ion-implantation layers are presented in detail. Measurements of the reverse I--V characteristics demonstrate a low reverse current, which is good enough for many SiC-based devices such as SiC metal--semiconductor field-effect transistors (MESFETs), and SiC static induction transistors (SITs). The parameters of the diodes are extracted from the forward I--V and C--V characteristics. The values of ideality factor n of SBDs for samples A and B are 3.0 and 3.5 respectively, and the values of series resistance R_\rm s are 11.9 and 1.0~kΩ respectively. The values of barrier height φ _\rm B of Ti/4H-SiC are 0.95 and 0.72 eV obtained by the I--V method and 1.14 and 0.93 eV obtained by the C--V method for samples A and B respectively. The activation rates for the implanted nitrogen ions of samples A and B are 2\% and 4\% respectively extracted from C--V testing results.     

Temperature-dependent characteristics of 4H-SiC junction barrier Schottky diodes

The current-voltage characteristics of 4H-SiC junction barrier Schottky(JBS) diodes terminated by an offset field plate have been measured in the temperature range of 25-300 C.An experimental barrier height value of about 0.5 eV is obtained for the Ti/4H-SiC JBS diodes at room temperature.A decrease in the experimental barrier height and an increase in the ideality factor with decreasing temperature are shown.Reverse recovery testing also shows the temperature dependence of the peak recovery current density and the reverse recovery time.Finally,a discussion of reducing the reverse recovery time is presented.     

High-performance 4H-SiC junction barrier Schottky diodes with double resistive termination extensions

4H-SiC junction barrier Schottky (JBS) diodes with a high-temperature annealed resistive termination extension (HARTE) are designed, fabricated and characterized in this work. The differential specific on-state resistance of the device is as low as 3.64 m ·cm2 with a total active area of 2.46×10-3 cm2 . Ti is the Schottky contact metal with a Schottky barrier height of 1.08 V and a low onset voltage of 0.7V. The ideality factor is calculated to be 1.06. Al implantation annealing is performed at 1250℃ in Ar, while good reverse characteristics are achieved. The maximum breakdown voltage is 1000 V with a leakage current of 9×10-5 A on chip level. These experimental results show good consistence with the simulation results and demonstrate that high-performance 4H-SiC JBS diodes can be obtained based on the double HARTE structure.     

Analysis and simulation of a 4H-SiC semi-superjunction Schottky barrier diode for softer reverse-recovery

In this paper,a 4H-SiC semi-superjunction (SJ) Schottky barrier diode is analysed and simulated.The semi-SJ structure has an optimized design and a specific on-resistance lower than that of conventional SJ structures,which can be achieved without increasing the process difficulty.The simulation results show that the specific on-resistance and the softness factor depend on the aspect and thickness ratios,and that by using the semi-SJ structure,specific on-resistance can be reduced without decreasing the softness factor.It is observed that a trade-off exists between the specific on-resistance and the softness of the diode.     

Analysis and simulation of a 4H-SiC semi-superjunction Schottky barrier diode for softer reverse-recovery

In this paper, a 4H-SiC semi-superjunction (SJ) Schottky barrier diode is analysed and simulated. The semi-SJ structure has an optimized design and a specific on-resistance lower than that of conventional SJ structures, which can be achieved without increasing the process difficulty. The simulation results show that the specific on-resistance and the softness factor depend on the aspect and thickness ratios, and that by using the semi-SJ structure, specific on-resistance can be reduced without decreasing the softness factor. It is observed that a trade-off exists between the specific on-resistance and the softness of the diode.     

Study of 4H-SiC junction barrier Schottky diode using field guard ring termination

This paper reports that the 4H-SiC Schottky barrier diode, PiN diode and junction barrier Schottky diode terminated by field guard rings are designed, fabricated and characterised. The measurements for forward and reverse characteristics have been done, and by comparison with each other, it shows that junction barrier Schottky diode has a lower reverse current density than that of the Schottky barrier diode and a higher forward drop than that of the PiN diode. High-temperature annealing is presented in this paper as well to figure out an optimised processing. The barrier height of 0.79 eV is formed with Ti in this work, the forward drop for the Schottky diode is 2.1 V, with an ideality factor of 3.2, and junction barrier Schottky diode with blocking voltage higher than 400 V was achieved by using field guard ring termination.     

Parameter extraction for a Ti/4H-SiC Schottky diode

Based on the MIS model, a simple method to extract parameters of SiC Schottky diodes is presented using the $I$-$V$ characteristics. The interface oxide capacitance $C_\i$ is extracted for the first time, as far as we know. Parameters of 4H-SiC Schottky diodes fabricated for testing in this paper are: the ideality factor $n$, the series resistance $R_{\rm s}$, the zero-field barrier height $\phi_{\rm B0}$, the interface state density $D_{\rm it}$, the interface oxide capacitance $C_\i$ and the neutral level of interface states $\phi_0$.     

Barrier height homogeneity for 4.5 kV 4H-SiC Schottky diodes

4.5 kV SiC Schottky diodes have been fabricated using Ni as the Schottky contact. A manufacturing yield of 40% is reached for the bigger area diodes (1.6×1.6 mm²) and of 70% for the smaller ones (0.4×0.4 mm²). The measured variations of barrier height and ideality factor with temperature do not agree with the thermionic model. This has been interpreted in terms of barrier height inhomogeneities using the Werner model. We extracted an average barrier height and its standard deviation . These two parameters are almost independent of the diode size. The variation of the barrier height distribution with field has also been investigated and shows a dependence similar to that of Schottky diodes realized from other semiconductor materials.     

Analysis of the effect of sidewall on the performance of 6H-SiC Schottky barrier source/drain NMOSFETs

Between source/drain and gate of SiC Schottky barrier source/drain MOSFET (SiC SBSD-MOSFET), there must be a sidewall as isolation. The width of sidewall strongly affects on the device performance. In this paper the effect of sidewall on the performance of 6H-SiC SBSD-NMOSFET is simulated with the 2D simulator MEDICI. The simulated results show that a sidewall with width less than 0.1μm slightly affects the device performance. However, when the width of sidewall exceeds 0.1μm, the conduction does not occur until the drain voltage is high enough and saturation current sharply decreases. The effect of the sidewall on device performance can be reduced by decreasing the doping concentration in the epitaxial layer.     

4H-SiC Schottky barrier diodes with semi-insulating polycrystalline silicon field plate termination

Based on the theoretical analysis of the 4H-SiC Schottky-barrier diodes(SBDs) with field plate termination, 4H-SiC SBD with semi-insulating polycrystalline silicon(SIPOS) FP termination has been fabricated. The relative dielectric constant of the SIPOS dielectric first used in 4H-SiC devices is 10.4, which is much higher than that of the SiO2dielectric,leading to benefitting the performance of devices. The breakdown voltage of the fabricated SBD could reach 1200 V at leakage current 20 μA, about 70% of the theoretical breakdown voltage. Meanwhile, both of the simulation and experimental results show that the length of the SIPOS FP termination is an important factor for structure design.     

The modulation of Schottky barrier height of NiSi/n-Si Schottky diodes by silicide as diffusion source technique

This paper reports that the Schottky barrier height modulation of NiSi/n-Si is experimentally investigated by adopting a novel silicide-as-diffusion-source technique, which avoids the damage to the NiSi/Si interface induced from the conventional dopant segregation method. In addition, the impact of post-BF₂ implantation after silicidation on the surface morphology of Ni silicides is also illustrated. The thermal stability of Ni silicides can be improved by silicide-as-diffusion-source technique. Besides, the electron Schottky barrier height is successfully modulated by 0.11~eV at a boron dose of 10¹⁵~cm^-2 in comparison with the non-implanted samples. The change of barrier height is not attributed to the phase change of silicide films but due to the boron pile-up at the interface of NiSi and Si substrate which causes the upward bending of conducting band. The results demonstrate the feasibility of novel silicide-as-diffusion-source technique for the fabrication of Schottky source/drain Si MOS devices.     

Experimental and numerical analyses of high voltage 4H-SiC junction barrier Schottky rectifiers with linearly graded field limiting ring

This paper describes the successful fabrication of 4H-SiC junction barrier Schottky(JBS) rectifiers with a linearly graded field limiting ring(LG-FLR). Linearly variable ring spacings for the FLR termination are applied to improve the blocking voltage by reducing the peak surface electric field at the edge termination region, which acts like a variable lateral doping profile resulting in a gradual field distribution. The experimental results demonstrate a breakdown voltage of 5 kV at the reverse leakage current density of 2 mA/cm2(about 80% of the theoretical value). Detailed numerical simulations show that the proposed termination structure provides a uniform electric field profile compared to the conventional FLR termination, which is responsible for 45% improvement in the reverse blocking voltage despite a 3.7% longer total termination length.     

Electrical characteristics of the hydrogen pre-annealed Au/n-GaAs Schottky barrier diodes as a function of temperature

We investigated the passivation effects of hydrogen gas on the Au/n-GaAs Schottky barrier diodes in a wide temperature range. Reference diodes were prepared by evaporating barrier metal on semiconductor wafers un-annealed in N₂ gas atmosphere. The other diodes were made by evaporating barrier metal on n-GaAs semiconductor substrates annealed in H₂ atmosphere. Then, electrical measurements of all diodes were carried out by using closed-cycle Helium cryostat by steps of 20 K in the temperature range of 80-300 K in dark. The basic diode parameters such as ideality factor and barrier height were consequently extracted from electrical measurements. It was seen that ideality factors increased and barrier heights decreased with the decreasing temperature. The case was attributed to barrier inhomogeneity at the metal/semiconductor interface. Barrier heights of the diodes made from samples annealed in H₂ gas atmosphere were smaller than those of reference diodes at low temperatures. Here, it was ascribed to the fact that hydrogen atoms passivated dangling bonds on semiconductor surface in accordance with former studies.     

Laterally inhomogeneous barrier analysis of the methyl violet/p-Si organic/inorganic hybrid Schottky structures

In this work, we have investigated the electrical characteristics, such as current-voltage (I-V) and capacitance-voltage (C-V) measurements, of identically prepared crystal violet/p-Si Organic/Inorganic (OI) Schottky structures formed by evaporation of organic compound solution to directly p-Si semiconductor substrate. It has been seen that the crystal violet organic dye thin film on the p-Si substrate has exhibited a good rectifying behavior. The barrier heights (BHs) and ideality factors of all devices have been calculated from the electrical characteristics. Although the diodes were all identically prepared, there was a diode-to-diode variation: the effective barrier heights ranged from 0.6 ± 0.1 to 0.8 ± 0.1 eV, and the ideality factor from 1.6 ± 0.4 to 3.5 ± 0.4. The barrier height versus ideality factor plot has been plotted for the OI devices. Lateral homogeneous BH was calculated as a value of 0.7 eV from the observed linear correlation between BH and ideality factor, which can be explained by laterally inhomogeneities of BHs. The values of barrier height and acceptor doping concentration yielded from the reverse bias C-V measurements ranged from 0.7 ± 0.1 to 1.3 ± 0.1 eV and from (4.7 ± 0.8) × 10¹⁴ to (8.1 ± 0.8) × 10¹⁴ cm⁻³, respectively. The mean barrier height and mean acceptor doping concentration from C-V characteristics has been calculated 1.0 eV and 5.9 × 10¹⁴ cm⁻³, respectively. It has been seen that the mean BH value of 0.7 eV obtained for the Al/methyl violet/p-Si contact is significantly larger than BH values of the conventional Al/p-Si Schottky diodes. Thus, modification of the interfacial potential barrier for metal/Si diodes has been achieved using a thin interlayer of the methyl violet organic semiconductor; this has been ascribed to the fact that the methyl violet interlayer increases the effective barrier height by influencing the space charge region of Si.     

Schottky barrier MOSFET structure with silicide source/drain on buried metal

In this paper, we propose a novel Schottky barrier MOSFET structure, in which the silicide source/drain is designed on the buried metal (SSDOM). The source/drain region consists of two layers of silicide materials. Two Schottky barriers are formed between the silicide layers and the silicon channel. In the device design, the top barrier is lower and the bottom is higher. The lower top contact barrier is to provide higher {on-state} current, and the higher bottom contact barrier to reduce the off-state current. To achieve this, ErSi is proposed for the top silicide and CoSi₂ for the bottom in the n-channel case. The 50~nm n-channel SSDOM is thus simulated to analyse the performance of the SSDOM device. In the simulations, the top contact barrier is 0.2e~V (for ErSi) and the bottom barrier is 0.6eV (for CoSi₂. Compared with the corresponding conventional Schottky barrier MOSFET structures (CSB), the high on-state current of the SSDOM is maintained, and the off-state current is efficiently reduced. Thus, the high drive ability (1.2mA/μm at V_ds=1V, V_gs=2V) and the high I_on/I_min ratio (10⁶) are both achieved by applying the SSDOM structure.     

Investigation of current transport parameters of Ti/4H-SiC MPS diode with inhomogeneous barrier

The current transport parameters of 4H-SiC merged PiN Schottky(MPS) diode are investigated in a temperature range of 300-520 K.Evaluation of the experimental current-voltage(I-V) data reveals the decrease in Schottky barrier height Φ b but an increase in ideality factor n,with temperature decreasing,which suggests the presence of an inhomogeneous Schottky barrier.The current transport behaviours are analysed in detail using the Tung’s model and the effective area of the low barrier patches is extracted.It is found that small low barrier patches,making only 4.3% of the total contact,may significantly influence the device electrical characteristics due to the fact that a barrier height of 0.968 eV is much lower than the average barrier height 1.39 eV.This shows that ion implantation in the Schottky contact region of MPS structure may result in a poor Ti/4H-SiC interface quality.In addition,the temperature dependence of the specific on-resistance(R on sp),T 2.14,is determined between 300 K and 520 K,which is similar to that predicted by a reduction in electron mobility.     

Simulation study of a mixed terminal structure for 4H-SiC merged PiN/Schottky diode

In this paper, a mixed terminal structure for the 4H-SiC merged PiN/Schottky diode (MPS) is investigated, which is a combination of a field plate, a junction termination extension and floating limiting rings. Optimization is performed on the terminal structure by using the ISE-TCAD. Further analysis shows that this structure can greatly reduce the sensitivity of the breakdown voltage to the doping concentration and can effectively suppress the effect of the interface charge compared with the structure of the junction termination extension. At the same time, the 4H-SiC MPS with this termination structure can reach a high and stable breakdown voltage.