异质结界面电荷对突变InP/InGaAs异质结双极晶体管热场发射影响研究

异质结界面电荷的存在改变了异质结的内建势, 这引起了界面势垒尖峰高度和形状的扰动, 从而使异质结界面载流子的输运产生相应的变化, 最终导致异质结双极晶体管 (HBT) 性能的改变. 基于热场发射-扩散模型, 对异质结界面电荷对InP/InGaAs HBT性能的改变做了研究, 得到结论是正极性的界面电荷有利于InP/InGaAs HBT的直流和高频特性的改善, 而负极性的界面电荷则使器件的直流和高频特性变差. 关键词： InP/InGaAs异质结双极晶体管 界面电荷 内建势 热场发射     

InP/In0.53Ga0.47As/InP双异质结双极型晶体管的仿真与分析

运用Silvaco-TCAD软件构建了InP/In_(0.53)Ga_(0.47)As/InP双异质结双极型晶体管模型,研究了掺杂浓度、厚度以及温度对器件特性的影响.结果表明:双异质结双极型晶体管DHBT的开启电压能达到约0.4V,当浓度达到4×10^(19) cm^(-3)的时候,电流增益可以达到一个最佳状态,其峰值能达到约125左右,且浓度对截止频率以及最高振荡频率没有太大的影响;当增大基区厚度时,电流增益会减小,改变厚度能够使DHBT输出特性得以提升,并且提高基区电流的注入;双异质结双极型晶体管具有很好的温度稳定性.     

一种基于能带工程设计的CaAsSb/InP异质结双极晶体三极管

异质结晶体三极管（HBT）的性能与其材料体系密不可分，利用能带工程可以大大优化器件的结构，提高器件性能，文章从分析HBT的能带结构及设计要求入手，介绍了一种利用能带工程设计的基于GaAsSb/InP材料体系的新型HBT器件的结构及其性能，分析了该器件与其它材料体系器件相比所具有的优异特性，说明了对HBT的各区材料，其带边的相对位置所起的重要作用，最后，文章还报道了近期的实验情况，说明了GaAsSb/InP体系HBT的实际性能与理论预言一致。     

GaInP/GaAs异质结双极晶体管小信号模型参数提取的新方法

提出了一种直接提取GaInP/GaAs异质结双极晶体管(HBT)小信号模型参数的新方法.该方法基 于HBT器件S参数的测试数据，对HBT的小信号模型进行电路网络分析，利用S，Z，Y参数关系 以及电路“抽出”的技巧，分别对HBT小信号模型的寄生参数和本征元件参数进行提取，建 立了一套完整的直接提取HBT小信号模型参数的新方法.与文献报道HBT小信号模型参数提取 的方法相比，该方法的优点是，提取过程具有简明清晰的物理意义，无需建立特殊的测试结 构，无需引入繁琐的数学优化过程，提取速度快，并且具有比较好的精度和较宽频带范围的 适用性等. 关键词： GaInP/GaAs HBT 参数提取 小信号模型     

锗硅异质结双极晶体管单粒子效应加固设计与仿真

本文设计了一种通过在版图布局中引入伪集电极的方法来提高锗硅异质结双极晶体管(SiGe HBT)抗单粒子性能的方法. 利用半导体器件模拟工具, 针对加固前后的SiGe HBT开展了单粒子效应仿真模拟, 分析了伪集电极对SiGe HBT电荷收集机理的影响. 结果表明, 引入的伪集电极形成的新的集电极-衬底结具有较大的反偏能力, 加固后SiGe HBT伪集电极通过扩散机理, 大量收集单粒子效应产生的电荷, 有效地减少了实际集电极的电荷收集量, 发射极、基极电荷收集量也有不同程度的降低, 加固设计后SiGe HBT 的单粒子效应敏感区域缩小, 有效的提高了SiGe HBT 器件抗单粒子效应辐射性能. 此项工作的开展为SiGe HBT电路级单粒子效应抗辐射加固设计打下良好的基础.     

超结硅锗碳异质结双极晶体管机理研究与特性分析优化

提出一种超结硅锗碳异质结双极晶体管(SiGeC HBT)新结构.详细分析了新结构中SiGeC基区和超结结构的引入对器件性能的影响,并对其电流输运机制进行研究.基于SiGeC/Si异质结技术,新结构器件的高频特性优良;同时超结结构的存在,在集电区内部水平方向和垂直方向都建立了电场,二维方向上的电场分布相互作用大大提高了新结构器件的耐压能力.结果表明:超结SiGeC HBT与普通结构SiGeC HBT相比,击穿电压提高了48.8%;更重要的是SiGeC HBT器件中超结结构的引入,不会改变器件高电流增益、高频率特性的优点;新结构器件与相同结构参数的Si双极晶体管相比,电流增益提高了10.7倍,截止频率和最高震荡频率也得到了大幅度改善,很好地实现了高电流增益、高频率特性和高击穿电压三者之间的折中.对超结区域的柱区层数和宽度进行优化设计,随着柱区层数的增多,击穿电压显著增大,电流增益有所提高,截止频率和最高震荡频率减低,但幅度很小.综合考虑认为超结区域采用pnpn四层结构是合理的.     

沟槽型发射极SiGe异质结双极晶体管新结构研究

提出了一种沟槽型发射极SiGe异质结双极晶体管新结构.详细分析了新结构中沟槽型发射极的引入对器件性能的影响,并对其机理进行研究.新型发射极结构通过改变发射极电流路径使电阻分区并联,在不增大结电容的前提下,有效减小发射极电阻,提高器件的频率特性.结果表明,新结构器件的截止频率和最大振荡频率分别增加至100.2 GHz和134.4 GHz,更重要的是沟槽型发射极结构的引入,在提高器件频率特性的同时,不会降低器件的电流增益,也不会增加结电容,很好实现了频率特性、电流增益和结电容之间的折中.对沟槽型发射极进行优化设计,改变侧墙高度和侧墙宽度.沟槽型发射极电阻不受侧墙高度改变的影响,频率性能不变;侧墙宽度增加,频率性能降低.     

三维数值仿真研究锗硅异质结双极晶体管总剂量效应

为探索锗硅异质结双极晶体管(SiGe HBT)总剂量效应的损伤机理,采用半导体器件三维模拟工具(TCAD),建立电离辐照总剂量效应损伤模型,分析比较电离辐射在SiGe HBT不同氧化层结构的不同位置引入陷阱电荷缺陷后,器件正向Gummel特性和反向Gummel特性的退化特征,获得SiGe HBT总剂量效应损伤规律,并与⁶⁰Coγ辐照实验进行对比.结果表明:总剂量辐照在SiGe HBT器件中引入的氧化物陷阱正电荷主要在pn结附近的Si/SiO₂界面处产生影响,引起pn结耗尽区的变化,带来载流子复合增加,最终导致基极电流增大、增益下降;其中EB Spacer氧化层中产生的陷阱电荷主要影响正向Gummel特性,而LOCOS隔离氧化层中的陷阱电荷则是造成反向Gummel特性退化的主要因素.通过数值模拟分析获得的SiGe HBT总剂量效应损伤规律与不同偏置下⁶⁰Coγ辐照实验的结论符合得较好.     

沟槽型发射极SiGe异质结双极化晶体管新结构研究

提出了一种沟槽型发射极SiGe异质结双极化晶体管新结构. 详细分析了新结构中沟槽型发射极的引入对器件性能的影响,并对其机理进行研究. 新型发射极结构通过改变发射极电流路径使电阻分区并联,在不增大结电容的前提下,有效减小发射极电阻,提高器件的频率特性. 结果表明,新结构器件的截止频率和最大振荡频率分别增加至100.2 GHz和134.4 GHz,更重要的是沟槽型发射极结构的引入,在提高器件频率特性的同时,不会降低器件的电流增益,也不会增加结电容,很好实现了频率特性、电流增益和结电容之间的折中. 对沟槽型发射极进行优化设计,改变侧墙高度和侧墙宽度. 沟槽型发射极电阻不受侧墙高度改变的影响,频率性能不变;侧墙宽度增加,频率性能降低. 关键词： SiGe 异质结双极化晶体管 沟槽型发射极 发射极电阻     

采用发射极非均匀指间距技术改善功率异质结双极晶体管热稳定性的研究

为了提高多发射极功率异质结双极晶体管的热稳定性,本文利用耦合热阻表征发射极指间距变化对发射极指间热耦合作用的影响,得到了耦合热阻与发射极指间距之间的变化关系,提出了发射极非均匀指间距技术.通过热电反馈模型对采用发射极非均匀指间距技术的功率HBT进行热稳定性分析,得到了多发射极指上的温度分布.结果表明,多发射极HBT在采用非均匀发射极指间距技术后,峰值温度明显下降,温度变化幅度更加平缓,有效地提高了器件的热稳定性. 关键词： 异质结双极晶体管 耦合热阻 指间距     

An electromagnetic simulation assisted small signal modeling method for InP double-heterojunction bipolar transistors

We present a convenient and practical electromagnetic (EM) assisted small-signal model extraction method for InP double-heterojunction bipolar transistors (DHBTs). Parasitic parameters of pad and electrode fingers are extracted by means of 3D EM simulation. The simulations with a new excitation scheme are closer to the actual on-wafer measurement conditions. Appropriate simulation settings are calibrated by comparing measurement and simulation of OPEN and SHORT structures. A simpler $\pi $-type topology is proposed for the intrinsic model, in which the base-collector resistance $R_\mu$, output resistance $R_{\rm ce}$ are deleted, and a capacitance $C_{\rm ce}$ is introduced to characterize the capacitive parasitic caused by the collector finger and emitter ground bar. The intrinsic parameters are all extracted by exact equations that are derived from rigorous mathematics. The method is characterized by its ease of implementation and the explicit physical meaning of extraction procedure. Experimental validations are performed at four biases for three InGaAs/InP HBT devices with $0.8\times 7 $μm, 0$.8\times 10 $μm and $0.8\times 15 $μm emitter, and quite good fitting results are obtained in the range of 0.1-50 GHz.     

Physical modeling based on hydrodynamic simulation for the design of InGaAs/InP double heterojunction bipolar transistors

A physical model for scaling and optimizing InGaAs/InP double heterojunction bipolar transistors(DHBTs) based on hydrodynamic simulation is developed.The model is based on the hydrodynamic equation,which can accurately describe non-equilibrium conditions such as quasi-ballistic transport in the thin base and the velocity overshoot effect in the depleted collector.In addition,the model accounts for several physical effects such as bandgap narrowing,variable effective mass,and doping-dependent mobility at high fields.Good agreement between the measured and simulated values of cutoff frequency,f t,and maximum oscillation frequency,f max,are achieved for lateral and vertical device scalings.It is shown that the model in this paper is appropriate for downscaling and designing InGaAs/InP DHBTs.     

A G-band terahertz monolithic integrated amplifier in 0.5-μm InP double heterojunction bipolar transistor technology

Design and characterization of a G-band(140–220 GHz) terahertz monolithic integrated circuit(TMIC) amplifier in eight-stage common-emitter topology are performed based on the 0.5-μm In Ga As/In P double heterojunction bipolar transistor(DHBT). An inverted microstrip line is implemented to avoid a parasitic mode between the ground plane and the In P substrate. The on-wafer measurement results show that peak gains are 20 dB at 140 GHz and more than 15-dB gain at 140–190 GHz respectively. The saturation output powers are-2.688 dBm at 210 GHz and-2.88 dBm at 220 GHz,respectively. It is the first report on an amplifier operating at the G-band based on 0.5-μm InP DHBT technology. Compared with the hybrid integrated circuit of vacuum electronic devices, the monolithic integrated circuit has the advantage of reliability and consistency. This TMIC demonstrates the feasibility of the 0.5-μm InGaAs/InP DHBT amplifier in G-band frequencies applications.     

A device model for thin silicon-on-insulator SiGe heterojunction bipolar transistors with saturation effects

In this paper, we describe the saturation effect of a silicon germanium (SiGe) heterojunction bipolar transistor (HBT) fabricated on a thin silicon-on-insulator (SOI) with a step-by-step derivation of the model formulation. The collector injection width, the internal base—collector bias, and the hole density at the base—collector junction interface are analysed by considering the unique features of the internal and the external parts of the collector, as they are different from those of a bulk counterpart.     

Early effect modeling of silicon-on-insulator SiGe heterojunction bipolar transistors

Silicon germanium(SiGe) heterojunction bipolar transistor(HBT) on thin silicon-on-insulator(SOI) has recently been demonstrated and integrated into the latest SOI BiCMOS technology.The Early effect of the SOI SiGe HBT is analysed considering vertical and horizontal collector depletion,which is different from that of a bulk counterpart.A new compact formula of the Early voltage is presented and validated by an ISE TCAD simulation.The Early voltage shows a kink with the increase of the reverse base-collector bias.Large differences are observed between SOI devices and their bulk counterparts.The presented Early effect model can be employed for a fast evaluation of the Early voltage and is useful to the design,the simulation and the fabrication of high performance SOI SiGe devices and circuits.     

Designing power heterojunction bipolar transistors with non-uniform emitter finger lengths to achieve high thermal stability

With the aid of a thermal-electrical model,a practical method for designing multi-finger power heterojunction bipolar transistors with finger lengths divided in groups is proposed.The method can effectively enhance the thermal stability of the devices without sacrificing the design time.Taking a 40-finger heterojunction bipolar transistor for example,the device with non-uniform emitter finger lengths is optimized and fabricated.Both the theoretical and the experimental results show that,for the optimum device,the peak temperature is lowered by 26.19 K and the maximum temperature difference is reduced by 56.67% when compared with the conventional heterojunction bipolar transistor with uniform emitter finger length.Furthermore,the ability to improve the uniformity of the temperature profile and to expand the thermal stable operation range is strengthened as the power level increases,which is ascribed to the improvement of the thermal resistance in the optimum device.A detailed design procedure is also summarized to provide a general guide for designing power heterojunction bipolar transistors with non-uniform finger lengths.     

Weak avalanche multiplication in SiGe heterojunction bipolar transistors on thin film silicon-on-insulator

In this paper, we propose an analytical avalanche multiplication model for the next generation of SiGe silicon-on-insulator (SOI) heterojunction bipolar transistors (HBTs) and consider their vertical and lateral impact ionizations for the first time. Supported by experimental data, the analytical model predicts that the avalanche multiplication governed by impact ionization shows kinks and the impact ionization effect is small compared with that of the bulk HBT, resulting in a larger base-collector breakdown voltage. The model presented in the paper is significant and has useful applications in the design and simulation of the next generation of SiGe SOI BiCMOS technology.     

Angular dependence of proton-induced single event transient in silicon-germanium heterojunction bipolar transistors

We investigate the angular dependence of proton-induced single event transient (SET) in silicon-germanium heterojunction bipolar transistors. Experimental results show that the overall SET cross section is almost independent of proton incident angle. However, the proportion of SET events with long duration and high integral charge collection grows significantly with the increasing angle. Monte Carlo simulations demonstrate that the integral cross section of proton incident events with high ionizing energy deposition in the sensitive volume tends to be higher at larger incident angles, which is associated with the angular distribution of proton-induced secondary particles and the geometry of sensitive volume.     

不同剂量率下锗硅异质结双极晶体管电离损伤效应研究

对于相同制作工艺的NPN锗硅异质结双极晶体管(SiGe HBT), 在不同辐照剂量率下进行⁶⁰Co γ射线的辐照效应与退火特性的研究. 测量结果表明, 两种辐照剂量率下, 随着辐照总剂量增加, 晶体管基极电流增大, 共发射极电流放大倍数降低, 且器件的辐照损伤、性能退化与辐照剂量率相关, 低剂量率下辐照损伤较高剂量率严重. 在经过与低剂量率辐照等时的退火后, 高剂量率下的辐照损伤仍较低剂量率下的损伤低, 即待测SiGeHBT具有明显的低剂量率损伤增强效应(ELDRS). 本文对相关的物理机理进行了探讨分析. 关键词： 锗硅异质结双极晶体管 低剂量率辐照损伤增强 辐照效应     

Thermal resistance matrix representation of thermal effects and thermal design in multi-finger power heterojunction bipolar transistors

The thermal resistance matrix including self-heating thermal resistance and thermal coupling resistance is presented to describe the thermal effects of multi-finger power heterojunction bipolar transistors. The dependence of thermal resistance matrix on finger spacing is also investigated. It is shown that both self-heating thermal resistance and thermal coupling resistance are lowered by increasing the finger spacing, in which the downward dissipated heat path is widened and the heat flow from adjacent fingers is effectively suppressed. The decrease of self-heating thermal resistance and thermal coupling resistance is helpful for improving the thermal stability of power devices. Furthermore, with the aid of the thermal resistance matrix, a 10-finger power heterojunction bipolar transistor (HBT) with non-uniform finger spacing is designed for high thermal stability. The optimized structure can effectively lower the peak temperature while maintaining a uniformity of the temperature profile at various biases and thus the device effectively may operate at a higher power level.