基于多核的车牌识别的架构实现

多核技术是现在提高芯片性能的主要方法。区别于传统以PC和DSP为核心的车牌识别系统,以FPGA为核心,利用SOPC技术构建了车牌识别多核处理器。给出了一种基于多核的车牌识别架构,在该多核处理器中,以3个Nios II 软核为主要处理器核处理车牌定位、字符特征识别提取及识别等处理,同时构建硬件加速器作为协处理器处理图像增强、边缘检测和膨胀、腐蚀等数学形态学处理。在CQ片上路由器基础上,构建了NOC用以实现片上多核通信。另外,为了保证路由器与多处理器核之间的快速、并行通信,加入了数据驱动模块。整个系统在Altera Cyclone IV FPGA上实现了车牌的识别。这种片上系统设计方法具有硬件设计灵活,可扩展性强等优点,能有效地降低系统软硬件设计的难度,缩短开发周期,并提高设计的可靠性。

An Implementation of Multi-core Architecture for License Plate Recognition

Multi-core technology is the main method now to improve chip performance. Difference from the traditional LPR (license plate recognition) system based on PC and DSP, a multi-core processor is built using SOPC Builder to realize license plate recognition based on FPGA. In the multi-core processor, with three main Nios II soft cores to process license plate location, character feature extraction and recognition, we add hardware accelerators to process image strengthening, edge detection and mathematical morphology processing such as corrosion and expansion as coprocessors. On the basis of CQ router, NOC is structured to implement on-chip communication between multi cores. In addition, data-driven module is designed to ensure rapid and parallel communication between the router and multi-core processors. The entire system achieves license plate recognition on the Altera Cyclone IV FPGA. The on-chip system design features hardware design flexibility, scalability, etc., can effectively reduce the difficulty of system hardware and software design, shorten development cycles and improve design reliability.