基于BU-61580总线控制器的接口及容错设计 |
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引用本文: | 马睿,张凤英,张会新,翟成瑞.基于BU-61580总线控制器的接口及容错设计[J].应用声学,2014,22(12). |
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作者姓名: | 马睿 张凤英 张会新 翟成瑞 |
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作者单位: | 中北大学电子测试技术重点实验室,中北大学电子测试技术重点实验室,中北大学电子测试技术重点实验室,中北大学电子测试技术重点实验室 |
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基金项目: | 国家自然科学基金项目(面上项目,重点项目,重大项目) |
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摘 要: | 针对RS-422接口与1553B总线接口无法直接进行高可靠性数据通信,提出了一种基于BU-61580总线控制器的接口及容错设计。设计采用1553B接口芯片BU-61580,通过FPGA控制完成了RS-422与1553B的接口控制及二者之间的数据处理。在硬件接口设计的基础上,设计IP-CORE完成BU-61580的芯片配置,并通过增加容错设计提高了总线控制器数据通的可靠性。经测试结果显示,计算机通过总线控制器与RT终端通信稳定、可靠,并应用于某测试系统中。
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关 键 词: | 1553B总线、RS-422、BU-61580、容错设计、FPGA |
收稿时间: | 2014/6/10 0:00:00 |
修稿时间: | 7/8/2014 12:00:00 AM |
Ma Rui1,2,Zhang Huixin1,2, Zhai Chengrui1,2 |
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Institution: | Science and Technology on Electronic Test Measurement Laboratory,North University of China,Shanxi Taiyuan,,, |
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Abstract: | For the case RS-422 interface can not directly communicate with 1553B bus interface with high reliability, a interface and fault-tolerant design based on BU-61580 bus controller is proposed . The design uses 1553B interface chip BU-61580 that complets interface control and data processing between RS-422 and 1553B by FPGA control. On the basis of the design of the hardware interface, it completes BU-61580 chip configuration by designing IP-CORE, and improves the reliability of data communication of bus controller increasing the fault-tolerant design.The test results show that communication is controller and stable with bus controller and RT terminal,and it is used in a test system. |
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Keywords: | 1553B bus RS-422 BU-61580 fault-tolerant design FPGA |
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