Planar ion chip design for scalable quantum information processing

We investigate a planar ion chip design with a two-dimensional array of linear ion traps for scalable quantum information processing. Qubits are formed from the internal electronic states of trapped ^40Ca^＋ ions. The segmented electrodes reside in a single plane on a substrate and a grounded metal plate separately, a combination of appropriate rf and DC potentials is applied to them for stable ion confinement. Every two adjacent electrodes can generate a linear ion trap in and between the electrodes above the chip at a distance dependent on the geometrical scale and other considerations. The potential distributions are calculated by using a static electric field qualitatively. This architecture provides a conceptually simple avenue to achieving the microfabrication and large-scale quantum computation based on the arrays of trapped ions.     

Non-resonant magneto-optical effects in cold atoms

We report a novel nonresonant magneto-optical effect in cold atoms and present the optimized parameters of the biased magnetic field, the incident probe light intensity, and the probe detuning to obtain the maximal signal of the magneto-optical rotation. This detection scheme may further improve the stability of the cold atom clock.     

Three-Dimensional Array for 40Ca+ Ion Trapping

We present a three-dimensional scalable linear ion trap scheme for ion trapping and discuss its applications for the optical frequency standard and scalable quantum information processing with its parallel strings of trapped 40Ca＋ ions. The geometry here contains nine equal-distance parallel rods driven by rf, which form trapping potentials for radial confinement and two end ring electrodes biased at a few volts for axial confinement. Its feasibility is calculated by using the finite element analysis method.     

Surface Planar Ion Chip for Linear Radio-Frequency Paul Traps

We propose a surface planar ion chip which forms a linear radio frequency Paul ion trap. The electrodes reside in the two planes of a chip, and the trap axis is located above the chip surface. Its electric field and potential distribution are similar to the standard linear radio frequency Paul ion trap. This ion trap geometry may be greatly meaningful for quantum information processing.