排序方式: 共有1条查询结果,搜索用时 0 毫秒
1
1.
A novel voltage-withstand substrate with high-K (HK, k>3.9, k is the relative permittivity) dielectric and low specific on-resistance (Ron,sp) bulk-silicon, high-voltage LDMOS (HKLR LDMOS) is proposed in this paper. The high-K dielectric and highly doped interface N+-layer are made in bulk silicon to reduce the surface field drift region. The high-K dielectric can fully assist in depleting the drift region to increase the drift doping concentration (Nd) and reshape the electric field distribution. The highly doped N+-layer under the high-K dielectric acts as a low resistance path to reduce the Ron,sp. The new device with the high breakdown voltage (BV), the low Ron,sp, and the excellent figure of merit (FOM=BV2/Ron,sp) is obtained. The BV of HKLR LDMOS is 534 V, Ron,sp is 70.6 mΩ·cm2, and FOM is 4.039 MW·cm-2. 相似文献
1