Growth of High Quality Strained-Si on Ultra-Thin SiGe-on-Insulator Substrate

Ultra-thin and near-fully relaxed SiCe substrate is fabricated using a modified Ce condensation technique, and then a 25-nm-thiek biaxially tensile strained-Si with a low rms roughness is epitaxially deposited on a SiGe- on-Insulator （SGOI） substrate by ultra high vacuum chemical vapor deposition （UHVCVD）. High-Resolution cross-sectional transmission electron microscope （HR-XTEM） observations reveal that the strained-Si/SiGe layer is dislocation-free and the atoms at the interface are well aligned. Furthermore, secondary ion mass spectrometry （SIMS） results show a sharp interface between layers and a uniform distribution of Ge in the SiCe layer. One percent in-plane tensile strain in the strained-Si layer is confirmed by ultraviolet （UV） Raman spectra, and the stress maintained even after a 30-s rapid thermal annealing （RTA） process at 1000℃. According to those results, devices based on strained-Si are expected to have a better performance than the conventional ones.     

SOIM新结构的制备及其性能的研究

制备在以SiO2为绝缘埋层的SOI材料上的电子器件存在着自加热问题.为减少自加热效应和满足一些特殊器件/电路的要求，利用多孔硅外延转移技术制备出以二氧化硅和氮化硅为多绝缘埋层的SOI新结构.高分辨率透射电镜和扩展电阻测试结果表明得到的SOIM新结构具有很好的结构和电学性能，退火后的氮化硅埋层为非晶结构.